<img src=”http://media2.hpcwire.com/hpcwire/test_tube_image_200x.jpg” alt=”” width=”93″ height=”61″ />The top research stories of the week include the 2012 Turing Prize winners; an examination of MIC acceleration in short-range molecular dynamics simulations; a new computer model to help predict the best HIV treatment; the role of atmospheric clouds in climate change models; and more reliable HPC cloud computing.
<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/research_globe_150x.jpg” alt=”” width=”95″ height=”89″ />The top research stories of the week have been hand-selected from major science centers, prominent journals and leading conference proceedings. Here’s another diverse set of items, including whole brain simulation; a look at High Performance Linpack; the coming GPGPU cloud paradigm; heterogenous GPU programming; and a comparison of accelerator-based servers.
<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/OpenMP_logo_small.bmp” alt=”” width=”112″ height=”36″ />OpenMP, the popular parallel programming standard for high performance computing, is about to come out with a new version incorporating a number of enhancements, the most significant one being support for HPC accelerators. Version 4.0 will include the functionality that was implemented in OpenACC, the accelerator API that splintered off from the OpenMP work, as well as offer additional support beyond that. The new standard is expected to become the the law of the land sometime in early 2013.
<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/FirePro_S10000_Angle_black_180.jpg” alt=”” width=”98″ height=”85″ />AMD is launching its most powerful graphics card yet: the dual-GPU FirePro S10000 promises 5.91 teraflops of peak single precision and 1.48 teraflops of peak double precision floating point performance. And with AMD’s “Graphics Core Next” (GCN) architecture under the hood, the S10000 can deliver compute and graphics processing simultaneously.
<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/OpenACC_logo.bmp” alt=”” width=”139″ height=”47″ />PGI, Cray, and CAPS enterprise are moving quickly to get their new OpenACC-supported compilers into the hands of GPGPU developers. At NVIDIA’s GPU Technology Conference this week, there was plenty of discussion around the new HPC accelerator framework, and all three OpenACC compiler makers, as well as NVIDIA, were talking up the technology.
Additional performance increases for supercomputers are being confounded by three walls: the power wall, the memory wall and the datacenter wall (the “wall wall”). To overcome these hurdles, the market is currently looking to a combination of four strategies: parallel applications development, adding accelerators to standard commodity compute nodes, developing new purpose-built systems, and waiting for a technology breakthrough.
It’s been a little over a year since Nimbix announced the initial beta launch of its Nimbix Accelerated Compute Cloud (NACC). During the SC11 show in Seattle last week, HPC in the Cloud sat down with Nimbix Co-Founder and CEO Steve Hebert to find out where the company fits in with the small-but-growing stable of cloud providers who specialize in supporting HPC workloads.
Indiana-based MNB Technologies is a small company with big aspirations. The soon-to-be-public corporation is developing an expert-system based development suite designed to greatly simplify the programming of HPC accelerators, in particular FPGAs and GPU. To that end, the company recently announced the beta availability of its flagship product, hprcARCHITECT.
As the high performance computing community hurtles toward the exaflop milestone, it has become clear that the natural evolution of multicore x86 CPUs won’t get the industry very far toward that goal. Manycore GPGPUs, on the other hand, do appear to be a viable path to exascale computing. So where does that leave GPU-less Intel?
In an HPC market that seems determined to go down the CPU-GPU path, upstart Convey Computer may yet offer a few surprises. The company today unveiled the sequel to its HC-1 platform it introduced in 2008. Called the HC-1ex, the new system adds a lot more performance and capability, but retains the original x86-FPGA co-processor design.