<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/OpenACC_logo.bmp” alt=”” width=”139″ height=”47″ />PGI, Cray, and CAPS enterprise are moving quickly to get their new OpenACC-supported compilers into the hands of GPGPU developers. At NVIDIA’s GPU Technology Conference this week, there was plenty of discussion around the new HPC accelerator framework, and all three OpenACC compiler makers, as well as NVIDIA, were talking up the technology.
Additional performance increases for supercomputers are being confounded by three walls: the power wall, the memory wall and the datacenter wall (the “wall wall”). To overcome these hurdles, the market is currently looking to a combination of four strategies: parallel applications development, adding accelerators to standard commodity compute nodes, developing new purpose-built systems, and waiting for a technology breakthrough.
It’s been a little over a year since Nimbix announced the initial beta launch of its Nimbix Accelerated Compute Cloud (NACC). During the SC11 show in Seattle last week, HPC in the Cloud sat down with Nimbix Co-Founder and CEO Steve Hebert to find out where the company fits in with the small-but-growing stable of cloud providers who specialize in supporting HPC workloads.
Indiana-based MNB Technologies is a small company with big aspirations. The soon-to-be-public corporation is developing an expert-system based development suite designed to greatly simplify the programming of HPC accelerators, in particular FPGAs and GPU. To that end, the company recently announced the beta availability of its flagship product, hprcARCHITECT.
As the high performance computing community hurtles toward the exaflop milestone, it has become clear that the natural evolution of multicore x86 CPUs won’t get the industry very far toward that goal. Manycore GPGPUs, on the other hand, do appear to be a viable path to exascale computing. So where does that leave GPU-less Intel?
In an HPC market that seems determined to go down the CPU-GPU path, upstart Convey Computer may yet offer a few surprises. The company today unveiled the sequel to its HC-1 platform it introduced in 2008. Called the HC-1ex, the new system adds a lot more performance and capability, but retains the original x86-FPGA co-processor design.
In May, Intel announced the Many Integrated Core (MIC) architecture, with a development kit codenamed Knights Ferry. NVIDIA has announced and started to deliver its next-generation architecture, Fermi. PGI’s Michael Wolfe presents an in-depth comparison of the two designs.
At last week’s International Supercomputing Conference (ISC) in Hamburg, HPCwire sat down with Cray CTO Steve Scott to talk about life after Baker, where he revealed the company’s plans for its upcoming “Cascade” supercomputer and how the exascale landscape is shaping up.
Online, at conferences and in theory, manycore processors and the use of accelerators such as GPUs and FPGAs are being viewed as the next big revolution in high performance computing. If they can live up to the potential, these accelerators could someday transform how computational science is performed, providing much more computing power and energy efficiency.
The Roadrunner supercomputer at Los Alamos National Lab employed a hybrid Cell-Opteron architecture to be the first system to reach the petaflop milestone. But with the meteoric rise of more powerful general-purpose GPUs, the prospects for more Cell-based supercomputing may be dimming.