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Managing Memory at Multicore

Sep 18, 2013 |

With the advance of multicore and manycore processors, managing caches becomes more difficult. Researchers at MIT suggest that it might make sense to let software, rather than hardware, manage these high-speed on-chip memory banks.

Designing HPC Systems: OPS Versus FLOPS

Oct 17, 2012 |

<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/Wallach_Intel_Core_i7_layout_small.bmp” alt=”” width=”100″ height=”62″ />As more “big data” applications make their way into HPC and commercial datacenters, system architects are reconsidering the fundamental designs of our computing machinery. In the first of a series of articles on HPC design, Convey chief scientist Steve Wallach talks about some of the defining architectural issues that span the new application landscape.

HPC Hopscotch

Jun 17, 2009 |

Data locality is the key to efficient code.