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Convey Cooks Personality into New MX Line

Nov 21, 2012 |

<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/Convey_boards.jpg” alt=”” width=”98″ height=”85″ />Last week at SC12 in Salt Lake Convey pulled the lid off its MX big data-driven architecture designed to shine against graph analytics problems, which were at the heart of the show’s unmistakable data-intensive computing thrust this year. The new MX line is designed to exploit massive degrees of parallelism while efficiently handling hard-to-partition big data applications.

Convey Cranks Up Performance with Latest FPGA-Accelerated Computer

Apr 24, 2012 |

<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/Convey_HC-2.bmp” alt=”” width=”141″ height=”61″ />Convey Computer has launched its newest x86-FPGA “hybrid-core” server. Dubbed HC-2, it represents the first major upgrade of the system since the company introduced the HC-1 product back in 2008. The new offering promises much better performance, but with a similar price range as the original system.

Accelerating bioinformatics with hybrid-core computing

Apr 2, 2012 |

Advanced architectures based on reconfigurable computing can reduce application run times from hours to minutes and address problem sizes unattainable with commodity servers. The Convey hybrid-core computer systems combine the ease-of-deployment of a commodity server with the acceleration possible with reconfigurable, application-specific hardware. The resulting acceleration greatly reduces cost of ownership (by reducing many racks of commodity systems to just a few), and fundamentally improves research quality by allowing more accurate, previously impractical approaches.

Convey Bends to Inflection Point

Oct 7, 2011 |

Convey recently noted that HPC is “no longer just numerically intensive, it’s now data-intensive—with more and different demands on HPC system architectures.” They claim that the “whole new HPC” that is gathered under the banner of data-intensive computing possesses a number of unique characteristics and see unique opportunities for all the of the data, and new memory and co-processor architectures.