Tag: isc10 features
The petascale era of supercomputing is barely underway, but the effort to reach the exascale level has already begun. The University of Tennessee’s Jack Dongarra has been involved with an international project to develop software that will support exascale computing. We got a chance to speak with him before ISC and talk about the work being done.
Even as we gain a footing in the era of petaflops computing, we have set in motion the exploration of the undiscovered domain of exaflops computing. This year has seen the launching of multiple programs to develop the concepts, architectures, software stack, programming models, and new families of parallel algorithms necessary to enable the practical realization of exaflops capability prior to the end of this decade.
Chipmaker Intel is reviving the Larrabee technology for the HPC market, with plans to bring a manycore coprocessor to market in the next few years. During the ISC’10 opening keynote, Kirk Skaugen, vice president of Intel’s Architecture Group and general manager of the Data Center Group, announced the chipmaker is developing what they’re calling a “Many Integrated Core” (MIC) architecture, which will be the basis of a new line of processors aimed squarely at high performance technical computing applications.
A Chinese supercomputer called Nebulae, powered by the latest Fermi GPUs, grabbed the number two spot on the TOP500 list announced earlier today. The new machine delivered 1.27 petaflops of Linpack performance, yielding only to the 1.76 petaflop Jaguar system, which retained its number one berth.
If the Icelandic volcano gods permit, this year’s International Supercomputing Conference in Hamburg, Germany, will be the best-attended and the most exhibitor-laden show in the event’s 25-year history.