The 26th International Supercomputing Conference – ISC’11 – will take place in Hamburg, Germany, from June 19 – 23, 2011. ISC is a key global conference and exhibition for high performance computing, networking and storage. Over 2,000 attendees expected throughout the week, an even more extensive conference program than the previous year, and about 150 leading exhibitors of supercomputing, software, storage, networking and infrastructure technologies, ISC’11 is on track to draw its highest attendance in the history of the event. <br id=”tinymce” class=”mceContentBody ” />
High performance parallel storage vendor Panasas is eyeing the technical computing and big data markets with the release of its ActiveStore 11 parallel storage system appliance, a step back from 12 that comes with a more balanced storage profile and lower price per terabyte than the performance-driven ActiveStor 12.
With all the focus on more powerful microprocessors, sometimes it’s easy to forget that speedier chips do no good if memory is your bottleneck. In the final ISC’11 keynote of the week, Micron Technology VP Dean Klein talked about technologies that can help to alleviate this problem. HPCwire asked Klein to preview the topic and give us his take on where he thinks memory technologies are heading, especially in regard to high performance computing.
HPC accelerator competition is heating up and Japanese supers are scrambling for watts.
Every year at ISC we stop and look back at the field of HPC, which has consistently exhibited the greatest rate of change of any technology in the history of mankind. This year is particularly important as the conventional methods that have served well over the last two decades are in direct contention with the technology trends pushing us towards a new future — this in the context of petaflops-capable supercomputers that have become the new standard at the top end of HPC and the reemergence of Asia as a dominant player in that ethereal regime.
At ISC this year, there are plenty of sessions devoted to manycore processors, especially in the role of HPC accelerators. Not surprisingly, a lot of these are centered on the current sweetheart of manycore: GPUs. HPCwire caught up with Kirk and asked him about some of the specific challenges of GPU computing today and how he views the role of integrated CPU-GPU architectures as they come into play.
Cray enters the International Supercomputing Conference (ISC) with a new generation of its flagship and midrange supercomputer lines, renewed momentum in Europe, and fresh perspectives on HPC market trends and technologies. HPCwire talked with Cray CEO Pete Ungaro and Ulla Thiel, vice president, EMEA to get their perspective on the company’s successes, challenges, and future plans.
IDC presented its overview of the market for high performance computing at the International Supercomputing Conference in Germany this week. Tom Tabor reflects on these trends and predictions in this post from Hamburg.
Today at the International Supercomputing Conference (ISC) in Hamburg, Germany, Intel outlined the progress it has made over the last year toward bringing its Many Integrated Core (MIC) coprocessor platform to market. MIC is Intel’s answer to general-purpose GPU computing, and like the latter technology, Intel believes it can parlay the its manycore design into future exascale systems.
A Japanese supercomputer took the world title for the fastest computer in the world after the latest TOP500 list was announced Monday morning at ISC’11. Fujitsu’s K Computer delivered a world beating 8.162 petaflops on the Linpack benchmark, vaulting over the now second-place 2.57 petaflop Tianhe-1A supercomputer in China and third-place 1.76 petaflop Jaguar supercomputer in the US.