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Preparing for Manycore

Oct 13, 2014 |

One of several insightful presentations to come out of the DOE Computational Science Graduate Fellowship was delivered by Katie Antypas, Services Department Head, National Energy Research Scientific Computing Center, Lawrence Berkeley National Laboratory. In “Preparing Your Application for Advanced Manycore Architectures,” Antypas gives a humorous and on-point overview of major architectural trends in HPC and Read more…

NERSC Reveals 44 NESAP Code Teams

Sep 3, 2014 |

Last month the National Energy Research Scientific Computing Center (NERSC) announced a collaboration with supercomputing vendors Intel and Cray to prepare for Cori, the Cray XC supercomputer slated to be deployed at NERSC in 2016. To ensure that the highly diverse workloads of the DOE science community continue to be supported as over 5,000 users Read more…

Programmability Matters

Jun 30, 2014 |

While discussions of HPC architectures have long centered on performance gains, that is not the only measure of success, according to Petteri Laakso of Vector Fabrics. Spurred by ever-proliferating core counts, programmability is taking on new prominence. Vector Fabrics is a Netherlands-based company that specializes in multicore software parallelization tools, so programmability is high on Read more…

Managing Memory at Multicore

Sep 18, 2013 |

With the advance of multicore and manycore processors, managing caches becomes more difficult. Researchers at MIT suggest that it might make sense to let software, rather than hardware, manage these high-speed on-chip memory banks.

Programming the Xeon Phi

Dec 12, 2012 |

Intel’s manycore wonder comes with its own programming challenges.

Intel Brings Manycore x86 to Market with Knights Corner

Nov 12, 2012 |

<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/knights_corner_chip.jpg” alt=”” width=”98″ height=”85″ />Intel Corp. officially made its entry into the manycore realm today as it debuted “Knights Corner,” the company’s first Xeon Phi coprocessor. The new products clock in at just over a teraflop, double precision, setting the stage for an HPC accelerator battle that will pit Intel against GPU makers NVIDIA and AMD. Both of those companies also released their latest HPC accelerators into the wild earlier today at the annual Supercomputing Conference in Salt Lake City.

Intel Updates Plans for 48-Core Chip

Nov 1, 2012 |

What could you do with a 48-core smart phone? If Intel has its way, you won’t have to wait long to find out.

Adapteva Reaches Funding Goal for Parallella Project

Oct 29, 2012 |

Kickstarter investment model notches another high-tech success.

Adapteva Launches Crowd-Source Funding for Its Floating Point Accelerator

Sep 28, 2012 |

<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/Epiphany_16_small.JPG” alt=”” width=”93″ height=”79″ />Chipmaker Adapteva is attempting to bypass the conventional venture capital funding route and collect money via a micro-investor platform known as Kickstarter. In the process, the company will open up its software and hardware design for its manycore Epiphany architecture, and deliver a parallel computing kit to anyone who can ante up $99.

HP, Intel Score Petaflop Supercomputer at DOE Lab

Sep 5, 2012 |

<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/NREL_logo.gif” alt=”” width=”112″ height=”48″ />The US Department of Energy’s National Renewable Energy Laboratory (NREL) has ordered a $10 million HP supercomputer equipped with the latest Intel Xeon CPUs and Xeon Phi coprocessors. When completed in 2013, the system will deliver one petaflop of performance and will take up residence in one of the most energy-efficient datacenters in the world.

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