Tag: memory bandwidth
<img src=”http://media2.hpcwire.com/hpcwire/nvidia_gpu_graphic.jpg” alt=”” width=”94″ height=”65″ />This week at NVIDIA’s GPU Technology Conference, the priorities for GPU computing’s future, including providing snappy access to high memory bandwidth, were cited as critical to growing user ranks. The energy consumption, data volume and velocity requirements are giving way to new, more efficient and higher bandwidth approaches, including Volta, which was revealed during the keynote event.
In contrast to the previous decade, CPU clock rates are scaling slower over time due to the power constraints. However, the number of transistors per silicon area continue to increase roughly at the rate of Moore’s Law. Therefore, CPUs are being designed and built with an increasing number of cores, with each core executing one or more threads of instructions. This puts a new kind of pressure on the memory subsystem.
Maximizing performance is not always about maximizing core usage (but sometimes it is).
Six, eight and twelve cores. The true multicore era for x86 is just around the corner.