One of several insightful presentations to come out of the DOE Computational Science Graduate Fellowship was delivered by Katie Antypas, Services Department Head, National Energy Research Scientific Computing Center, Lawrence Berkeley National Laboratory. In “Preparing Your Application for Advanced Manycore Architectures,” Antypas gives a humorous and on-point overview of major architectural trends in HPC and Read more…
At the 2014 HPC User Forum in Seattle, Ryan Quick and Arno Kolster from PayPal describe how the company is using HPC to transform its chaotic real-time server data into intelligent, actionable insight. The unique “Systems Intelligence” approach uses HP’s Moonshot server powered by TI processors to aggregate, analyze and act on transaction data in real time. Read more…
While discussions of HPC architectures have long centered on performance gains, that is not the only measure of success, according to Petteri Laakso of Vector Fabrics. Spurred by ever-proliferating core counts, programmability is taking on new prominence. Vector Fabrics is a Netherlands-based company that specializes in multicore software parallelization tools, so programmability is high on Read more…
With the advance of multicore and manycore processors, managing caches becomes more difficult. Researchers at MIT suggest that it might make sense to let software, rather than hardware, manage these high-speed on-chip memory banks.
We’ve scoured the journals and conference proceedings to bring you the top research stories of the week. This diverse set of items includes the latest CAREER award recipient; the push to bring parallel computing to the classroom; HPC in accelerator science; the emerging Many-Task Computing paradigm; and a unified programming model for data-intensive computing.
The top research stories of the week include an evaluation of multi-stage programming with Terra; a look at parallel I/O for multicore architectures; a survey of on-chip monitoring approaches used in multicore SoCs; a review of grid security protocols and architectures; and a discussion of the finer distinctions between HPC and cloud computing.
<img src=”http://media2.hpcwire.com/hpccloud/cloud_graphic_150x.jpg” alt=”” width=”94″ height=”81″ />Our top HPC cloud research story this week lays out a lightweight approach to implementing virtual machine monitors. Other items explore an innovative parallel cloud storage system, HPC-to-cloud migration, anywhere-anytime cluster monitoring, and a framework for cloud storage.
<img src=”http://media2.hpcwire.com/hpcwire/world_connectivity_200x.jpg” alt=”” width=”95″ height=”70″ />The top research stories of the week include lessons learned from system failures; a cross-platform OpenCL implementation; the best memory to extract GPU’s potential; innovative ideas for next-generation interconnects; and the benefits of cloud storage to HPC applications.
<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/Gerhard_Wellein_small.jpg” alt=”” width=”95″ height=”85″ />At this June’s International Supercomputing Conference (ISC’13) in Leipzig, Germany, Gerhard Wellein will be delivering a keynote entitled, Fooling the Masses with Performance Results: Old Classics & Some New Ideas. HPCwire caught up with Wellein and asked him to preview some of the themes of his upcoming talk and expound on his philosophy of programming for performance in the multicore era.
What could you do with a 48-core smart phone? If Intel has its way, you won’t have to wait long to find out.