<img src=”http://media2.hpcwire.com/hpcwire/world_connectivity_200x.jpg” alt=”” width=”95″ height=”70″ />The top research stories of the week include lessons learned from system failures; a cross-platform OpenCL implementation; the best memory to extract GPU’s potential; innovative ideas for next-generation interconnects; and the benefits of cloud storage to HPC applications.
<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/Gerhard_Wellein_small.jpg” alt=”” width=”95″ height=”85″ />At this June’s International Supercomputing Conference (ISC’13) in Leipzig, Germany, Gerhard Wellein will be delivering a keynote entitled, Fooling the Masses with Performance Results: Old Classics & Some New Ideas. HPCwire caught up with Wellein and asked him to preview some of the themes of his upcoming talk and expound on his philosophy of programming for performance in the multicore era.
What could you do with a 48-core smart phone? If Intel has its way, you won’t have to wait long to find out.
<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/exludus_logo.jpg” alt=”” width=”139″ height=”32″ />The advent of multicore servers presents something of a challenge for application virtualization. This is especially true in the realm of high performance computing, an environment that has never been particularly friendly to virtualization. To overcome these hurdles, eXludus Technologies has introduced “micro-virtualization,” a technology that brings virtualization down to the level of the core, and does so with minimal overhead.
As processor core counts rise, MIT research suggests on-chip networks will be needed.
MIT’s Hornet simulator takes the sting out of manycore design.
In a recent article in the HPC Source magazine, Wolfgang Gentzsch discusses the good, the bad, and the ugly of multicore processors.
A new language could improve the quality of parallel code and automate some of the trickiest elements of multicore programming.
The Weekly Top Five features the five biggest HPC stories of the week, condensed for your reading pleasure. This week, we cover the NC State effort to overcome the memory limitations of multicore chips; the sale of the first-ever commercial quantum computing system; Cray’s first GPU-accelerated machine; speedier machine learning algorithms; and the connection between shrinking budgets and increased reliance on modeling and simulation.