This week we spoke with Jörg Lotze, CTO and cofounder of financial services-driven software firm, Xcelerit, about benchmarking accelerators, coprocessors, and multicore architectures with specific emphasis on how GPUs stack up against Intel Xeon Phi coprocessors. Lotze discussed the challenges and opportunities of each in the context of real-world Monte Carlo examples.
Today IBM announced NextScale, which will eventually evolve into the place of its iDataPlex systems. Tapping the power of the new Ivy Bridge processors, coupled with eventual support for a host of accelerated options (GPUs, Xeon Phi and likely other processor choices) the company also put its stake in the ground for hyperscale and HPC..
Iowa State has taken delivery of its most powerful supercomputer yet. The 4,768 core “Cyence” HPC cluster – accelerated by NVIDIA GPUs and Intel Xeon Phis – is the touchstone of a $2.6 million project to revitalize HPC-based research at Iowa State…
Following Intel’s low-key announcement today of updates to Cluster Studio and Parallel Studio, we spoke with its software and tools guru, James Reinders, about what these enhancements mean for Xeon Phi, Fortran development, and the advancement along standards lines, including OpenMP 4.0 and….
This week at the Intel “Reimagine the Datacenter” event in San Francisco, we talked with the company’s HPC lead, Raj Hazra about the general themes that emerged during a series of presentations around efficiency, performance and a new approach to integration across the stack. While not an HPC-oriented set of announcements, Hazra said…
Not content to let the Tianhe-2 announcement ride alone, Intel rolled out a series of announcements around its Knights Corner and Xeon Phi products–all of which are aimed at adding some options and variety for a wider base of potential users across the HPC spectrum. Today at the International Supercomputing Conference, the company’s Raj….
With help from a draft report from Jack Dongarra of the University of Tennessee and Oak Ridge National Laboratory, who also spearheads the process of verifying the top of the pack super, we are able to share the full processor, Xeon Phi coprocessor, custom interconnect, storage and memory, as well as power and cooling information. The supercomputer out of China will be…
This week we’re at the IDC User Forum in Tucson, staying cool amidst some heated talks about which processor, coprocessor and accelerator approaches are going to push into the lead in the next few years. To take this pulse, we sat down with IDC’s Steve Conway to talk about some general trends that are a tall drink of water for a few key vendors, including Intel, NVIDIA…..
Despite developer hassle, this is a great problem from the perspective of companies who are finding ways to tailor clean layers around complex code for heterogeneous computing. Take, for example, Atlanta-based AccelerEyes, which is seeing booming business because of the demand for GPU acceleration and interest in kicking the Xeon Phi co-processor tires.
<img src=”http://media2.hpcwire.com/hpcwire/Cloud_Storage_and_Bioinformatics_in_a_private_cloud_Fig._3_150x.png” alt=”” width=”95″ height=”95″ />The top research stories of the week include an evaluation of sparse matrix multiplication performance on Xeon Phi versus four other architectures; a survey of HPC energy efficiency; performance modeling of OpenMP, MPI and hybrid scientific applications using weak scaling; an exploration of anywhere, anytime cluster monitoring; and a framework for data-intensive cloud storage.