Tag: Phi

Adapting Algorithms to Modern Hybrid Architectures

Aug 13, 2014 |

Technology, like other facets of life, commonly experiences cycles of rapid change followed by periods of relative stability. Computing has entered a stage of increased architectural diversity, as evidenced by the rise of accelerators, coprocessors, and other alternatives, like ARM processors. An international team of researchers explores how these various supercomputing architectures perform on parallelized turbulent Read more…

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BAE Systems Hones HPC Strategy

Jul 16, 2014 |

High-performance computing is vitally important to the mission of BAE Systems, one of the largest defense, aerospace, and security contractors in the world. As a high-tech manufacturer, BAE Systems relies on simulation and modeling software to design and build its products. The group responsible for identifying and developing this technology inside BAE Systems is called Read more…

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Programmability Matters

Jun 30, 2014 |

While discussions of HPC architectures have long centered on performance gains, that is not the only measure of success, according to Petteri Laakso of Vector Fabrics. Spurred by ever-proliferating core counts, programmability is taking on new prominence. Vector Fabrics is a Netherlands-based company that specializes in multicore software parallelization tools, so programmability is high on Read more…

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Seismic Imaging at the DEEP End

Jun 3, 2014 |

With exascale presenting a much larger challenge than previous exponential computing markers, an integrated, collaborative approach is all the more necessary. While concerted funding efforts for extreme-scale computing came a bit later than many had hoped, there are several international efforts afoot currently, including the European project, DEEP. DEEP, which stands for Dynamical ExaScale Entry Read more…

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Benchmarking MPI Communication on Phi-Based Clusters

Mar 12, 2014 |

Intel’s Many Integrated Core (MIC) architecture was designed to accommodate highly-parallel applications, a great many of which rely on the Message Passing Interface (MPI) standard. Applications deployed on Intel Xeon Phi coprocessors may use offload programming, an approach similar to the CUDA framework for general purpose GPU (GPGPU) computing, in which the CPU-based application is Read more…

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Intel Sheds Light on the ‘Corner to Landing’ Leap

Dec 6, 2013 |

Since the first details about the MIC architecture emerged, Intel has continually harkened back to their vision of offering a high degree of parallelism inside a power efficient package that could promise programmability. With the eventual entry of the next generation Xeon Phi hitting the market in years to come with its (still unstated) high Read more…

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Alternatives to x86 for Physics Processing

Nov 11, 2013 |

The global distributed computing system known as the Worldwide LHC Computing Grid (WLCG) brings together resources from more than 150 computing centers in nearly 40 countries. Its mission is to store, distribute and analyze the 25 petabytes of data generated each year by the Large Hadron Collider (LHC), based out of the European Laboratory for Particle Physics (CERN) in Geneva, Switzerland. Read more…

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A Path to Many-Task Computing on the Xeon Phi

Oct 24, 2013 |

It’s been nearly a year since the Intel Xeon Phi Coprocessor debuted at SC12, and in that time, it has experienced strong acceptance from the community. But as this is a relatively new technology, research into its usefulness is still forthcoming. Adding to the growing body of research on the Phi is “Understanding the Costs Read more…

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Phi and Kepler Run Monte Carlo Race

Sep 18, 2013 |

This week we spoke with Jörg Lotze, CTO and cofounder of financial services-driven software firm, Xcelerit, about benchmarking accelerators, coprocessors, and multicore architectures with specific emphasis on how GPUs stack up against Intel Xeon Phi coprocessors. Lotze discussed the challenges and opportunities of each in the context of real-world Monte Carlo examples.

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IBM Dials Up Density for HPC and Hyperscale

Sep 11, 2013 |

Today IBM announced NextScale, which will eventually evolve into the place of its iDataPlex systems. Tapping the power of the new Ivy Bridge processors, coupled with eventual support for a host of accelerated options (GPUs, Xeon Phi and likely other processor choices) the company also put its stake in the ground for hyperscale and HPC..

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