A trio of partner projects based in Europe – Exanest, Exanode and Ecoscale – are working in close collaboration to develop the building blocks for an exascale architecture prototype that will, as they describe, put the power of ten million computers into a single supercomputer. The effort is unique in seeking to advance the ARM64 + Read more…
At SC15 today, IBM provided a glimpse of its broadening vision for accelerator-assisted computing with announcements around Watson, a strategic alliance with FPGA specialist Xilinx, an expanded developer outreach via the SuperVessel program, and new efforts to accelerate the datacenter and a wide variety of applications used in both HPC and the enterprise. “Accelerators have Read more…
With data volumes now outpacing Moore’s Law, there is a move to look beyond conventional hardware and software tools. Accelerators like GPUs and the Intel MIC architecture have extended performance goals for many HPC-class workloads. Although field-programmable gate arrays (FPGAs) have not seen the same level of adoption for traditional HPC workloads, a subset of big data Read more…
<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/V72000T_chip.jpg” alt=”” width=”105″ height=”77″ />Thanks to shrinking semiconductor process geometries, the newest FPGAs have more usable transistors than ever before and are now capable of considerable floating point (FP) performance. That makes them candidates for more generalized use in high performance computing. This article describes the FP capabilities of Xilinx’s new Virtex-7 FPGA and how it stacks up against a generic 16-core CPU.
For the past several years, Field Programmable Gate Arrays (FPGAs) have been getting large enough to compete with microprocessors in floating-point performance. Using the theoretical peak performance numbers, the FPGA’s floating-point performance is growing faster than microprocessors. This article calculates the peak performance for several FPGA devices from Xilinx and compares them to a reference microprocessor for equivalent time periods and shows that this gap in performance is growing.
In an HPC market that seems determined to go down the CPU-GPU path, upstart Convey Computer may yet offer a few surprises. The company today unveiled the sequel to its HC-1 platform it introduced in 2008. Called the HC-1ex, the new system adds a lot more performance and capability, but retains the original x86-FPGA co-processor design.
Chinese Tianhe-1A supercomputer exploits GPU power to deliver 2.5 petaflops; and Cray nabs a $60 million contract with the University of Stuttgart. We recap those stories and more in our weekly wrapup.
Could the chip maker’s rumored interest in FPGAs be part of an HPC strategy?
Wall Street analyst speculates chip giant may be considering Xilinx or Altera buy.