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HSA Spec Lays Out Architecture for Acceleration

Mar 17, 2015 |

The Heterogeneous System Architecture (HSA) Foundation marked what it says will be known as a watershed event in heterogeneous computing with the release of the HSA 1.0 specification. The new spec, nearly three years in the making, brings the foundation closer to its goal of enabling write-once run-anywhere programming for accelerated computing on devices ranging from the Read more…

A Comparison of Heterogeneous and Manycore Programming Models

Mar 2, 2015 |

The high performance computing (HPC) community is heading toward the era of exascale machines, expected to exhibit an unprecedented level of complexity and size. The community agrees that the biggest challenges to future application performance lie with efficient node-level execution that can use all the resources in the node. These nodes might be comprised of Read more…

BSC, Intel Extend Exascale Research Effort

Feb 17, 2015 |

Intel’s efforts to advance exascale computing concepts received a boost with the extension of the company’s research collaboration with the Barcelona Supercomputing Center (BSC) – one of four Intel exascale labs in Europe. Begun in 2011 and now extended to September 2017, the Intel-BSC work focuses on scalability issues with parallel applications. “[A major goal] Read more…

Run Anywhere Big Data and HPC Workloads

Feb 9, 2015 |

A classical problem in software development is how you manage your software applications dependencies. This extends all the way from the time you program your application to the time you run or deploy it. The typical application is almost always dependent on specific versions of libraries, compilers or the OS level package management system. Organizations Read more…

Practical Advice for Knights Landing Coders

Feb 5, 2015 |

The National Energy Research Scientific Computing Center (NERSC) is on track to get its next supercomputer system, Cori, by mid-2016. While that’s more than a year away, it’s not too soon to start preparing for the new 30+ petaflops Cray machine, which will feature Intel’s next-generation Knights Landing architecture. So says Richard Gerber, Senior Science Read more…

Short Takes

DARPA Targets Autocomplete for Programmers

Nov 6, 2014 |

If Rice University computer scientists have their way, writing computer software could become as easy as searching the Internet. Two dozen computer scientists from Rice, the University of Texas-Austin, the University of Wisconsin-Madison and the company GrammaTech have joined forces to turn this promise into a reality. With $11 million in DARPA-funding, the group will Read more…

ARL Researchers Win Software Design Contest

Oct 16, 2014 |

Researchers from the U.S. Army Research Laboratory’s Computational and Information Sciences Directorate (CISD) – David Richie and James Ross – won first place in an international software contest for their work on emulators. Their submission, Cycle-Accurate 8080 Emulation Using an ARM11 Processor with Dynamic Binary Translation, addresses some of the programming challenges of next generation Read more…

NSF Promotes Data Science with $31M Award

Oct 1, 2014 |

The National Science Foundation (NSF) announced today some $31 million in awards for 17 innovative projects geared toward the promotion of data science and a robust data infrastructure. The National Science Foundation (NSF) seeks to improve the nation’s capacity in data science by investing in the development of infrastructure, making it easer to use data, Read more…

Deconstructing Moore’s Law’s Limits

Aug 18, 2014 |

For the past five decades, computers have progressed on a predictable trajectory, doubling in speed roughly every two years in tune with Gordon Moore’s oft-cited observation-turned-prophecy. Although semiconductor scaling continues to yield performance gains, many perceive a tipping point is nigh, where the cost-benefit analysis of further miniaturization breaks down. The latest researcher to weigh Read more…

Parallel Programming with OpenMP

Jul 31, 2014 |

One of the most important tools in the HPC programmer’s toolbox is OpenMP, a standard for expressing shared memory parallelism that was published in 1997. The current release, version 4.0, came out last November. In a recent video, Oracle’s OpenMP committee representative Nawal Copty explores some of the tool’s features and common pitfalls. Copty explains Read more…

Off the Wire

CAPS Engineering Created to Provide Parallel Consulting Services

Nov 20, 2013 |

DENVER, Colo., Nov. 20 — CAPS entreprise, leading provider of HPC compiler technology, is pleased to announce the creation of its new CAPS engineering entity. Leader in developing parallel compilers and based on its long standing expertise in processor architectures, CAPS officially creates an engineering team dedicated to provide its customers with high value consulting Read more…