HPCwire: Intel Boosts Open Source Thread Library

The Leading Source for Global News and Information Covering the Ecosystem of High Productivity Computing

HPCwire >> Topic >> Developer Tools

July 24, 2008

Intel Boosts Open Source Thread Library

by John E. West, for HPCwire

Page: 1 of 2
1 | 2 All »

On Tuesday at the O'Reilly Open Source Convention (OSCON), Intel announced that the latest version of its Threading Building Blocks (TBB) library, version 2.1, will be available for download this week. TBB is Intel's contribution to the growing collection of tools designed to help the millions of programmers worldwide exploit parallelism in their applications.

Intel doesn't make its money making chips -- it makes its money making chips that do things people want done. Ultimately this means creating hardware that programmers can use to make their software applications tumble, twirl, and pirouette across the computer desktops of users from Monterey to Minsk. This means that when Intel makes a big architectural change, like the one we are currently experiencing with the introduction of multicore processors, it is in the company's best interest to help developers manage the change effectively.

A traditional threaded approach to programming that uses, for example, POSIX or Windows threads requires the programmer to manually create and manage the threads used by an application. Managing threads explicitly can be a laborious and error-prone process that challenges even experienced programmers. For those new to parallelism -- that is, the majority of programmers who now face the challenge of utilizing multiple cores in their applications -- this challenge can present a substantial hurdle.

That's where Threading Building Blocks, or TBB, comes in. TBB is a C++ template library designed to help programmers express the parallelism hiding in their applications in a way that separates expression from implementation, and without having to worry about thread management details. TBB allows the programmer to focus on managing tasks in the application. The library's run time engine then handles the scheduling of tasks to threads so that the programmer doesn't have to, using a work stealing approach that ensures the computational demand on each core stays balanced even in the face of dynamic system load.

Where does it fit in the box of tools available to C++ programmers? TBB is discussed most frequently in the context of POSIX or other native threads implementation and OpenMP.

Compared to parallelism using native threads, TBB offers the advantages already discussed in avoiding the need for the programmer to explicitly manage the threads. For the most part, native threads require that work be assigned to threads through functions and, for users programming in C++ (but not C or Fortran), using native threads may pose challenges that disrupt the flow of the program. TBB is also well-suited to applications with a lot of parallel work that needs to be done that isn't expressed in a loop structure, and it emphasizes scalability through data parallel programming.

Unlike OpenMP, neither native threads nor TBB requires compiler support. The use of C++ templates means that TBB is available anywhere there is a C++ compiler, and it fits in nicely with object-oriented programming. For applications written in C or Fortran, OpenMP may still be a great solution because it fits well into a structured programming style. (See the examples in this paper for an illustration of how disruptive TBB can be if it doesn't fit the programming style.) This is especially true if the application is dominated by loop-based processing, where OpenMP really shines. Both OpenMP and TBB are portable, and both adapt easily to spread work to be done over available resources. Native threads share neither of these advantages.

Interestingly all three methods can co-exist in an application, as can MPI, making it straightforward to adopt the model that's best suited to the work in a particular area of the code -- provided you have the necessary programming skills.

There are two versions of TBB: a commercial version, available in shrink wrap from Intel, and the open source version, announced at OSCON last year. I spoke with Intel's Phil De La Zerda and Vasanth Tovinkere about what's new in this latest version of the library, and both men emphasized the degree to which the new release benefits from the input of a large and active community on the open source side. Phil is Intel's director of business development, developer products division and Vasanth is a senior staff engineer in Intel's performance, analysis and threading lab.

Intel created TBB to provide a robust path to parallel programming for those without a lot of experience in traditional high-end HPC. And Intel has been pleased with its success so far. According to De La Zerda, TBB is included in about 60 percent of Linux distributions that have been paid for, and 80 percent of free distributions. These distributions cover OpenSolaris, Fedora, OpenSuse, Ubuntu, and many others. While De La Zerda declined to be specific on Intel's download goals, he did mention that in the year since TBB was open sourced, downloads were "in the many thousands," and the actual numbers more than doubled their original expectations.

Page: 1 of 2
1 | 2 All »

Article Tools

Share Options

(Digg, Technorati, more)

Subscribe

Subscribe to HPCwire

Discussion

There are 0 discussion items posted.

Join the Discussion

You must be a registered user in order to comment on HPCwire stories.

Members enjoy:

	Access to Special Content, including Podcasts, Webcasts, and Whitepapers and more!
	Ability to take an active role in the discussions that are shaping the HPC technology discipline!
	Special offers available only to HPCwire members!

Become a Registered User Today!

Registered Users Log in Here to Comment

Email Address:	Password (case sensitive)

Remember me	Forgot Password?

RSS Feeds

Feeds by Topic

Feeds by Industry

Feeds by Content Type

Feature Articles

The Week in Review

TACC's Ranger supercomputer celebrates its second year of enabling important research; Microsoft partners with NSF to bring cloud services to researchers; and NSF submits its fiscal year 2011 budget request. We recap those stories and more in our weekly wrapup.
Read More...

NASA Looks to Move Science Apps Into the Cloud

It seems only natural that the US space agency would be casting its eyes toward the clouds. Sure enough, NASA is now looking to cloud computing to optimize the operation of the agency's IT infrastructure for some of its science codes. Like many commercial businesses and government organizations, NASA is being asked to do more computing with fewer datacenter resources.
Read More...

Thoughts, Observations, Beliefs & Opinions About the NSF Supercomputer Centers

There is no such thing as an NSF (Supercomputer) Center and there never has been. There should be. What there are, in the words of Ed Hayes, then comptroller of NSF, are "NSF ASSISTED Supercomputer Centers." This is a double edged sword.
Read More...

Read more HPCwire features...

Top Headlines

IBM Releases Energy Efficient Power7 System

Feb 09 | eWeek Europe | Company says new high-end servers will deliver "intelligent performance." Read more...

Inductive Coupling Packs Flash Drive in a Chip

Feb 09 | EE Times | Wireless technology promises energy-efficient chip-to-chip communication. Read more...

IBM, Microsoft Help Create Montana Supercomputer

Feb 08 | eWeek | A new kind of Rocky Mountain high. Read more...

AMD Aims for GPUs in Mainstream Servers Starting 2012

Feb 08 | Computerworld | Chip maker hopes to bring CPU-GPU processors to servers in two years. Read more...

Graphene Transistors That Work at Blistering Speeds

Feb 05 | Technology Review | IBM has created graphene transistors that leave silicon ones in the dust. Read more...

Read more headlines...

Featured Whitepapers

Virtualization for Aggregation And The vSMP Architecture™

Jan 12 | | In-depth look at vSMP Foundation server virtualization technology, technical implementation, use cases and capabilities. The technical whitepaper provides an architectural overview and details on the three vSMP Foundation products: vSMP Foundation for SMP, vSMP Foundation for Cluster and vSMP Foundation for Cloud.

Copper Cable Technologies for High Performance Computing

Jan 18 | | This white paper discusses Gore’s copper cable assemblies, and how they continue to exceed the standards for providing reliable, cost-effective solutions for high-performance computer applications.

Appro Assists LLNL with Cluster Designed for Extreme Scale Visualization

Jan 11 | | LLNL is home to some of the fastest computers in the world. In 2012, LLNL expects to have the Sequoia supercomputing cluster operational with a projected performance of over 20 PFLOP/s. These systems will focus on strengthening the foundations of predictive simulation through running large suites of complex simulations and then comparing model predictions with experimental data. To visualize this project’s large amount of data, LLNL requested an Appro Supercomputing Cluster specifically designed to support interactive data analysis.

View the White Paper Library

Multimedia

Webcast: Virtualized Data Center Roundtable

Join this online panel discussion for live Q&A with leading industry experts, analysts, and end-users to discuss the latest innovations, best practices, barriers to implementation, and measurable benefits of server virtualization with a particular focus on today's real world solutions.

Webcast: Watch SC09 Birds of a Feather Video: Scalable Fault-Tolerant HPC Supercomputers

Learn about scalable fault-tolerant architectures and examples of energy efficient and scalable supercomputing clusters using dual QDR InfiniBand to combine capacity computing with network failover capabilities with the help of programming languages such as MPI and a robust Linux cluster management package.

Webcast: High Performance Computing for a Smarter Planet

LIVE@SCO9: The IBM team discusses new innovations in hardware, software and services that help clients better understand their workloads and get insight from their R&D efforts. Technology demonstrations include the soon-to-be-released Power7 HPC processor, the DCS990 system with 2.4 petabytes of storage, the xCAT management tool, secure HPC cloud computing and more. Winners of two HPCwire Readers' and Editors’ Choice Awards! Take the IBM virtual tour at SC09 or more information go online to: http://www-03.ibm.com/systems/deepcomputing/sc09.html