HPCwire: Aggregating Clusters Through Virtualization; Virtual SMP Benefits

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December 16, 2008

Aggregating Clusters Through Virtualization; Virtual SMP Benefits

by Shai Fultheim, Founder and CEO of ScaleMP

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Aggregation is a virtualization technique that makes multiple physical systems appear to function as a single logical system. The building blocks for this approach are the same building blocks used in scale-out (clustering): industry-standard servers and high-speed interconnects. Aggregation fundamentally replaces the functionality of custom and proprietary chipsets with software, leveraging commodity interconnects such as InfiniBand. It utilizes only a tiny fraction of the system's CPUs and RAM to provide chipset-level services without sacrificing system performance.

By running a single logical system, customers reduce the management costs associated with managing multiple cluster nodes, and take advantage of large contiguous memory and unified I/O architecture. To understand how aggregation works, we will first explain the architecture of a traditional SMP system, and then dive into the details of the aggregation approach.

Traditional Multi-Processor Systems

Traditional multi-processor systems run a single operating system (OS). The OS interacts with the system using a well-defined hardware interface, which provides the OS with predefined services to use and control the hardware. These interfaces may include hardware detection and probing, memory ordering semantics, I/O space access and interrupt delivery mechanisms.

Intel's Multiprocessor Specification allows a single copy of an operating system to run on a single CPU system as well as on a multi-CPU system with up to 255 CPUs. It details a well-defined interface that allows the OS to know exactly how to probe the hardware to determine what kind of system is running underneath it, and then behaves accordingly. This interface also handles the coordination of the underlying system with the OS. For a traditional multi-processor system, such interface is implemented in a silicon chipset.

In addition to the hardware interface, the multi-processor system consists of CPUs, memory and I/O subsystems. These components are all connected together with a proprietary backplane, often implemented by a chipset. Examples of such chipsets and backplanes are Intel's FSB (Front Side Bus), AMD's HT (Hyper-Transport), SUN's CrossBar, SGI's NUMALINK and IBM's XA.

The chipset and the proprietary backplane (system interconnect) are the elements where multi-processor systems differ the most from each other and where the major cost of a high-end multi-processor systems is derived. The system interconnect is expensive because the more processors that are added to a system, the more complex it becomes to connect them all together in a manner that ensures both coherency and performance. Traditional multi-processor systems require the creation of a custom chipset to implement the system interconnect to allow processor, memory and I/O communication.

Software Approach: Aggregation

Aggregation reduces the costs associated with custom chipsets and backplanes. It requires multiple high-volume, industry-standard x86 systems (processor speed and amount of memory across boards do not have to be the same). In addition, a high-speed, low-latency interconnect serves as backplane. InfiniBand infrastructure excels in this regard. The aggregation software is loaded on each system board below the operating system layer.

One System

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