Products: KAI KAP/Pro V2.0 Is Now Available. PsiTech’s Dual Head for SGI 02 Desktop Workstation.

November 1, 1996

KAI ANNOUNCES KAP/PRO TOOLSET

  Champaign, Illinois -- Kuck & Associates Monday announced the immediate
availability of Version 2.0 of the KAP/Pro Toolset, a set of parallel
programming tools for shared memory parallel (SMP) systems. KAP/Pro Toolset
delivers parallel software engineering for developers of large-scale Fortran
software applications. Version 2.0 includes Assure, the industry's first
parallel correctness verifier. According to a press release, KAP/Pro is for
programmers who: (1) know their application, (2) want top SMP performance,
and (3) need greater parallel programming productivity. KAP/Pro Toolset
provides several innovations: portability of ordinary Fortran programs to
all Unix and NT SMP systems, effective performance analysis tools, and a
unique approach to parallel debugging that really finds bugs and saves
programmer time.

  The five components of the KAP/Pro Toolset are: KAP, KAI's parallelizer,
for automatic optimization; Guide, syntax to express portable parallelism
explicitly; GuideView, to understand and correct parallel performance
problems; Assure, to verify the correctness of their parallel program; and
Application Accelerators which are bundled with the application.

  The KAP/Pro Toolset is currently in use at national laboratories,
independent software vendors (ISVs), industrial software developers and
universities. Applications being parallelized or ported include automotive
crash simulations, nuclear reactor and weapons design, weather forecasting
and oil reservoir simulation.

  Software developers use KAP/Pro Toolset on these development and production
systems: Digital Alpha UNIX, IBM RS/6000 AIX, SGI Irix, SPARC-based Solaris
and WindowsNT platforms. For more information go to the KAP/Pro Toolset page
on the Internet at http://www.kai.com/kpts

PSITECH ANNOUNCES DUAL HEAD FOR SILICON GRAPHICS' NEW 02 DESKTOP WORKSTATION

  Fountain Valley, Calif. -- PsiTech Oct. 28 introduced a high resolution
display card and software that will provide a dual head fully-integrated
system for Silicon Graphics' new line of workstations. Called the PsiTech
RAD4, the product will provide multiple display head capabilities for the
Silicon Graphics' 02 desktop. The PsiTech RAD4 provides a solution for
applications that require greater display space and/or better visual
separation between user interface and graphical output. Additional display
capabilities enhance the 02 workstation by matching the display space to the
graphic potential of the workstation and application. The RAD4 is fully
compatible with the 02 workstation and provides 24 bit color frame buffer
with resolutions of 1280x1024, 2048x1024, or 1600x1280 pixels; up to 76 Hz
vertical refresh rate; and 200 MHz of pixel bandwidth. The RAD4 uses a
half-length PCI card in a standard 32 bit PCI bus and can be used with either
landscape or portrait monitors. The RAD4 package also includes fully
transparent native keyboard and mouse support. All of these features are
accessible through standard X-Windows and applications that are fully
compliant with the OpenGL API, delivering a seamless multiple display
Graphical User Interface. The RAD4 can support a variety of display products
as well as wall projection systems. The RAD4 is available now and pricing
starts at $1499 in quantity purchases. Details can be obtained from
http://www.primenet.com/~psitech/

SDI INTRODUCES FRAME RELAY 45Mbps T3 & 52Mbps HSSI PCI OEM WAN MODULE

  Easton, Mass. -- SDL Communications Oct. 28 announced immediate
availability of a 45-51 Mbps T3 and HSSI PCI WAN module for the OEM market.
This SDL CC3i adapter is explicitly targeted at enterprises that have
high-speed data and video requirements, as well as Internet Service Providers
(ISPs) and corporations seeking high-capacity Internet or Intranet
interfaces. The SDL CC3i adapter can also be gainfully used for ATM or SMDS
DXI applications such as interfacing Frame Relay networks to ATM. According
to a press release from SDI, CC3i is the first PCI based adapter that offers
support for the strategic and increasingly popular T3, E3, HSSI & DXI
interfaces. The CC3i is based on SDL's proven, highly successful modular
motherboard and daughter card design, with popular electrical [e.g. V.35] and
telecomms [e.g. T3] interfaces. The electrical interfaces supported include:
EIA530, RS442, V.35 and HSSI. The SDL CC3i adapter ships with tested,
reliable and highly stable drivers for DOS, WINDOWS-NT and most popular
versions of UNIX. A well defined and comprehensively documented API is also
available to facilitate OEM and Systems Integration applications. The SDL
CC3i currently supports HDLC and Clear Channel Transparent Mode data
transfer. The CC3i can be managed via SNMP and includes a full repertoire of
diagnostic tools. The OEM pricing for the SDL CC3i will be in the $3,000
range. Details can be obtained from SDL at 508-238-4490.

EONIC SYSTEMS PORTS VIRTUOSO CLASSICO TO DSP GROUP'S OAKDSPCORE

  Boston, Mass. -- Eonic Systems recently announced availability of its high
performance Virtuosos Classico/SP for the OakDSPCore from the DSP Group. The
OakDSPCore is a 40Mips fixed point ASIC core DSP used in low-power,
high-volume applications. Virtuoso Classico on the OakDSPCore is an example
of an advanced software development tool used in areas where previously all
software was laboriously coded by hand. Unlike traditional real-time
operating systems which are too large and impose too much overhead for use in
such cost-sensitive applications, Virtuoso offers 250 nanosecond interrupt
latencies and a choice of scheduling routines as small as 300 words. The
Virtuoso Classico architecture has multi-tasking at the microkernel level,
multiple processes (lightweight threads) at the nanokernel level, and
Interrupt Service Routines (ISR) at the lowest level. High speed performance
is achieved through the use of Eonic Systems' nanokernel, a round-robin
scheduler with very low overhead (context switch times are less than 700
nanoseconds at 40 MHz). Virtuoso Classico/SP includes a host server, standard
I/0, a PC graphics library, and a task level debugger with a tracing monitor.
Because the OakDSPCore lacks standard timers, system timer services can be
implemented at a minimal charge for customer specific implementations.
Development system pricing begins at $3,500. Details can be obtained from
Eonic Systems Inc. http://www.eonic.com

WIND RIVER RELEASES TORNADO TRANSITION KIT FOR MOTOROLA VMEEXEC OS

  Alameda, Calif. -- Wind River Systems has announced a new Tornado
Transition Kit for migrating embedded applications based on other embedded
operating systems to the VxWorks operating system, part of Wind River's
Tornado development environment. This easy-to-use Kit is available free of
charge via the World Wide Web at http://www.wrs.com/switch . The first
version the Tornado Transition Kit was developed in conjunction with Motorola
Computer Group for users of the VMEexec operating system. The Tornado
Transition Kit provides a run-time library that maps existing kernel calls to
the appropriate VxWorks functions. Legacy code is first run on VxWorks with
the use of the included transition library. This gives developers an interim
step to ensure that the application code runs easily on VxWorks. After this
is completed, developers can optimize the application code by replacing
existing function calls with analogous VxWorks calls where needed. Kernel
functionalities, including semaphores, message queues, events, asynchronous
signal routines, timers, task management, and memory management, are covered
by the Kit. The Transition Kit is designed for UNIX-, Windows 95- and Windows
NT-hosted versions of Tornado.

OPEN MIND RELEASES HYPERMILL 3.0 FOR AUTODESK MECHANICAL DESKTOP

  Madison Heights, Mich. -- Open Mind Software Technologies has releases
version 3.0 of hyperMILL for the Autodesk Mechanical Desktop. hyperMILL
converts CAD designs into NC data (Numerical Control instructions for
machining) without having to leave the familiar CAD program environment.
hyperMILL is a 3-axis NC machining software system that creates gouge-free
multi-axis NC cutter path directly from the Autodesk surface and solid model
geometry. New features to hyperMILL 3.0 include a unique joblist user
interface and higher processing speeds. hyperMILL is marketed through
independent Value Added Resellers in the U.S., the Pacific Rim, Japan and
Europe. The company, based in Munich, Germany, has established a wholly owned
subsidiary near Detroit, MI. Details can be obtained by calling Open Mind at
810-414-7950.

CADIS KRAKATOA SUPPORTS JAVASTATION

  New York, NY -- CADIS Inc. this week announced that its Krakatoa
interactive finding technology is now available for the JavaStation. First
introduced in November 1995, Krakatoa is an object-oriented content
management and data retrieval engine based on Sun Microsystems' Java platform
and JavaScript. Krakatoa is designed for use by content publishers, allowing
them to provide rapid, intuitive access to complex or extensive information
over any TCP/IP network, including the World Wide Web and corporate
intranets. "CADIS is committed to pursuing Krakatoa development on the
JavaStation," said CADIS Chief Technology Officer Chris Beall. "Krakatoa's
compact client software and distributed architecture complement Java's
network-centric model, and make it an ideal solution for the new JavaStation.
The thin client is the way of the future."

  Krakatoa Version 2 is priced starting at $1,500 for a single knowledge base
containing up to 1,000 instances and five concurrent users. It is available
for Sun Solaris, HP-UX and NT servers, and Netscape-equivalent browsers.
Details can be obtained from the CADIS http://www.cadis.com or Krakatoa
http://www.krakatoa.com Web sites.

TSI TELSYS INTRODUCES RECONFIGURABLE SYSTEMS TECHNOLOGY

  Columbia, Md. -- TSI TelSys Inc. has introduced its new Reconfigurable
Systems Technology, designed to offer TSI TelSys' customers the speed and
performance of a direct hardware solution with the flexibility and ease of
use of an object oriented software environment. Traditionally, system
hardware functions are "hard wired" onto system board elements. "To change a
board element, whether adding a new function or correcting an error, a new
board must be designed and manufactured," said Jim Chesney, president of TSI
TelSys Incorporated.

  "In contrast, TSI TelSys' Reconfigurable Systems Technology includes a new
System Level Environment and the Virtual Information Processor (VIP) card,
that allows us to make changes to a card at the core logic level after it has
been manufactured and installed and without modifying the physical hardware,"
Chesney continued. "Manufacturers and Value Added Resellers can now combine
existing TSI TelSys hardware 'objects' and develop new ones to meet customer
requirements without the time and expense associated with hardware
manufacturing. Customers can make major logic changes to their own systems
after purchase, greatly extending the useful life of their equipment. You
might say that TSI TelSys has made obsolescence obsolete."

  Using the VIP card in their Gateway Systems -- devices that link satellite
networks to ground networks at high data rates -- TSI TelSys is able to
replace a number of special-purpose boards with several "instances" of a
single VIP card. The VIP card will be used in a November delivery to NASA's
Marshall Space Flight Center in support of the International Space Station
Program. This delivery consists of two Gateway Systems that support testing,
simulation, integration, and training activities within the Payload Data
Services System, at 75 Mbps. Charles Kozlowski, Director of Technology
Applications at TelSys, said, "The application of our Virtual Information
Processor (VIP) card allows TSI TelSys to provide a flexible solution to our
customer's requirements, in the shortest possible time frame." Further
information about TSI TelSys, including copies of press releases, may be
found through the TSI TelSys Internet Web site at http://www.tsi-telsys.com


Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Google Cloud Makes Good on Promise to Add Nvidia P100 GPUs

September 21, 2017

Google has taken down the notice on its cloud platform website that says Nvidia Tesla P100s are “coming soon.” That's because the search giant has announced the beta launch of the high-end P100 Nvidia Tesla GPUs on t Read more…

By George Leopold

Cray Wins $48M Supercomputer Contract from KISTI

September 21, 2017

It was a good day for Cray which won a $48 million contract from the Korea Institute of Science and Technology Information (KISTI) for a 128-rack CS500 cluster supercomputer. The new system, equipped with Intel Xeon Scal Read more…

By John Russell

Adolfy Hoisie to Lead Brookhaven’s Computing for National Security Effort

September 21, 2017

Brookhaven National Laboratory announced today that Adolfy Hoisie will chair its newly formed Computing for National Security department, which is part of Brookhaven’s new Computational Science Initiative (CSI). Read more…

By John Russell

HPE Extreme Performance Solutions

HPE Prepares Customers for Success with the HPC Software Portfolio

High performance computing (HPC) software is key to harnessing the full power of HPC environments. Development and management tools enable IT departments to streamline installation and maintenance of their systems as well as create, optimize, and run their HPC applications. Read more…

PNNL’s Center for Advanced Tech Evaluation Seeks Wider HPC Community Ties

September 21, 2017

Two years ago the Department of Energy established the Center for Advanced Technology Evaluation (CENATE) at Pacific Northwest National Laboratory (PNNL). CENATE’s ambitious mission was to be a proving ground for near- Read more…

By John Russell

Stanford University and UberCloud Achieve Breakthrough in Living Heart Simulations

September 21, 2017

Cardiac arrhythmia can be an undesirable and potentially lethal side effect of drugs. During this condition, the electrical activity of the heart turns chaotic, Read more…

By Wolfgang Gentzsch, UberCloud, and Francisco Sahli, Stanford University

PNNL’s Center for Advanced Tech Evaluation Seeks Wider HPC Community Ties

September 21, 2017

Two years ago the Department of Energy established the Center for Advanced Technology Evaluation (CENATE) at Pacific Northwest National Laboratory (PNNL). CENAT Read more…

By John Russell

Exascale Computing Project Names Doug Kothe as Director

September 20, 2017

The Department of Energy’s Exascale Computing Project (ECP) has named Doug Kothe as its new director effective October 1. He replaces Paul Messina, who is stepping down after two years to return to Argonne National Laboratory. Kothe is a 32-year veteran of DOE’s National Laboratory System. Read more…

Takeaways from the Milwaukee HPC User Forum

September 19, 2017

Milwaukee’s elegant Pfister Hotel hosted approximately 100 attendees for the 66th HPC User Forum (September 5-7, 2017). In the original home city of Pabst Blu Read more…

By Merle Giles

Kathy Yelick Charts the Promise and Progress of Exascale Science

September 15, 2017

On Friday, Sept. 8, Kathy Yelick of Lawrence Berkeley National Laboratory and the University of California, Berkeley, delivered the keynote address on “Breakthrough Science at the Exascale” at the ACM Europe Conference in Barcelona. In conjunction with her presentation, Yelick agreed to a short Q&A discussion with HPCwire. Read more…

By Tiffany Trader

DARPA Pledges Another $300 Million for Post-Moore’s Readiness

September 14, 2017

The Defense Advanced Research Projects Agency (DARPA) launched a giant funding effort to ensure the United States can sustain the pace of electronic innovation vital to both a flourishing economy and a secure military. Under the banner of the Electronics Resurgence Initiative (ERI), some $500-$800 million will be invested in post-Moore’s Law technologies. Read more…

By Tiffany Trader

IBM Breaks Ground for Complex Quantum Chemistry

September 14, 2017

IBM has reported the use of a novel algorithm to simulate BeH2 (beryllium-hydride) on a quantum computer. This is the largest molecule so far simulated on a quantum computer. The technique, which used six qubits of a seven-qubit system, is an important step forward and may suggest an approach to simulating ever larger molecules. Read more…

By John Russell

Cubes, Culture, and a New Challenge: Trish Damkroger Talks about Life at Intel—and Why HPC Matters More Than Ever

September 13, 2017

Trish Damkroger wasn’t looking to change jobs when she attended SC15 in Austin, Texas. Capping a 15-year career within Department of Energy (DOE) laboratories, she was acting Associate Director for Computation at Lawrence Livermore National Laboratory (LLNL). Her mission was to equip the lab’s scientists and research partners with resources that would advance their cutting-edge work... Read more…

By Jan Rowell

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

NERSC Scales Scientific Deep Learning to 15 Petaflops

August 28, 2017

A collaborative effort between Intel, NERSC and Stanford has delivered the first 15-petaflops deep learning software running on HPC platforms and is, according Read more…

By Rob Farber

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurrencies like Bitcoin, along with classified government communications and other sensitive digital transfers. Read more…

By Doug Black

Oracle Layoffs Reportedly Hit SPARC and Solaris Hard

September 7, 2017

Oracle’s latest layoffs have many wondering if this is the end of the line for the SPARC processor and Solaris OS development. As reported by multiple sources Read more…

By John Russell

Six Exascale PathForward Vendors Selected; DoE Providing $258M

June 15, 2017

The much-anticipated PathForward awards for hardware R&D in support of the Exascale Computing Project were announced today with six vendors selected – AMD Read more…

By John Russell

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

Top500 Results: Latest List Trends and What’s in Store

June 19, 2017

Greetings from Frankfurt and the 2017 International Supercomputing Conference where the latest Top500 list has just been revealed. Although there were no major Read more…

By Tiffany Trader

Leading Solution Providers

IBM Clears Path to 5nm with Silicon Nanosheets

June 5, 2017

Two years since announcing the industry’s first 7nm node test chip, IBM and its research alliance partners GlobalFoundries and Samsung have developed a proces Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in Read more…

By Tiffany Trader

Google Releases Deeplearn.js to Further Democratize Machine Learning

August 17, 2017

Spreading the use of machine learning tools is one of the goals of Google’s PAIR (People + AI Research) initiative, which was introduced in early July. Last w Read more…

By John Russell

EU Funds 20 Million Euro ARM+FPGA Exascale Project

September 7, 2017

At the Barcelona Supercomputer Centre on Wednesday (Sept. 6), 16 partners gathered to launch the EuroEXA project, which invests €20 million over three-and-a-half years into exascale-focused research and development. Led by the Horizon 2020 program, EuroEXA picks up the banner of a triad of partner projects — ExaNeSt, EcoScale and ExaNoDe — building on their work... Read more…

By Tiffany Trader

Amazon Debuts New AMD-based GPU Instances for Graphics Acceleration

September 12, 2017

Last week Amazon Web Services (AWS) streaming service, AppStream 2.0, introduced a new GPU instance called Graphics Design intended to accelerate graphics. The Read more…

By John Russell

Cray Moves to Acquire the Seagate ClusterStor Line

July 28, 2017

This week Cray announced that it is picking up Seagate's ClusterStor HPC storage array business for an undisclosed sum. "In short we're effectively transitioning the bulk of the ClusterStor product line to Cray," said CEO Peter Ungaro. Read more…

By Tiffany Trader

GlobalFoundries: 7nm Chips Coming in 2018, EUV in 2019

June 13, 2017

GlobalFoundries has formally announced that its 7nm technology is ready for customer engagement with product tape outs expected for the first half of 2018. The Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This