PACT Unveils The eXtreme Processor Platform

October 13, 2000

NEWS BRIEFS

San Jose, CALIF. — PACT Corporation, a fabless semiconductor and intellectual property company based in Munich, unveiled the eXtreme Processor Platform (XPP) for advanced, processing-intensive high-bandwidth applications. Based on an innovative architecture, the eXtreme Processor enables designers to easily use massively parallel processing to reach unprecedented performance and bandwidth levels.

The first eXtreme Processor, the XPU128, has demonstrated performance that is up to 50 times greater than conventional sequential processors and 20 times higher than digital signal processors (DSPs), which are basically sequential processors fine-tuned for signal processing. The first XPP device achieves sustainable peak performance in excess of 50 Giga Operations per second (GigaOps), making it the world’s most powerful 32-bit processor. “The XPP can be an enabler for a number of new digital signal processing (DSP) applications that were not practical until now. For example, it will likely be a serious market contender for the next generation of base station smart antennas, an application that many feel will explode with the emergence of third-generation cellular,” said Will Strauss, president of Forward Concepts, a market research firm in Tempe, Arizona. “But PACT’s XPP is not limited to the DSP market, since it is a new class of processing engine with unrivaled computing performance that is ideally suited for many other computing-intensive applications, as well.”

The scalable architecture of the XPP enables broad applicability to a wide range of applications. For applications where cost or power consumption is paramount, PACT provides intellectual property (IP) cores that are easily integrated into standard cell and system-on-a-chip devices. XPP IP cores are ideal for the next generation of multifunctional high bandwidth devices, including Internet appliances, PDAs, and mobile telephones for which extreme processing power enables higher levels of functionality and enhanced user interfaces.

For applications that require maximum processing power, PACT supplies eXtreme Processing Unit (XPU) devices. XPP components are targeted at midrange applications such as 3G cellular base stations and voice over IP (VoIP), where they help deliver higher call quality and the ability to handle a much larger number of calls than previously thought to be possible. In addition, cascaded arrays of XPU devices supply the processing performance and bandwidth demanded for extreme applications such as the next generation of supercomputers.

Conventional processors, such as RISC or CISC, use a sequential model to process data. These processors store operands in registers and fetch instructions from memory; then move the operands into the processing unit where the processor performs calculations; and then send results into another register. This model is efficient for sequential applications where different operations are applied to each data word.

However, the sequential model is very inefficient for high-speed broadband applications such as mobile communications, which apply the same algorithm to each data word in a multi-channel data stream. The processor overhead – the process of moving each word into a central processing unit, fetching an instruction, and moving the word to a result register – creates a huge bottleneck that severely limits system performance and bandwidth.

To break the bottleneck, XPP’s reconfigurable parallel data flow processor sends high-speed data streams through an array of processing elements at full speed. The processor performs calculations during each clock cycle. The results then flow to the next processing element. This process continues until all calculations specified in the algorithm have been completed and all of the processed data has flowed out of the XPP.

In addition to raw broadband processing power, the XPP platform offers design methodologies that enable designers to easily and efficiently use high bandwidth parallel processing. A major breakthrough implemented in the XPP platform is the Wave Reconfiguration technology that transparently configures processing elements as data flows through the array.

PACT’s Wave Reconfiguration model is ideal for emerging multi-service broadband networks that use packetized data to support voice, audio and video. For example, if the first packet flowing through the network contains voice data, the XPP is configured for the voice-processing algorithm. The voice packet streams through the array and is processed at full speed. As the next packet enters the array, a token attached to the front of the packet identifies it as a video packet. This token rides just in front of the wave of video data and triggers reconfiguration of each processing element one clock cycle before the data arrives. The result is a wave of reconfiguration that programs the processing elements with the video algorithm at precisely the right time as data flows through the array.

Wave Reconfiguration allows programmers to easily make tradeoffs between performance and density and to minimize power consumption. For example, conditional branch execution can be implemented by programming each branch into the array for maximum speed or using Wave Reconfiguration to configure processing elements as branch evaluations are completed.

For the control portion of applications, Wave Reconfiguration enables the XPP to instantly configure resources to efficiently process sequential operations eliminating the need for a separate sequential processor. For power sensitive applications, Wave Reconfiguration turns off clocks for unconfigured elements and processing elements dynamically power themselves down when data streams are not active.

The XPP contains many additional features that free the designer from chip-level details and make it simple to use. Automatic DataFlow Synchronization ensures that all data inputs are valid before nodes are calculated eliminating the need for lengthy timing verification and optimization. A configurable internal event network enables control of program flow using flags like conventional processors.

The XPP uses a flow-graph style design methodology familiar to microprocessor and DSP design engineers. PACT’s Native Mapping Language (NML) allows users to easily express arithmetic constructs targeted to XPP processing elements. Tools that enable even higher levels of abstraction are in development including C compilers and a flow-graph style language called LELA, developed for PACT by Professor Niklaus Wirth, the inventor of PASCAL.

PACT’s first device, the XPU128, contains an array of 128 parallel processing elements implemented in advanced reprogrammable technology. Each element performs high-speed, 32-bit signed and unsigned operations that execute in a single clock cycle.

The XPU128’s I/O are organized into eight modules, each containing dual 32-bit high-bandwidth channels. The device contains 32 independent 1K-byte embedded SRAMs for high-speed access to source data, destination data, and look-up table contents. These internal SRAMs can be configured as FIFO buffers to support burst-oriented applications. Multiple interfaces to external RAMs provide high distributed memory bandwidth.

A point-to-point internal terabit dataflow network connects XPU resources without the bottlenecks of a bus-oriented architecture. This network makes one-to-many and many-to-one connections between neighboring or distant XPU resources anywhere on the device. A separate second configurable event network transports control flow information. And a third network provides transparent and background reconfiguration capabilities for not only the processing elements, but also for the array’s interconnect. The XPU128 offers high levels of processing power and bandwidth:

— 51.2 GigaOps (32-bit)

— 12.8 GigaMACs (32-bit)

— 3.2 Gigabyte/s external memory bandwidth

— 12.8 Gigabyte/s internal memory bandwidth

— 6.4 Gigabyte/s sustained I/O bandwidth

— 0.4 Terabyte/s internal data bandwidth

The XPU’s modular and truly scalable architecture enables its performance to scale much more efficiently than conventional processors. PACT’s product roadmaps show devices with over 400 GigaOps per second in 2002 and over the PetaOps (1,000,000 GigaOps) level within the next decade.

“Vendors of classical processors rely primarily on higher clock frequencies to achieve incremental performance gains,” said Martin Vorbach, PACT’s co-founder, chief technology officer and the inventor of the XPP. “XPP achieves a second dimension of performance gains by scaling not only with clock frequency, but also with the number of processing elements. Utilizing advanced process technology, we can soon put over 1000 processing elements on a single chip.”

XPP intellectual property cores and PACT’s development system with NML are available for license today. The LELA programming language will be available in Q1 2001. XPU128 devices will be available in production quantities in Q1 2001.

PACT is a fabless semiconductor and intellectual property vendor developing extreme performance processor platforms. The company’s patented breakthrough technology results in a new class of processor, which delivers extreme bandwidth and processing performance for a wide range of applications including portable communication devices, next generation base stations and supercomputers. The company was founded by Marcel Kreutler and Martin Vorbach in Germany in 1996. PACT’s eXtreme Processor Platform, XPP is covered by over 20 international patents in both processor architecture and reconfigurability. PACT currently has offices in Munich, San Jose, New York, Atlanta and Tokyo. The company can be reached at http://www.pactcorp.com .

============================================================

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Discovering Alternative Solar Panel Materials with Supercomputing

May 23, 2020

Solar power is quickly growing in the world’s energy mix, but silicon – a crucial material in the construction of photovoltaic solar panels – remains expensive, hindering solar’s expansion and competitiveness wit Read more…

By Oliver Peckham

Nvidia Q1 Earnings Top Expectations, Datacenter Revenue Breaks $1B

May 22, 2020

Nvidia’s seemingly endless roll continued in the first quarter with the company announcing blockbuster earnings that exceeded Wall Street expectations. Nvidia said revenues for the period ended April 26 were up 39 perc Read more…

By Doug Black

TACC Supercomputers Delve into COVID-19’s Spike Protein

May 22, 2020

If you’ve been following COVID-19 research, by now, you’ve probably heard of the spike protein (or S-protein). The spike protein – which gives COVID-19 its namesake crown-like shape – is the virus’ crowbar into Read more…

By Oliver Peckham

Using HPC, Researchers Discover How Easily Hurricanes Form

May 21, 2020

Hurricane formation has long remained shrouded in mystery, with meteorologists unable to discern exactly what forces cause the devastating storms (also known as tropical cyclones) to materialize. Now, researchers at Flor Read more…

By Oliver Peckham

Lab Behind the Record-Setting GPU ‘Cloud Burst’ Joins [email protected]’s COVID-19 Effort

May 20, 2020

Last November, the Wisconsin IceCube Particle Astrophysics Center (WIPAC) set out to break some records with a moonshot project: over a couple of hours, they bought time on as many cloud GPUS as they could – 51,000 – Read more…

By Staff report

AWS Solution Channel

Computational Fluid Dynamics on AWS

Over the past 30 years Computational Fluid Dynamics (CFD) has grown to become a key part of many engineering design processes. From aircraft design to modelling the blood flow in our bodies, the ability to understand the behaviour of fluids has enabled countless innovations and improved the time to market for many products. Read more…

HPC in Life Sciences 2020 Part 1: Rise of AMD, Data Management’s Wild West, More 

May 20, 2020

Given the disruption caused by the COVID-19 pandemic and the massive enlistment of major HPC resources to fight the pandemic, it is especially appropriate to review the state of HPC use in life sciences. This is somethin Read more…

By John Russell

HPC in Life Sciences 2020 Part 1: Rise of AMD, Data Management’s Wild West, More 

May 20, 2020

Given the disruption caused by the COVID-19 pandemic and the massive enlistment of major HPC resources to fight the pandemic, it is especially appropriate to re Read more…

By John Russell

Microsoft’s Massive AI Supercomputer on Azure: 285k CPU Cores, 10k GPUs

May 20, 2020

Microsoft has unveiled a supercomputing monster – among the world’s five most powerful, according to the company – aimed at what is known in scientific an Read more…

By Doug Black

AMD Epyc Rome Picked for New Nvidia DGX, but HGX Preserves Intel Option

May 19, 2020

AMD continues to make inroads into the datacenter with its second-generation Epyc "Rome" processor, which last week scored a win with Nvidia's announcement that Read more…

By Tiffany Trader

Hacking Streak Forces European Supercomputers Offline in Midst of COVID-19 Research Effort

May 18, 2020

This week, a number of European supercomputers discovered intrusive malware hosted on their systems. Now, in the midst of a massive supercomputing research effo Read more…

By Oliver Peckham

Nvidia’s Ampere A100 GPU: Up to 2.5X the HPC, 20X the AI

May 14, 2020

Nvidia's first Ampere-based graphics card, the A100 GPU, packs a whopping 54 billion transistors on 826mm2 of silicon, making it the world's largest seven-nanom Read more…

By Tiffany Trader

Wafer-Scale Engine AI Supercomputer Is Fighting COVID-19

May 13, 2020

Seemingly every supercomputer in the world is allied in the fight against the coronavirus pandemic – but not many of them are fresh out of the box. Cerebras S Read more…

By Oliver Peckham

Startup MemVerge on Memory-centric Mission

May 12, 2020

Memory situated at the center of the computing universe, replacing processing, has long been envisioned as instrumental to radically improved datacenter systems Read more…

By Doug Black

In Australia, HPC Illuminates the Early Universe

May 11, 2020

Many billions of years ago, the universe was a swirling pool of gas. Unraveling the story of how we got from there to here isn’t an easy task, with many simul Read more…

By Oliver Peckham

Supercomputer Modeling Tests How COVID-19 Spreads in Grocery Stores

April 8, 2020

In the COVID-19 era, many people are treating simple activities like getting gas or groceries with caution as they try to heed social distancing mandates and protect their own health. Still, significant uncertainty surrounds the relative risk of different activities, and conflicting information is prevalent. A team of Finnish researchers set out to address some of these uncertainties by... Read more…

By Oliver Peckham

[email protected] Turns Its Massive Crowdsourced Computer Network Against COVID-19

March 16, 2020

For gamers, fighting against a global crisis is usually pure fantasy – but now, it’s looking more like a reality. As supercomputers around the world spin up Read more…

By Oliver Peckham

[email protected] Rallies a Legion of Computers Against the Coronavirus

March 24, 2020

Last week, we highlighted [email protected], a massive, crowdsourced computer network that has turned its resources against the coronavirus pandemic sweeping the globe – but [email protected] isn’t the only game in town. The internet is buzzing with crowdsourced computing... Read more…

By Oliver Peckham

Global Supercomputing Is Mobilizing Against COVID-19

March 12, 2020

Tech has been taking some heavy losses from the coronavirus pandemic. Global supply chains have been disrupted, virtually every major tech conference taking place over the next few months has been canceled... Read more…

By Oliver Peckham

DoE Expands on Role of COVID-19 Supercomputing Consortium

March 25, 2020

After announcing the launch of the COVID-19 High Performance Computing Consortium on Sunday, the Department of Energy yesterday provided more details on its sco Read more…

By John Russell

Steve Scott Lays Out HPE-Cray Blended Product Roadmap

March 11, 2020

Last week, the day before the El Capitan processor disclosures were made at HPE's new headquarters in San Jose, Steve Scott (CTO for HPC & AI at HPE, and former Cray CTO) was on-hand at the Rice Oil & Gas HPC conference in Houston. He was there to discuss the HPE-Cray transition and blended roadmap, as well as his favorite topic, Cray's eighth-gen networking technology, Slingshot. Read more…

By Tiffany Trader

Honeywell’s Big Bet on Trapped Ion Quantum Computing

April 7, 2020

Honeywell doesn’t spring to mind when thinking of quantum computing pioneers, but a decade ago the high-tech conglomerate better known for its control systems waded deliberately into the then calmer quantum computing (QC) waters. Fast forward to March when Honeywell announced plans to introduce an ion trap-based quantum computer whose ‘performance’ would... Read more…

By John Russell

Fujitsu A64FX Supercomputer to Be Deployed at Nagoya University This Summer

February 3, 2020

Japanese tech giant Fujitsu announced today that it will supply Nagoya University Information Technology Center with the first commercial supercomputer powered Read more…

By Tiffany Trader

Leading Solution Providers

SC 2019 Virtual Booth Video Tour

AMD
AMD
ASROCK RACK
ASROCK RACK
AWS
AWS
CEJN
CJEN
CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
IBM
IBM
MELLANOX
MELLANOX
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
SIX NINES IT
SIX NINES IT
VERNE GLOBAL
VERNE GLOBAL
WEKAIO
WEKAIO

Tech Conferences Are Being Canceled Due to Coronavirus

March 3, 2020

Several conferences scheduled to take place in the coming weeks, including Nvidia’s GPU Technology Conference (GTC) and the Strata Data + AI conference, have Read more…

By Alex Woodie

Exascale Watch: El Capitan Will Use AMD CPUs & GPUs to Reach 2 Exaflops

March 4, 2020

HPE and its collaborators reported today that El Capitan, the forthcoming exascale supercomputer to be sited at Lawrence Livermore National Laboratory and serve Read more…

By John Russell

‘Billion Molecules Against COVID-19’ Challenge to Launch with Massive Supercomputing Support

April 22, 2020

Around the world, supercomputing centers have spun up and opened their doors for COVID-19 research in what may be the most unified supercomputing effort in hist Read more…

By Oliver Peckham

Cray to Provide NOAA with Two AMD-Powered Supercomputers

February 24, 2020

The United States’ National Oceanic and Atmospheric Administration (NOAA) last week announced plans for a major refresh of its operational weather forecasting supercomputers, part of a 10-year, $505.2 million program, which will secure two HPE-Cray systems for NOAA’s National Weather Service to be fielded later this year and put into production in early 2022. Read more…

By Tiffany Trader

Summit Supercomputer is Already Making its Mark on Science

September 20, 2018

Summit, now the fastest supercomputer in the world, is quickly making its mark in science – five of the six finalists just announced for the prestigious 2018 Read more…

By John Russell

15 Slides on Programming Aurora and Exascale Systems

May 7, 2020

Sometime in 2021, Aurora, the first planned U.S. exascale system, is scheduled to be fired up at Argonne National Laboratory. Cray (now HPE) and Intel are the k Read more…

By John Russell

TACC Supercomputers Run Simulations Illuminating COVID-19, DNA Replication

March 19, 2020

As supercomputers around the world spin up to combat the coronavirus, the Texas Advanced Computing Center (TACC) is announcing results that may help to illumina Read more…

By Staff report

Nvidia’s Ampere A100 GPU: Up to 2.5X the HPC, 20X the AI

May 14, 2020

Nvidia's first Ampere-based graphics card, the A100 GPU, packs a whopping 54 billion transistors on 826mm2 of silicon, making it the world's largest seven-nanom Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This