PETAFLOPS IN 2009: AN INTERVIEW WITH STEVE WALLACH

November 7, 2000

by Alan Beck, editor in chief LIVEwire

Dallas, Texas — SC2000’s keynote address was given by Steven J. Wallach. Wallach co-founded Convex Computer Corporation, along with Robert J. Paluck, former chairman and CEO, in 1982 and was the chief designer of the Convex C-Series, the world’s first affordable supercomputer, as well as the Exemplar Scalable Parallel Processor (SPP), HP/Convex.

Wallach is currently an advisor to CenterPoint ( http://www.centerpointvp.com ) Venture Partners, Dallas, Texas and Vice President of Technology of Chiaro Networks ( http://www.chiaro.com ), Richardson, Texas. He may be best known outside HPCN circles as the Data General engineer who was the principal architect of the 32-bit Eclipse MV superminicomputer series as described by Pulitzer Prize winner Tracy Kidder in The Soul of A New Machine.

Wallach holds 33 patents in various areas of computer design and held a joint appointment in the Graduate School of Management and Brown School of Engineering, Computer Science, Rice University for the 1998 and 1999 academic years. He is a member of the PITAC (Presidential Advisory Board on High Performance Computing, Communications, and Networking) and the advisory committee for the Hybrid Technology MultiThreaded Architecture (HTMT) a US DOD funded project to develop the concepts for a PETAFLOP computer. He is also a member of the National Academy of Engineering.

HPCwire interviewed Wallach to explore some of his current perspectives on the state of high performance computing:

HPCwire: Your SC2000 keynote is entitled “Petaflops in the Year 2009”. Is this realistic? What are the principal challenges HPC must meet to effect this goal?

WALLACH: This goal is more than realistic. One can make an argument that a petaflop computer system exists today, it is call the Web. It has been well documented how 1000’s of computers, distributed throughout the world, have been used to solve embarrassingly parallel applications. If we can apply 1,000,000 networked pc/workstations, we get a petaflop computer. Entropia is a example of an effort that is attempting to do this.

What my keynote address discusses is how to make a petaflop computer that is more general purpose (an oxymoron perhaps?), and that is located on one location (that also has to be re-examined). Much of the technology that is used and developed for GRID computing today will be used for the petaflop computer that I will describe.

The principal challenges have not really changed much in the last 10 years. We will need advances in: software; including compilers, OS, development environments, and the interconnect/memory system. Every time a new generation of processor is developed, with its own unique internal architecture, we stress the existing development and algorithmic environment.

We must also rethink the way we do storage. Petaflops of computing implies Petabytes of storage. I believe that architectures developed for web based and commercial storage systems will become the leading edge architectures for technical computing.

HPCwire: After pioneering supercomputing technology, you are now closely involved with both CenterPoint Venture Partners and Chiaro Networks. What do you hope to accomplish through these corporate efforts?

WALLACH: Well, I guess I am still an engineer at heart. I like to make things happen and like to ship product. The more disruptive the technology the happier I am. Today, that generally means doing things in a startup. So whether that means helping companies get started or directly getting involved in day to day operations. In fact, one can make an argument, that major companies throughout the world relay on startups for their new technology. As near as I can tell, all major technology companies have a venture capital group. These internal venture groups look for companies that have technologies that are strategic to the corporate mission. Intel Capital is perhaps the best example of these phenomena.

I recently gave some testimony before a US Senate Committee. This was to support upcoming NSF appropriations. One of the speakers, from the NSF, referred to one of their missions as “The Venture Capitalist of the first degree”. Meaning that government “invests” in research without a consideration of a financial return on investment, but a research return. I agree with this perspective.

When doing due diligence on companies seeking funding, it is fun to perform design reviews and/or make suggestions for improvement. Too many potential founders, try to impress venture capitalists with spread sheets, etc; in my book a spreadsheet is a random number generator. Also, with the CenterPoint and Sevin-Rosen funds, we have a keiretsu type of organization. In many cases, startups in the family help each other, when and where appropriate.

Personally, I am on the technical board of advisors of two startup companies; Chorum Technology (optical components) and Scale8 (Petabyte storage systems), and help out with some others.

HPCwire: As a member of the Presidential Advisory Board on High Performance Computing, Communications, and Networking you are in a unique position to observe the impact of policy and politics on HPC. How would you characterize your experiences in this arena? Are there frustrations and/or satisfactions that you find particularly noteworthy?

WALLACH: There are both; frustrations and satisfactions. The frustrations are the level of politics and what has to be “politically correct”. I will not go further, but Washington is Washington and politics is politics.

The satisfactions more then outweigh the frustrations. Helping our country by helping the members of the various branches of the government understand the importance of high performance computing. The one major recommendation of PITAC was that the US totally under spends for long-term basic research. Today; most of the research is for applied research. Long term basic research funding is needed to help solve the problems and develop the technologies that are needed 10 to 20 years from now. That is difficult to convince someone, who, perhaps only has a 4 to 6 year view. But we must increase funding levels for long-term basic research.

There are two aspects of high performance computing that are very important. One is for national security reasons. The ASCI program is a prime example of this. The other is the trickle down effect that high performance computing has on more commonplace applications. The extensive use of clusters and SMP’s for various web-based services would not have been made possible without the technology that was developed for high performance computing. Unfortunately this is not well understood nor appreciated.

HPCwire: When HPCwire interviewed you in 1997, you noted that knotty programming problems, often focused on algorithms and legacy code, were responsible for stymieing much Progress in HPC. Has this changed? How? Have architectures like Tera’s MTA changed the picture significantly?

WALLACH: No, not really. Legacy codes still prevail in the technical fields. The newest codes are web centric and are generally written in java. But they are rarely numerically intensive. Every time a new processor or system architecture is developed, the code generator and machine dependent optimizers have to be redone. And in many cases, application tuning is needed. I am convinced that this is becoming, if not already, an art and not a science. At Convex, I use to say that benchmarking and tuning a system is really a benchmarking and tuning test of your analyst.

Tera’s MTA is a significant advance in computer architecture. But to fully utilize its capabilities you still need to tune your algorithms and your code.

HPCwire: With the new century, a new generation of computer scientists is taking the reins of HPC development. What advice would you like to give them?

WALLACH: Try to start out with a clean sheet of paper. Also recognize that the biggest market for high performance computer and scalable parallel processors are the web centric servers. Applications like database, web hosting, storage for petabytes of data and media files, will dominate. And then incorporate numerical intensive features. The new generation also has to be more network and grid centric.

From a language perspective, we will continue to evolve FORTRAN, C, and JAVA. It appears that every 10 to 15 years or so, a new language is accepted, not by industry or government edict, but by a community ground swell. That is what happened with C and JAVA. So someone in the next 10 years or so will probably develop a new paradigm for software development that will be accepted. I have no idea what this will look like, but it will surely happen.

============================================================

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

At SC19: What Is UrgentHPC and Why Is It Needed?

November 14, 2019

The UrgentHPC workshop, taking place Sunday (Nov. 17) at SC19, is focused on using HPC and real-time data for urgent decision making in response to disasters such as wildfires, flooding, health emergencies, and accidents. We chat with organizer Nick Brown, research fellow at EPCC, University of Edinburgh, to learn more. Read more…

By Tiffany Trader

China’s Tencent Server Design Will Use AMD Rome

November 13, 2019

Tencent, the Chinese cloud giant, said it would use AMD’s newest Epyc processor in its internally-designed server. The design win adds further momentum to AMD’s bid to erode rival Intel Corp.’s dominance of the glo Read more…

By George Leopold

NCSA Industry Conference Recap – Part 1

November 13, 2019

Industry Program Director Brendan McGinty welcomed guests to the annual National Center for Supercomputing Applications (NCSA) Industry Conference, October 8-10, on the University of Illinois campus in Urbana (UIUC). One hundred seventy from 40 organizations attended the invitation-only, two-day event. Read more…

By Elizabeth Leake, STEM-Trek

Cray, Fujitsu Both Bringing Fujitsu A64FX-based Supercomputers to Market in 2020

November 12, 2019

The number of top-tier HPC systems makers has shrunk due to a steady march of M&A activity, but there is increased diversity and choice of processing components with Intel Xeon, AMD Epyc, IBM Power, and Arm server ch Read more…

By Tiffany Trader

Intel AI Summit: New ‘Keem Bay’ Edge VPU, AI Product Roadmap

November 12, 2019

At its AI Summit today in San Francisco, Intel touted a raft of AI training and inference hardware for deployments ranging from cloud to edge and designed to support organizations at various points of their AI journeys. The company revealed its Movidius Myriad Vision Processing Unit (VPU)... Read more…

By Doug Black

AWS Solution Channel

Making High Performance Computing Affordable and Accessible for Small and Medium Businesses with HPC on AWS

High performance computing (HPC) brings a powerful set of tools to a broad range of industries, helping to drive innovation and boost revenue in finance, genomics, oil and gas extraction, and other fields. Read more…

IBM Accelerated Insights

Help HPC Work Smarter and Accelerate Time to Insight

 

[Attend the IBM LSF & HPC User Group Meeting at SC19 in Denver on November 19]

To recklessly misquote Jane Austen, it is a truth, universally acknowledged, that a company in possession of a highly complex problem must be in want of a massive technical computing cluster. Read more…

SIA Recognizes Robert Dennard with 2019 Noyce Award

November 12, 2019

If you don’t know what Dennard Scaling is, the chances are strong you don’t labor in electronics. Robert Dennard, longtime IBM researcher, inventor of the DRAM and the fellow for whom Dennard Scaling was named, is th Read more…

By John Russell

Cray, Fujitsu Both Bringing Fujitsu A64FX-based Supercomputers to Market in 2020

November 12, 2019

The number of top-tier HPC systems makers has shrunk due to a steady march of M&A activity, but there is increased diversity and choice of processing compon Read more…

By Tiffany Trader

Intel AI Summit: New ‘Keem Bay’ Edge VPU, AI Product Roadmap

November 12, 2019

At its AI Summit today in San Francisco, Intel touted a raft of AI training and inference hardware for deployments ranging from cloud to edge and designed to support organizations at various points of their AI journeys. The company revealed its Movidius Myriad Vision Processing Unit (VPU)... Read more…

By Doug Black

IBM Adds Support for Ion Trap Quantum Technology to Qiskit

November 11, 2019

After years of percolating in the shadow of quantum computing research based on superconducting semiconductors – think IBM, Rigetti, Google, and D-Wave (quant Read more…

By John Russell

Tackling HPC’s Memory and I/O Bottlenecks with On-Node, Non-Volatile RAM

November 8, 2019

On-node, non-volatile memory (NVRAM) is a game-changing technology that can remove many I/O and memory bottlenecks and provide a key enabler for exascale. That’s the conclusion drawn by the scientists and researchers of Europe’s NEXTGenIO project, an initiative funded by the European Commission’s Horizon 2020 program to explore this new... Read more…

By Jan Rowell

MLPerf Releases First Inference Benchmark Results; Nvidia Touts its Showing

November 6, 2019

MLPerf.org, the young AI-benchmarking consortium, today issued the first round of results for its inference test suite. Among organizations with submissions wer Read more…

By John Russell

Azure Cloud First with AMD Epyc Rome Processors

November 6, 2019

At Ignite 2019 this week, Microsoft's Azure cloud team and AMD announced an expansion of their partnership that began in 2017 when Azure debuted Epyc-backed instances for storage workloads. The fourth-generation Azure D-series and E-series virtual machines previewed at the Rome launch in August are now generally available. Read more…

By Tiffany Trader

Nvidia Launches Credit Card-Sized 21 TOPS Jetson System for Edge Devices

November 6, 2019

Nvidia has launched a new addition to its Jetson product line: a credit card-sized (70x45mm) form factor delivering up to 21 trillion operations/second (TOPS) o Read more…

By Doug Black

In Memoriam: Steve Tuecke, Globus Co-founder

November 4, 2019

HPCwire is deeply saddened to report that Steve Tuecke, longtime scientist at Argonne National Lab and University of Chicago, has passed away at age 52. Tuecke Read more…

By Tiffany Trader

Supercomputer-Powered AI Tackles a Key Fusion Energy Challenge

August 7, 2019

Fusion energy is the Holy Grail of the energy world: low-radioactivity, low-waste, zero-carbon, high-output nuclear power that can run on hydrogen or lithium. T Read more…

By Oliver Peckham

Using AI to Solve One of the Most Prevailing Problems in CFD

October 17, 2019

How can artificial intelligence (AI) and high-performance computing (HPC) solve mesh generation, one of the most commonly referenced problems in computational engineering? A new study has set out to answer this question and create an industry-first AI-mesh application... Read more…

By James Sharpe

Cray Wins NNSA-Livermore ‘El Capitan’ Exascale Contract

August 13, 2019

Cray has won the bid to build the first exascale supercomputer for the National Nuclear Security Administration (NNSA) and Lawrence Livermore National Laborator Read more…

By Tiffany Trader

DARPA Looks to Propel Parallelism

September 4, 2019

As Moore’s law runs out of steam, new programming approaches are being pursued with the goal of greater hardware performance with less coding. The Defense Advanced Projects Research Agency is launching a new programming effort aimed at leveraging the benefits of massive distributed parallelism with less sweat. Read more…

By George Leopold

AMD Launches Epyc Rome, First 7nm CPU

August 8, 2019

From a gala event at the Palace of Fine Arts in San Francisco yesterday (Aug. 7), AMD launched its second-generation Epyc Rome x86 chips, based on its 7nm proce Read more…

By Tiffany Trader

D-Wave’s Path to 5000 Qubits; Google’s Quantum Supremacy Claim

September 24, 2019

On the heels of IBM’s quantum news last week come two more quantum items. D-Wave Systems today announced the name of its forthcoming 5000-qubit system, Advantage (yes the name choice isn’t serendipity), at its user conference being held this week in Newport, RI. Read more…

By John Russell

Ayar Labs to Demo Photonics Chiplet in FPGA Package at Hot Chips

August 19, 2019

Silicon startup Ayar Labs continues to gain momentum with its DARPA-backed optical chiplet technology that puts advanced electronics and optics on the same chip Read more…

By Tiffany Trader

Crystal Ball Gazing: IBM’s Vision for the Future of Computing

October 14, 2019

Dario Gil, IBM’s relatively new director of research, painted a intriguing portrait of the future of computing along with a rough idea of how IBM thinks we’ Read more…

By John Russell

Leading Solution Providers

ISC 2019 Virtual Booth Video Tour

CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
GOOGLE
GOOGLE
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
VERNE GLOBAL
VERNE GLOBAL

Intel Confirms Retreat on Omni-Path

August 1, 2019

Intel Corp.’s plans to make a big splash in the network fabric market for linking HPC and other workloads has apparently belly-flopped. The chipmaker confirmed to us the outlines of an earlier report by the website CRN that it has jettisoned plans for a second-generation version of its Omni-Path interconnect... Read more…

By Staff report

Kubernetes, Containers and HPC

September 19, 2019

Software containers and Kubernetes are important tools for building, deploying, running and managing modern enterprise applications at scale and delivering enterprise software faster and more reliably to the end user — while using resources more efficiently and reducing costs. Read more…

By Daniel Gruber, Burak Yenier and Wolfgang Gentzsch, UberCloud

Dell Ramps Up HPC Testing of AMD Rome Processors

October 21, 2019

Dell Technologies is wading deeper into the AMD-based systems market with a growing evaluation program for the latest Epyc (Rome) microprocessors from AMD. In a Read more…

By John Russell

Rise of NIH’s Biowulf Mirrors the Rise of Computational Biology

July 29, 2019

The story of NIH’s supercomputer Biowulf is fascinating, important, and in many ways representative of the transformation of life sciences and biomedical res Read more…

By John Russell

Xilinx vs. Intel: FPGA Market Leaders Launch Server Accelerator Cards

August 6, 2019

The two FPGA market leaders, Intel and Xilinx, both announced new accelerator cards this week designed to handle specialized, compute-intensive workloads and un Read more…

By Doug Black

When Dense Matrix Representations Beat Sparse

September 9, 2019

In our world filled with unintended consequences, it turns out that saving memory space to help deal with GPU limitations, knowing it introduces performance pen Read more…

By James Reinders

With the Help of HPC, Astronomers Prepare to Deflect a Real Asteroid

September 26, 2019

For years, NASA has been running simulations of asteroid impacts to understand the risks (and likelihoods) of asteroids colliding with Earth. Now, NASA and the European Space Agency (ESA) are preparing for the next, crucial step in planetary defense against asteroid impacts: physically deflecting a real asteroid. Read more…

By Oliver Peckham

Cerebras to Supply DOE with Wafer-Scale AI Supercomputing Technology

September 17, 2019

Cerebras Systems, which debuted its wafer-scale AI silicon at Hot Chips last month, has entered into a multi-year partnership with Argonne National Laboratory and Lawrence Livermore National Laboratory as part of a larger collaboration with the U.S. Department of Energy... Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This