IBM UNWRAPS ADVANCED CHIP-MAKING TECHNOLOGY

December 15, 2000

SCIENCE & ENGINEERING NEWS

East Fishkill, N.Y. — IBM announced it has launched production of powerful new microchips for servers, communications gear and pervasive computing products, using the most advanced chip-making technology ever developed.

The new technology, named CMOS 9S, unites – for the first time – IBM innovations in copper wiring, silicon-on-insulator (SOI) transistors and improved, “low-k dielectric” insulation to build chip circuits as small as 0.13 microns, or nearly 800 times thinner than a human hair. The smaller circuitry and improved materials can pack more processing power on a single chip, helping electronic products from computers to cell phones support new, performance-hungry applications like speech recognition, fingerprint authentication and wireless video.

A variety of chips are already in pilot production using IBM’s new manufacturing technique, with first customer shipments planned for early 2001.

“Our new chip-making recipe integrates more complex, high-performance ingredients onto a chip than ever before,” said Bijan Davari, IBM Fellow and vice president of technology and emerging products for IBM. “This unique technology can help meet exploding customer demand for higher performance, higher function products. The integration of SOI, copper and low-k insulation offers a powerful combination of technologies which maintains our two to three-year technological lead.”

CMOS 9S is optimized to manufacture complex chips containing hundreds of millions of high-speed transistors and miles of microscopic copper wiring. The technology features the smallest SRAM memory cell in production at 2.16 square microns, which allows for more high-performance memory to be placed directly onto a chip, resulting in faster, more efficient processors.

CMOS 9S is the only 0.13-micron technology to take advantage of the performance benefits of SOI, which dramatically improves transistor performance – up to 35% – by providing an insulating layer in the silicon base of a chip, thereby isolating the transistor and improving the flow of electrical current to the chip’s circuitry.

When combined with up to nine layers of copper wiring, available only in IBM’s CMOS 9S, SOI can be used to meet higher performance and/or lower power requirements required by 0.13-micron chip designs. By boosting chip performance and reducing chip power requirements, SOI is critical for chips that will power a wide range of products, such as Internet servers or wireless communications gear.

CMOS 9S also uses another IBM chip-making breakthrough – “low-k dielectric” insulation – to meticulously shield millions of individual copper circuits on a chip, reducing electrical interference between wires that can hinder chip performance and waste power. IBM was the first semiconductor manufacturer to perfect a technique for building chips with a true low-k dielectric material which better insulates copper wiring, helping electronic signals move faster and more efficiently through a chip.

IBM is producing chips using the new CMOS 9S process on a pilot production line in its Semiconductor Research and Development Center in East Fishkill, NY and intends to introduce the technology on its high-volume Burlington, VT, manufacturing lines early in 2001. This new manufacturing technique will be used to produce future generations of the IBM POWER4 processor, which will ship in a next-generation IBM eServer, code named “Regatta,” next year.

IBM Microelectronics is a key contributor to IBM’s role as the world’s premier information technology supplier. IBM Microelectronics develops, manufactures and markets state-of-the-art semiconductor and interconnect technologies, products and services. Its superior integrated solutions can be found in many of the world’s best-known electronic brands. More information about IBM Microelectronics can be found at http://www.chips.ibm.com .

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