Driving Nanoscale Microelectronics Production

By Nicole Hemsoth

July 21, 2006

MEDEA+ partners are involved in the development of the basic fabrication techniques required for integrated circuits (ICs) to meet the demands for ever smaller electronic systems — from domestic multimedia equipment and effective automotive electronics, through improved medical diagnostic devices to digital cameras and mobile phones. This collaboration between chipmakers, equipment suppliers, research institutes and academia is helping to ensure Europe maintains its global position in microelectronics — enabling European companies to develop a wide range of new equipment. Moreover, receiving the EUREKA label has been significant in bringing these projects to market faster.

Silicon wafer-based complementary metal oxide semiconductor (CMOS) technology dominates IC manufacture. Its energy efficiency will continue to make it the technology of choice over the next decade for fabrication of microprocessor and memory chips, as well as for application-specific ICs (ASICs) and complete systems-on-chip (SoCs) devices.

The size of the smallest electronic circuit element has long been expressed in microns, but continuous technology revolution means circuit dimensions are now less than 100 nanometer or 1/10th of a micron — leading to the use of “nanoelectronics” rather than “microelectronics.” The classical laws of physics no longer apply at this level, giving way to quantum physics, which can provide a dramatic improvement in chip performance. Several EUREKA projects are contributing to the development of future nanometer CMOS generations. As a result of MEDEA+ work, 90 nm node technologies are already in industrial production. The 65 nm node is reaching the product prototyping stage and first choices for a 45 nm technology are available with work continuing towards full process integration well in line with the International Technology Roadmap for Semiconductors (ITRS).

“In many cases, products had a 100 percent first-pass success rate, demonstrating design efficiency and optimum use of technology and manufacturing capabilities,” says Guillermo Bomchil of STMicroelectronics. “And the achievements at 90 nm following the end of the MEDEA+ T201 project set the stage for successful 65 nm prototyping from the end of 2005.”

Industrial exploitation of 90 nm CMOS industrial technology is possible based on the rules for industrial fabrication developed in the MEDEA+ T201 CMOS logic 0.1 um project. In the year following the end of T201, 25 submicron circuits were processed at Crolles 2, at the joint Freescale, Philips Semiconductors and STMicroelectronics pilot 300 mm wafer facility at Grenoble in France. These EUREKA projects have set the scene for the future. MEDEA+ T207 65 nm CMOS300 involved new substrate materiels as well as multilevel interconnect metallization for 65 nm circuit nodes. The 65 nm process has been established with significant yield improvements and reliability specifications and is now ready for the manufacture of prototype customer chips. The chipmaking partners will be sharing their 65 nm cell libraries and IP blocks are confident about the success of the process to be produced from 2008. And EUREKA projects are already being planned to exploit the results of the EU Sixth Framework Programme (FP6) PULLNANO project that is looking further ahead at the needs for 32/22 nm scale circuitry.

About MEDEA+

MEDEA+ is the new industry-initiated pan-European program for advanced co-operative research and development in microelectronics. It has been set up and labeled within the framework of EUREKA to ensure Europe's continued technological and industrial competitiveness in this sector. EUREKA is a pan-European network for market-oriented, industrial R&D. Created as an intergovernmental Initiative in 1985, EUREKA aims to enhance European competitiveness through its support to businesses, research centers and universities who carry out pan-European projects to develop innovative products, processes and services. The EUREKA label was granted by the Ministerial Conference in Hanover on 23 June 2000.

The central objective of the MEDEA+ program is to stimulate “system innovation on silicon” and provide the technology platform that will allow Europe, through its microelectronics and system industry, to move faster into the Information Age. This will contribute to increased employment and the creation of wealth and economic prosperity in Europe.

Financed by the MEDEA+ partners and by European national Governments, MEDEA+ is building on the achievements of its forerunner programs JESSI (Joint European Submicron Silicon; 1989 – 1996) and MEDEA (Microelectronics Development for European Applications; 1997 – 2000), also executed within the EUREKA framework.

JESSI, a program that concentrated on deeper co-operation between European semiconductor companies, was crucial for Europe's microelectronics industry in closing the gap in key technologies with the global competitors from the USA and from Asia/Pacific.

The aim of the MEDEA program was to strengthen the global competitiveness of the European microelectronics industry through R&D co-operation along the supply chain. This was largely achieved by increasing the participation of systems houses in application domains strategic for Europe: telecommunications, consumer and automotive electronics. For details see the “MEDEA: A four-year success story” brochure at http://www.medeaplus.org/web/downloads/medea_brochure.pdf.

In 1998 for the first time all three major European microelectronics companies, Philips Semiconductors, STMicroelectronics and Siemens Semiconductors (today Infineon Technologies), have entered the Top 10 ranking of the largest semiconductor companies in the world. In 1989 they were only positioned as numbers 10, 13 and 16.

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Source: http://www.eureka.be/; http://www.medeaplus.org/

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