Why Pretend?

By Christopher C. Aycock, MS

October 6, 2006

InfiniBand and iWARP have industry heavyweights behind them, to be sure. But this kind of smug satisfaction has only led to a case of the Emperor's New Clothes in which no one is willing to admit to the inadequacy of RDMA in general and VIA in particular.

Kernel Bypass, Zero Copy, and Asynchronous Communication

Networks are a shared resource. Traditional networks such as Ethernet require that the resource be protected by the kernel, which presents a tremendous performance bottleneck when latency is an issue. Furthermore, data is copied to and from pre-allocated buffers, which can hurt bandwidth for large messages.

Many of today's high-performance networks from vendors such as Myricom and Quadrics handle the protection across process boundaries directly through the network interface card (NIC). This setup bypasses the kernel and lets communication occur at the user level, thereby removing the bottleneck of mode switching.

Most modern high-performance networks also have direct memory access (DMA) in which the NIC accesses main memory directly while the CPU is free to perform other tasks. DMA not only eliminates copying, but also permits communication to overlap with computation. This facet is similar to prefetching in the cache as it reduces the effective latency. Taking advantage of this feature in an application only requires asynchronous communication, which is represented as multithreaded designs in Sockets or as nonblocking primitives in MPI — MPI_Isend() and MPI_Irecv().

Send/Receive and RDMA

Most of the above capabilities are available through the widely-used two-sided semantics of Send/Receive communication. That is, the communication runs entirely at the user level, allows the local (sending) node to act without copying, and frees the CPU to perform other tasks. Send/Receive does have a drawback though: the remote (receiving) node must copy the message to its final destination; the benefit of zero-copy only exists for the sending node.

With one-sided semantics in remote direct memory access (RDMA), the receiving NIC uses DMA to place the data into a buffer that has been specified by the sending node. RDMA extends zero-copy benefits to the remote node.

For the NIC to access the data through RDMA, the user's page must actually be in memory and not on the disk. Pinning the page to physical memory requires a memory registration, which invokes the operating system. This is actually an expensive procedure as it requires the kernel and is exactly what high-performance networks are supposed to avoid!

Furthermore, the sending node must know the destination memory address on the receiving node. Most applications, such as those written in Sockets or MPI, will require that this information be exchanged prior to communication. The synchronization here is performed through the Send/Receive semantics in a rendezvous protocol, which adds even more overhead.

Workarounds for RDMA

It is possible to overcome RDMA's shortcomings and still realize the benefit of zero-copy communication on the remote node. Certain supercomputers such as the Blue Gene rely on a custom lightweight kernel that only runs one process; because there is no paging, there is no requirement for memory registration.

Alternatively, QsNet works by patching the kernel so that the NIC may access the appropriate data once the page has been loaded into memory. Patches are developed for very specific versions of the kernel based on assumptions regarding the Linux API. Given this level of required specificity, administering a cluster that involves kernel patches can be quite tedious.

As for InfiniBand, it is possible to rely on caching techniques. That is, if a certain memory region will be remotely accessed multiple times, then the software — an implementation of MPI, for example — may build a table of memory registrations on the receiving node.

In any case, synchronization remains unavoidable in most programs. The sending node must know the destination memory address on the remote node to perform RDMA. There are some special cases where the address will be known ahead of time, as in MPI-2's remote memory access functions — MPI_Put() and MPI_Get(). But these routines are not widely used and represent a niche application.

Specific Issues with the Virtual Interface Architecture (VIA)

MVAPICH is a port of MPICH to InfiniBand maintained by D. K. Panda's team at Ohio State University. This implementation provides a reference for other communication layers on VIA-based networks, such as InfiniBand and iWARP. Of particular interest is that OSU's collection of related research papers contain a series of design patterns for software on RDMA networks.

Design patterns are best-practice architecture that permit reuse of a solution to a common programming problem. Some language researchers, such as Paul Graham and Peter Norvig, believe that design patterns are really a sign that the underlying language is incomplete. After all, a pattern implies automation, and automation implies a machine.

By extension, the design patterns from OSU demonstrate that InfiniBand lacks the foundations that would best serve most of its users. Now some designers, such as John Hennessy and David Patterson, believe that an architecture should provide primitives and not solutions. But given that the (committee-defined) InfiniBand standard is over a thousand pages long, it should be fairly obvious which view the IB Trade Association holds.

In contrast, both the Elan and MX libraries (for QsNet and Myrinet, respectively) have been specifically built to present the common functionality required in most applications. The solution-oriented VIA community should have done the same with their libraries, such DAPL and the OpenFabrics verbs API.

Personal Notes

I was motivated to write this article after reading “A Tutorial of the RDMA Model” from IBM's Renato Recio, which in turn was a response to “A Critique of RDMA” from Myricom's Patrick Geoffray. I got the impression that Recio was writing to protect the image of VIA rather than provide a sound rebuttal to Geoffray's technical arguments about RDMA. For example, Geoffray's criticism that RDMA is not adequate for Sockets is met with the response that the user can rely on Extended Sockets or the Sockets Direct Protocol (SDP). Extended Sockets is a different library from Sockets, albeit somewhat similar; SDP is a protocol used above and beyond the RDMA paradigm. Geoffray essentially said that RDMA is handicapped and Recio responded that RDMA has a choice of crutches.

What is particularly telling is that Recio fell back on the old technique of using sales volume to justify technical soundness. He states, “it is interesting to note that almost twice as many new machines in the top100 are using InfiniBand than Myrinet.” This is like saying that Titanic was the best movie ever produced since it sold the most tickets. If IBM really did believe the sales-volume pitch, it would stop making POWER chips and simply bundle x86 with its servers.

I wrote this article as a knowledgeable end user; I will leave the marketing brochures to the vendors. At Oxford we used to believe that RDMA was a godsend for the BSP-style programming found in MPI-2 or Cray's SHMEM. Indeed, Geoffray's article states that RDMA networks “can be leveraged successfully for one-sided programming paradigms.” After having studied both the paradigms and the networks, I have come to the conclusion that models such as the partitioned global address space languages are really best suited for ccNUMA machines. And indeed, that is what RDMA is: a crude approximation of a non-commodity machine useful only for niche applications.

Sockets work just fine on vanilla Ethernet. MPI works on Ethernet. Google's MapReduce works on Ethernet. Maybe this is the architecture we should be building on.

The author would like to thank Richard Brent and Peter Strazdins for their comments on an earlier draft of this article.

—–

Christopher C. Aycock is wrapping up his PhD from Oxford University, where his thesis topic is in communications programming paradigms for high-performance networks. He is currently a visiting fellow at the Australian National University and can be reached via [email protected].

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

University of Stuttgart Inaugurates ‘Hawk’ Supercomputer

February 20, 2020

This week, the new “Hawk” supercomputer was inaugurated in a ceremony at the High-Performance Computing Center of the University of Stuttgart (HLRS). Officials, scientists and other stakeholders celebrated the new sy Read more…

By Staff report

US to Triple Its Supercomputing Capacity for Weather and Climate with Two New Crays

February 20, 2020

The blizzard of news around the race for weather and climate supercomputing leadership continues. Just three days after the UK announced a £1.2 billion plan to build the world’s largest weather and climate supercomputer, the U.S. National Oceanic and Atmospheric Administration... Read more…

By Oliver Peckham

Indiana University Researchers Use Supercomputing to Model the State’s Largest Watershed

February 20, 2020

With water stressors on the rise, understanding and protecting water supplies is more important than ever. Now, a team of researchers from Indiana University has created a new climate change data portal to help Indianans Read more…

By Staff report

TACC – Supporting Portable, Reproducible, Computational Science with Containers

February 20, 2020

Researchers who use supercomputers for science typically don't limit themselves to one system. They move their projects to whatever resources are available, often using many different systems simultaneously, in their lab Read more…

By Aaron Dubrow

China Researchers Set Distance Record in Quantum Memory Entanglement

February 20, 2020

Efforts to develop the necessary capabilities for building a practical ‘quantum-based’ internet have been ongoing for years. One of the biggest challenges is being able to maintain and manage entanglement of remote q Read more…

By John Russell

AWS Solution Channel

Challenging the barriers to High Performance Computing in the Cloud

Cloud computing helps democratize High Performance Computing by placing powerful computational capabilities in the hands of more researchers, engineers, and organizations who may lack access to sufficient on-premises infrastructure. Read more…

IBM Accelerated Insights

Intelligent HPC – Keeping Hard Work at Bay(es)

Since the dawn of time, humans have looked for ways to make their lives easier. Over the centuries human ingenuity has given us inventions such as the wheel and simple machines – which help greatly with tasks that would otherwise be extremely laborious. Read more…

New Algorithm Allows PCs to Challenge HPC in Weather Forecasting

February 19, 2020

Accurate weather forecasting has, by and large, been situated squarely in the domain of high-performance computing – just this week, the UK announced a nearly $1.6 billion investment in the world’s largest supercompu Read more…

By Oliver Peckham

US to Triple Its Supercomputing Capacity for Weather and Climate with Two New Crays

February 20, 2020

The blizzard of news around the race for weather and climate supercomputing leadership continues. Just three days after the UK announced a £1.2 billion plan to build the world’s largest weather and climate supercomputer, the U.S. National Oceanic and Atmospheric Administration... Read more…

By Oliver Peckham

Japan’s AIST Benchmarks Intel Optane; Cites Benefit for HPC and AI

February 19, 2020

Last April Intel released its Optane Data Center Persistent Memory Module (DCPMM) – byte addressable nonvolatile memory – to increase main memory capacity a Read more…

By John Russell

UK Announces £1.2 Billion Weather and Climate Supercomputer

February 19, 2020

While the planet is heating up, so is the race for global leadership in weather and climate computing. In a bombshell announcement, the UK government revealed p Read more…

By Oliver Peckham

The Massive GPU Cloudburst Experiment Plays a Smaller, More Productive Encore

February 13, 2020

In November, researchers at the San Diego Supercomputer Center (SDSC) and the IceCube Particle Astrophysics Center (WIPAC) set out to break the internet – or Read more…

By Oliver Peckham

Eni to Retake Industry HPC Crown with Launch of HPC5

February 12, 2020

With the launch of its Dell-built HPC5 system, Italian energy company Eni regains its position atop the industrial supercomputing leaderboard. At 52-petaflops p Read more…

By Tiffany Trader

Trump Budget Proposal Again Slashes Science Spending

February 11, 2020

President Donald Trump’s FY2021 U.S. Budget, submitted to Congress this week, again slashes science spending. It’s a $4.8 trillion statement of priorities, Read more…

By John Russell

Policy: Republicans Eye Bigger Science Budgets; NSF Celebrates 70th, Names Idea Machine Winners

February 5, 2020

It’s a busy week for science policy. Yesterday, the National Science Foundation announced winners of its 2026 Idea Machine contest seeking directions for futu Read more…

By John Russell

Fujitsu A64FX Supercomputer to Be Deployed at Nagoya University This Summer

February 3, 2020

Japanese tech giant Fujitsu announced today that it will supply Nagoya University Information Technology Center with the first commercial supercomputer powered Read more…

By Tiffany Trader

Julia Programming’s Dramatic Rise in HPC and Elsewhere

January 14, 2020

Back in 2012 a paper by four computer scientists including Alan Edelman of MIT introduced Julia, A Fast Dynamic Language for Technical Computing. At the time, t Read more…

By John Russell

Cray, Fujitsu Both Bringing Fujitsu A64FX-based Supercomputers to Market in 2020

November 12, 2019

The number of top-tier HPC systems makers has shrunk due to a steady march of M&A activity, but there is increased diversity and choice of processing compon Read more…

By Tiffany Trader

SC19: IBM Changes Its HPC-AI Game Plan

November 25, 2019

It’s probably fair to say IBM is known for big bets. Summit supercomputer – a big win. Red Hat acquisition – looking like a big win. OpenPOWER and Power processors – jury’s out? At SC19, long-time IBMer Dave Turek sketched out a different kind of bet for Big Blue – a small ball strategy, if you’ll forgive the baseball analogy... Read more…

By John Russell

Intel Debuts New GPU – Ponte Vecchio – and Outlines Aspirations for oneAPI

November 17, 2019

Intel today revealed a few more details about its forthcoming Xe line of GPUs – the top SKU is named Ponte Vecchio and will be used in Aurora, the first plann Read more…

By John Russell

IBM Unveils Latest Achievements in AI Hardware

December 13, 2019

“The increased capabilities of contemporary AI models provide unprecedented recognition accuracy, but often at the expense of larger computational and energet Read more…

By Oliver Peckham

SC19: Welcome to Denver

November 17, 2019

A significant swath of the HPC community has come to Denver for SC19, which began today (Sunday) with a rich technical program. As is customary, the ribbon cutt Read more…

By Tiffany Trader

Fujitsu A64FX Supercomputer to Be Deployed at Nagoya University This Summer

February 3, 2020

Japanese tech giant Fujitsu announced today that it will supply Nagoya University Information Technology Center with the first commercial supercomputer powered Read more…

By Tiffany Trader

51,000 Cloud GPUs Converge to Power Neutrino Discovery at the South Pole

November 22, 2019

At the dead center of the South Pole, thousands of sensors spanning a cubic kilometer are buried thousands of meters beneath the ice. The sensors are part of Ic Read more…

By Oliver Peckham

Leading Solution Providers

SC 2019 Virtual Booth Video Tour

AMD
AMD
ASROCK RACK
ASROCK RACK
AWS
AWS
CEJN
CJEN
CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
IBM
IBM
MELLANOX
MELLANOX
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
SIX NINES IT
SIX NINES IT
VERNE GLOBAL
VERNE GLOBAL
WEKAIO
WEKAIO

Jensen Huang’s SC19 – Fast Cars, a Strong Arm, and Aiming for the Cloud(s)

November 20, 2019

We’ve come to expect Nvidia CEO Jensen Huang’s annual SC keynote to contain stunning graphics and lively bravado (with plenty of examples) in support of GPU Read more…

By John Russell

Top500: US Maintains Performance Lead; Arm Tops Green500

November 18, 2019

The 54th Top500, revealed today at SC19, is a familiar list: the U.S. Summit (ORNL) and Sierra (LLNL) machines, offering 148.6 and 94.6 petaflops respectively, Read more…

By Tiffany Trader

Azure Cloud First with AMD Epyc Rome Processors

November 6, 2019

At Ignite 2019 this week, Microsoft's Azure cloud team and AMD announced an expansion of their partnership that began in 2017 when Azure debuted Epyc-backed instances for storage workloads. The fourth-generation Azure D-series and E-series virtual machines previewed at the Rome launch in August are now generally available. Read more…

By Tiffany Trader

Intel’s New Hyderabad Design Center Targets Exascale Era Technologies

December 3, 2019

Intel's Raja Koduri was in India this week to help launch a new 300,000 square foot design and engineering center in Hyderabad, which will focus on advanced com Read more…

By Tiffany Trader

In Memoriam: Steve Tuecke, Globus Co-founder

November 4, 2019

HPCwire is deeply saddened to report that Steve Tuecke, longtime scientist at Argonne National Lab and University of Chicago, has passed away at age 52. Tuecke Read more…

By Tiffany Trader

IBM Debuts IC922 Power Server for AI Inferencing and Data Management

January 28, 2020

IBM today launched a Power9-based inference server – the IC922 – that features up to six Nvidia T4 GPUs, PCIe Gen 4 and OpenCAPI connectivity, and can accom Read more…

By John Russell

Cray Debuts ClusterStor E1000 Finishing Remake of Portfolio for ‘Exascale Era’

October 30, 2019

Cray, now owned by HPE, today introduced the ClusterStor E1000 storage platform, which leverages Cray software and mixes hard disk drives (HDD) and flash memory Read more…

By John Russell

D-Wave’s Path to 5000 Qubits; Google’s Quantum Supremacy Claim

September 24, 2019

On the heels of IBM’s quantum news last week come two more quantum items. D-Wave Systems today announced the name of its forthcoming 5000-qubit system, Advantage (yes the name choice isn’t serendipity), at its user conference being held this week in Newport, RI. Read more…

By John Russell

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This