Why Pretend?

By Christopher C. Aycock, MS

October 6, 2006

InfiniBand and iWARP have industry heavyweights behind them, to be sure. But this kind of smug satisfaction has only led to a case of the Emperor's New Clothes in which no one is willing to admit to the inadequacy of RDMA in general and VIA in particular.

Kernel Bypass, Zero Copy, and Asynchronous Communication

Networks are a shared resource. Traditional networks such as Ethernet require that the resource be protected by the kernel, which presents a tremendous performance bottleneck when latency is an issue. Furthermore, data is copied to and from pre-allocated buffers, which can hurt bandwidth for large messages.

Many of today's high-performance networks from vendors such as Myricom and Quadrics handle the protection across process boundaries directly through the network interface card (NIC). This setup bypasses the kernel and lets communication occur at the user level, thereby removing the bottleneck of mode switching.

Most modern high-performance networks also have direct memory access (DMA) in which the NIC accesses main memory directly while the CPU is free to perform other tasks. DMA not only eliminates copying, but also permits communication to overlap with computation. This facet is similar to prefetching in the cache as it reduces the effective latency. Taking advantage of this feature in an application only requires asynchronous communication, which is represented as multithreaded designs in Sockets or as nonblocking primitives in MPI — MPI_Isend() and MPI_Irecv().

Send/Receive and RDMA

Most of the above capabilities are available through the widely-used two-sided semantics of Send/Receive communication. That is, the communication runs entirely at the user level, allows the local (sending) node to act without copying, and frees the CPU to perform other tasks. Send/Receive does have a drawback though: the remote (receiving) node must copy the message to its final destination; the benefit of zero-copy only exists for the sending node.

With one-sided semantics in remote direct memory access (RDMA), the receiving NIC uses DMA to place the data into a buffer that has been specified by the sending node. RDMA extends zero-copy benefits to the remote node.

For the NIC to access the data through RDMA, the user's page must actually be in memory and not on the disk. Pinning the page to physical memory requires a memory registration, which invokes the operating system. This is actually an expensive procedure as it requires the kernel and is exactly what high-performance networks are supposed to avoid!

Furthermore, the sending node must know the destination memory address on the receiving node. Most applications, such as those written in Sockets or MPI, will require that this information be exchanged prior to communication. The synchronization here is performed through the Send/Receive semantics in a rendezvous protocol, which adds even more overhead.

Workarounds for RDMA

It is possible to overcome RDMA's shortcomings and still realize the benefit of zero-copy communication on the remote node. Certain supercomputers such as the Blue Gene rely on a custom lightweight kernel that only runs one process; because there is no paging, there is no requirement for memory registration.

Alternatively, QsNet works by patching the kernel so that the NIC may access the appropriate data once the page has been loaded into memory. Patches are developed for very specific versions of the kernel based on assumptions regarding the Linux API. Given this level of required specificity, administering a cluster that involves kernel patches can be quite tedious.

As for InfiniBand, it is possible to rely on caching techniques. That is, if a certain memory region will be remotely accessed multiple times, then the software — an implementation of MPI, for example — may build a table of memory registrations on the receiving node.

In any case, synchronization remains unavoidable in most programs. The sending node must know the destination memory address on the remote node to perform RDMA. There are some special cases where the address will be known ahead of time, as in MPI-2's remote memory access functions — MPI_Put() and MPI_Get(). But these routines are not widely used and represent a niche application.

Specific Issues with the Virtual Interface Architecture (VIA)

MVAPICH is a port of MPICH to InfiniBand maintained by D. K. Panda's team at Ohio State University. This implementation provides a reference for other communication layers on VIA-based networks, such as InfiniBand and iWARP. Of particular interest is that OSU's collection of related research papers contain a series of design patterns for software on RDMA networks.

Design patterns are best-practice architecture that permit reuse of a solution to a common programming problem. Some language researchers, such as Paul Graham and Peter Norvig, believe that design patterns are really a sign that the underlying language is incomplete. After all, a pattern implies automation, and automation implies a machine.

By extension, the design patterns from OSU demonstrate that InfiniBand lacks the foundations that would best serve most of its users. Now some designers, such as John Hennessy and David Patterson, believe that an architecture should provide primitives and not solutions. But given that the (committee-defined) InfiniBand standard is over a thousand pages long, it should be fairly obvious which view the IB Trade Association holds.

In contrast, both the Elan and MX libraries (for QsNet and Myrinet, respectively) have been specifically built to present the common functionality required in most applications. The solution-oriented VIA community should have done the same with their libraries, such DAPL and the OpenFabrics verbs API.

Personal Notes

I was motivated to write this article after reading “A Tutorial of the RDMA Model” from IBM's Renato Recio, which in turn was a response to “A Critique of RDMA” from Myricom's Patrick Geoffray. I got the impression that Recio was writing to protect the image of VIA rather than provide a sound rebuttal to Geoffray's technical arguments about RDMA. For example, Geoffray's criticism that RDMA is not adequate for Sockets is met with the response that the user can rely on Extended Sockets or the Sockets Direct Protocol (SDP). Extended Sockets is a different library from Sockets, albeit somewhat similar; SDP is a protocol used above and beyond the RDMA paradigm. Geoffray essentially said that RDMA is handicapped and Recio responded that RDMA has a choice of crutches.

What is particularly telling is that Recio fell back on the old technique of using sales volume to justify technical soundness. He states, “it is interesting to note that almost twice as many new machines in the top100 are using InfiniBand than Myrinet.” This is like saying that Titanic was the best movie ever produced since it sold the most tickets. If IBM really did believe the sales-volume pitch, it would stop making POWER chips and simply bundle x86 with its servers.

I wrote this article as a knowledgeable end user; I will leave the marketing brochures to the vendors. At Oxford we used to believe that RDMA was a godsend for the BSP-style programming found in MPI-2 or Cray's SHMEM. Indeed, Geoffray's article states that RDMA networks “can be leveraged successfully for one-sided programming paradigms.” After having studied both the paradigms and the networks, I have come to the conclusion that models such as the partitioned global address space languages are really best suited for ccNUMA machines. And indeed, that is what RDMA is: a crude approximation of a non-commodity machine useful only for niche applications.

Sockets work just fine on vanilla Ethernet. MPI works on Ethernet. Google's MapReduce works on Ethernet. Maybe this is the architecture we should be building on.

The author would like to thank Richard Brent and Peter Strazdins for their comments on an earlier draft of this article.

—–

Christopher C. Aycock is wrapping up his PhD from Oxford University, where his thesis topic is in communications programming paradigms for high-performance networks. He is currently a visiting fellow at the Australian National University and can be reached via chris@hpcanswers.com.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Digging into the Atos-Nimbix Deal: Big US HPC and Global Cloud Aspirations. Look out HPE?

August 2, 2021

Behind Atos’s deal announced last week to acquire HPC-cloud specialist Nimbix are ramped-up plans to penetrate the U.S. HPC market and global expansion of its HPC cloud capabilities. Nimbix will become “an Atos HPC c Read more…

Berkeley Lab Makes Strides in Autonomous Discovery to Tackle the Data Deluge

August 2, 2021

Data production is outpacing the human capacity to process said data. Whether a giant radio telescope, a new particle accelerator or lidar data from autonomous cars, the sheer scale of the data generated is increasingly Read more…

Verifying the Universe with Exascale Computers

July 30, 2021

The ExaSky project, one of the critical Earth and Space Science applications being solved by the US Department of Energy’s (DOE’s) Exascale Computing Project (ECP), is preparing to use the nation’s forthcoming exas Read more…

What’s After Exascale? The Internet of Workflows Says HPE’s Nicolas Dubé

July 29, 2021

With the race to exascale computing in its final leg, it’s natural to wonder what the Post Exascale Era will look like. Nicolas Dubé, VP and chief technologist for HPE’s HPC business unit, agrees and shared his vision at Supercomputing Frontiers Europe 2021 held last week. The next big thing, he told the virtual audience at SFE21, is something that will connect HPC and (broadly) all of IT – into what Dubé calls The Internet of Workflows. Read more…

How UK Scientists Developed Transformative, HPC-Powered Coronavirus Sequencing System

July 29, 2021

In November 2020, the COVID-19 Genomics UK Consortium (COG-UK) won the HPCwire Readers’ Choice Award for Best HPC Collaboration for its CLIMB-COVID sequencing project. Launched in March 2020, CLIMB-COVID has now resulted in the sequencing of over 675,000 coronavirus genomes – an increasingly critical task as variants like Delta threaten the tenuous prospect of a return to normalcy in much of the world. Read more…

AWS Solution Channel

Data compression with increased performance and lower costs

Many customers associate a performance cost with data compression, but that’s not the case with Amazon FSx for Lustre. With FSx for Lustre, data compression reduces storage costs and increases aggregate file system throughput. Read more…

KAUST Leverages Mixed Precision for Geospatial Data

July 28, 2021

For many computationally intensive tasks, exacting precision is not necessary for every step of the entire task to obtain a suitably precise result. The alternative is mixed-precision computing: using high precision wher Read more…

Digging into the Atos-Nimbix Deal: Big US HPC and Global Cloud Aspirations. Look out HPE?

August 2, 2021

Behind Atos’s deal announced last week to acquire HPC-cloud specialist Nimbix are ramped-up plans to penetrate the U.S. HPC market and global expansion of its Read more…

How UK Scientists Developed Transformative, HPC-Powered Coronavirus Sequencing System

July 29, 2021

In November 2020, the COVID-19 Genomics UK Consortium (COG-UK) won the HPCwire Readers’ Choice Award for Best HPC Collaboration for its CLIMB-COVID sequencing project. Launched in March 2020, CLIMB-COVID has now resulted in the sequencing of over 675,000 coronavirus genomes – an increasingly critical task as variants like Delta threaten the tenuous prospect of a return to normalcy in much of the world. Read more…

What’s After Exascale? The Internet of Workflows Says HPE’s Nicolas Dubé

July 29, 2021

With the race to exascale computing in its final leg, it’s natural to wonder what the Post Exascale Era will look like. Nicolas Dubé, VP and chief technologist for HPE’s HPC business unit, agrees and shared his vision at Supercomputing Frontiers Europe 2021 held last week. The next big thing, he told the virtual audience at SFE21, is something that will connect HPC and (broadly) all of IT – into what Dubé calls The Internet of Workflows. Read more…

IBM and University of Tokyo Roll Out Quantum System One in Japan

July 27, 2021

IBM and the University of Tokyo today unveiled an IBM Quantum System One as part of the IBM-Japan quantum program announced in 2019. The system is the second IB Read more…

Intel Unveils New Node Names; Sapphire Rapids Is Now an ‘Intel 7’ CPU

July 27, 2021

What's a preeminent chip company to do when its process node technology lags the competition by (roughly) one generation, but outmoded naming conventions make it seem like it's two nodes behind? For Intel, the response was to change how it refers to its nodes with the aim of better reflecting its positioning within the leadership semiconductor manufacturing space. Intel revealed its new node nomenclature, and... Read more…

Will Approximation Drive Post-Moore’s Law HPC Gains?

July 26, 2021

“Hardware-based improvements are going to get more and more difficult,” said Neil Thompson, an innovation scholar at MIT’s Computer Science and Artificial Intelligence Lab (CSAIL). “I think that’s something that this crowd will probably, actually, be already familiar with.” Thompson, speaking... Read more…

With New Owner and New Roadmap, an Independent Omni-Path Is Staging a Comeback

July 23, 2021

Put on a shelf by Intel in 2019, Omni-Path faced a uncertain future, but under new custodian Cornelis Networks, OmniPath is looking to make a comeback as an independent high-performance interconnect solution. A "significant refresh" – called Omni-Path Express – is coming later this year according to the company. Cornelis Networks formed last September as a spinout of Intel's Omni-Path division. Read more…

Chameleon’s HPC Testbed Sharpens Its Edge, Presses ‘Replay’

July 22, 2021

“One way of saying what I do for a living is to say that I develop scientific instruments,” said Kate Keahey, a senior fellow at the University of Chicago a Read more…

AMD Chipmaker TSMC to Use AMD Chips for Chipmaking

May 8, 2021

TSMC has tapped AMD to support its major manufacturing and R&D workloads. AMD will provide its Epyc Rome 7702P CPUs – with 64 cores operating at a base cl Read more…

Intel Launches 10nm ‘Ice Lake’ Datacenter CPU with Up to 40 Cores

April 6, 2021

The wait is over. Today Intel officially launched its 10nm datacenter CPU, the third-generation Intel Xeon Scalable processor, codenamed Ice Lake. With up to 40 Read more…

Berkeley Lab Debuts Perlmutter, World’s Fastest AI Supercomputer

May 27, 2021

A ribbon-cutting ceremony held virtually at Berkeley Lab's National Energy Research Scientific Computing Center (NERSC) today marked the official launch of Perlmutter – aka NERSC-9 – the GPU-accelerated supercomputer built by HPE in partnership with Nvidia and AMD. Read more…

Ahead of ‘Dojo,’ Tesla Reveals Its Massive Precursor Supercomputer

June 22, 2021

In spring 2019, Tesla made cryptic reference to a project called Dojo, a “super-powerful training computer” for video data processing. Then, in summer 2020, Tesla CEO Elon Musk tweeted: “Tesla is developing a [neural network] training computer called Dojo to process truly vast amounts of video data. It’s a beast! … A truly useful exaflop at de facto FP32.” Read more…

Google Launches TPU v4 AI Chips

May 20, 2021

Google CEO Sundar Pichai spoke for only one minute and 42 seconds about the company’s latest TPU v4 Tensor Processing Units during his keynote at the Google I Read more…

CentOS Replacement Rocky Linux Is Now in GA and Under Independent Control

June 21, 2021

The Rocky Enterprise Software Foundation (RESF) is announcing the general availability of Rocky Linux, release 8.4, designed as a drop-in replacement for the soon-to-be discontinued CentOS. The GA release is launching six-and-a-half months after Red Hat deprecated its support for the widely popular, free CentOS server operating system. The Rocky Linux development effort... Read more…

Iran Gains HPC Capabilities with Launch of ‘Simorgh’ Supercomputer

May 18, 2021

Iran is said to be developing domestic supercomputing technology to advance the processing of scientific, economic, political and military data, and to strengthen the nation’s position in the age of AI and big data. On Sunday, Iran unveiled the Simorgh supercomputer, which will deliver.... Read more…

HPE Launches Storage Line Loaded with IBM’s Spectrum Scale File System

April 6, 2021

HPE today launched a new family of storage solutions bundled with IBM’s Spectrum Scale Erasure Code Edition parallel file system (description below) and featu Read more…

Leading Solution Providers

Contributors

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

GTC21: Nvidia Launches cuQuantum; Dips a Toe in Quantum Computing

April 13, 2021

Yesterday Nvidia officially dipped a toe into quantum computing with the launch of cuQuantum SDK, a development platform for simulating quantum circuits on GPU-accelerated systems. As Nvidia CEO Jensen Huang emphasized in his keynote, Nvidia doesn’t plan to build... Read more…

Microsoft to Provide World’s Most Powerful Weather & Climate Supercomputer for UK’s Met Office

April 22, 2021

More than 14 months ago, the UK government announced plans to invest £1.2 billion ($1.56 billion) into weather and climate supercomputing, including procuremen Read more…

Quantum Roundup: IBM, Rigetti, Phasecraft, Oxford QC, China, and More

July 13, 2021

IBM yesterday announced a proof for a quantum ML algorithm. A week ago, it unveiled a new topology for its quantum processors. Last Friday, the Technical Univer Read more…

Q&A with Jim Keller, CTO of Tenstorrent, and an HPCwire Person to Watch in 2021

April 22, 2021

As part of our HPCwire Person to Watch series, we are happy to present our interview with Jim Keller, president and chief technology officer of Tenstorrent. One of the top chip architects of our time, Keller has had an impactful career. Read more…

AMD-Xilinx Deal Gains UK, EU Approvals — China’s Decision Still Pending

July 1, 2021

AMD’s planned acquisition of FPGA maker Xilinx is now in the hands of Chinese regulators after needed antitrust approvals for the $35 billion deal were receiv Read more…

Senate Debate on Bill to Remake NSF – the Endless Frontier Act – Begins

May 18, 2021

The U.S. Senate today opened floor debate on the Endless Frontier Act which seeks to remake and expand the National Science Foundation by creating a technology Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire