The SC-ingularity is Near

By Michael Feldman

November 10, 2006

With just a weekend between us and the Supercomputing 2006 Conference (SC06) in Florida, most of my thoughts have already turned to Tampa. One thing I'm personally intrigued with this year is the choice of the conference keynote speaker, Ray Kurzweil. Although not a supercomputing groupie in the classical sense, Kurzweil has made a name for himself as an information technology visionary.

His latest book, “The Singularity is Near: When Humans Transcend Biology,” is a compendium of much of his thinking over the last two decades. In the book, Kurzweil describes how, in the not too distant future, we will develop computer intelligence that will far exceed that of human intelligence. At that point, biological and non-biological intelligence will merge and the human race will reach what he calls “Singularity.” Kurzweil says that at this point, technological change will proceed so rapidly that it will represent “a rupture in the fabric of human history.”

A number of futurists have proposed a similar vision, but Kurzweil has put an interesting twist on it. Since he sees the rate of technological growth as a purely exponential progression rather than a linear progression, the attainment of Singularity will come within this century. He backs this up by citing a natural phenomenon called “the law of accelerating returns,” in which an evolutionary process, such as technological innovation, creates a positive feedback loop to continuously accelerate the rate of change.

He's not claiming that specific technologies are on exponential tracks. For example, Moore's Law, which states that the number of transistors on a silicon chip will double every 18 months, will eventually run out of steam. Kurzweil predicts that Moore's Law will die a dignified death no later than 2019 as the limitations on semiconductor physics take hold. But just as vacuum tubes disappeared from computers in the 1960s, the broader trend of computing evolution will continue on beyond silicon chips. Kurzweil himself is betting on three-dimensional molecular computing after 2020.

Not everyone shares Kurzweil's take on the future. Professional technology kibitzers, such as Kevin Kelley and John Horgan, have written well-considered critiques of Kurzweil's transhumanistic views. In a recent (November 5th) CSPAN interview, a caller from Oak Ridge National Laboratory (ORNL) phoned in and labeled him a “crackpot.” The ORNLian said Kurzweil's explanation of exponential technological growth was “bogus” and challenged him on some specific assertions. Kurzweil, — obviously no stranger to these types of attacks — calmly defended his views and proceeded to the next caller.

Kurzweil is no crackpot. He is a recognized authority in the fields of computer science and artificial intelligence. Among his inventions are the first computer-based reading machines for the blind. In 2002, Kurzweil was inducted into the U.S. Patent Office's National Inventors Hall of Fame. He has received numerous awards and accolades, including the Lemelson-MIT Prize, the National Medal of Technology and ACM's Grace Murray Hopper Award. While not collecting awards, Kurzweil is busy developing his nine businesses in OCR, music synthesis, speech recognition, reading technology, virtual reality, financial investment, cybernetic art, and other areas of artificial intelligence.

Barbara Horner-Miller, the SC06 chair, had this to say about Kurzweil: “The role of the keynote speaker is to get attendees thinking and interacting. So ideally it is someone who is interesting, stimulating and somewhat controversial. As soon as Ray Kurzweil's name came up, I knew we had our speaker ….”

—–

Locks Be Gone

Back to the present. Before we start building 3-D compute engines, we're going to need to figure out multi-threaded programming first. There was an interesting article in Technology Review last week called “The Trouble with Multi-Core Computers” that talks about some of the multi-threading programming challenges. The author, Kate Green, focuses on an approach called “transactional memory,” which allows the programmer to use shared data in a multi-threaded environment without having to manage locks.

Writes Green: “It actually allows numerous transactions to share the same memory at the same time. When a transaction is complete, the system verifies that other transactions haven't made changes in the memory that would hinder the outcome of the first transaction. If they have, then the transaction is re-executed until it succeeds.”

Transactional memory models, like the MIT one cited in this article, usually rely on some combination of software and hardware to work. A software-based model is called software transactional memory (STM), and until hardware assistance is developed, STM is the only practical implementation.

There are a multiple benefits to transactional memory. The obvious one is that the programmer is relieved of the burden of managing thread-safe critical regions to keep his data coherent. Not only does this simplify the coder's job, it also removes the threat of deadlocks, the bane of multi-threaded programming and the cause of many a sleepless night for the software engineer.

And for the performance obsessed, transactional memory can increase concurrency over lock-based approaches — perhaps substantially. This is because the threads no longer have to wait for access to shared memory. In addition, different threads can be working on different parts of the same data structure that would normally be controlled by a single lock. At this point you might be thinking: Haven't we just shifted the overhead of synchronization to the memory system? Yes and no. The transactional memory approach relies on the fact that data contention between threads is a rare occurrence. Most of the time only a single thread is reading or writing a particular data item. So instead of paying the price of synchronization at every access, a transactional system only needs to track memory requests and sort things out when a collision occurs.

I say only, but in reality sorting out the memory accesses turns out to be the fundamental problem with transactional memory. Maintaining the order of memory accesses is difficult. Some of the models get a little loose with the memory ordering, and while that appeals to hardware designers, software developers expect deterministic memory access.

I'll close with a comment from the High-End Crusader, who offers his perspective on the Technology Review article:

“Does Kate Green's short piece on MIT's Krste Asanovic do a better job of articulating the problems that computing faces — as we transition to homogeneous (and heterogeneous) polycore* processor dies — than will next Friday's SC06 distinguished panel on multicore? Kate calls for the reinvention of parallel programming. She is clearly right. This is the $64,000 question in polycore.

“Programming is possible precisely when the programming abstractions are an order of magnitude less burdensome than the execution abstractions, which are managed by the runtime system. Designing good programming abstractions requires a good nose for which execution abstractions are most dangerous.

“If you think about it, transactions abstract from synchronization. Of course, microarchitects will obsess about whether the cores should transact against on-die shared memory or against off-die shared memory or both? That's their thing.

“But the real question stems from the hard fact that parallel computing is now, and has always been, a hard sell. Perhaps the wholesale replacement of synchronization by transactions will tempt Joe Programmer to hop on board the parallel-computing vessel. We need him. We need to offer him beer (or single-malt scotch) that goes down smooth. The future of computing depends on it.”

* In this context, “multicore” means 2X, 4X, … “polycore” means 128X, 256X, …

—–

As always, comments about HPCwire are welcomed and encouraged. Write to me, Michael Feldman, at [email protected].

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industry updates delivered to you every week!

MLPerf Inference 4.0 Results Showcase GenAI; Nvidia Still Dominates

March 28, 2024

There were no startling surprises in the latest MLPerf Inference benchmark (4.0) results released yesterday. Two new workloads — Llama 2 and Stable Diffusion XL — were added to the benchmark suite as MLPerf continues Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing power it brings to artificial intelligence.  Nvidia's DGX Read more…

Call for Participation in Workshop on Potential NSF CISE Quantum Initiative

March 26, 2024

Editor’s Note: Next month there will be a workshop to discuss what a quantum initiative led by NSF’s Computer, Information Science and Engineering (CISE) directorate could entail. The details are posted below in a Ca Read more…

Waseda U. Researchers Reports New Quantum Algorithm for Speeding Optimization

March 25, 2024

Optimization problems cover a wide range of applications and are often cited as good candidates for quantum computing. However, the execution time for constrained combinatorial optimization applications on quantum device Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at the network layer threatens to make bigger and brawnier pro Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HBM3E memory as well as the the ability to train 1 trillion pa Read more…

MLPerf Inference 4.0 Results Showcase GenAI; Nvidia Still Dominates

March 28, 2024

There were no startling surprises in the latest MLPerf Inference benchmark (4.0) results released yesterday. Two new workloads — Llama 2 and Stable Diffusion Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing po Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HB Read more…

Nvidia Looks to Accelerate GenAI Adoption with NIM

March 19, 2024

Today at the GPU Technology Conference, Nvidia launched a new offering aimed at helping customers quickly deploy their generative AI applications in a secure, s Read more…

The Generative AI Future Is Now, Nvidia’s Huang Says

March 19, 2024

We are in the early days of a transformative shift in how business gets done thanks to the advent of generative AI, according to Nvidia CEO and cofounder Jensen Read more…

Nvidia’s New Blackwell GPU Can Train AI Models with Trillions of Parameters

March 18, 2024

Nvidia's latest and fastest GPU, codenamed Blackwell, is here and will underpin the company's AI plans this year. The chip offers performance improvements from Read more…

Nvidia Showcases Quantum Cloud, Expanding Quantum Portfolio at GTC24

March 18, 2024

Nvidia’s barrage of quantum news at GTC24 this week includes new products, signature collaborations, and a new Nvidia Quantum Cloud for quantum developers. Wh Read more…

Alibaba Shuts Down its Quantum Computing Effort

November 30, 2023

In case you missed it, China’s e-commerce giant Alibaba has shut down its quantum computing research effort. It’s not entirely clear what drove the change. Read more…

Nvidia H100: Are 550,000 GPUs Enough for This Year?

August 17, 2023

The GPU Squeeze continues to place a premium on Nvidia H100 GPUs. In a recent Financial Times article, Nvidia reports that it expects to ship 550,000 of its lat Read more…

Shutterstock 1285747942

AMD’s Horsepower-packed MI300X GPU Beats Nvidia’s Upcoming H200

December 7, 2023

AMD and Nvidia are locked in an AI performance battle – much like the gaming GPU performance clash the companies have waged for decades. AMD has claimed it Read more…

DoD Takes a Long View of Quantum Computing

December 19, 2023

Given the large sums tied to expensive weapon systems – think $100-million-plus per F-35 fighter – it’s easy to forget the U.S. Department of Defense is a Read more…

Synopsys Eats Ansys: Does HPC Get Indigestion?

February 8, 2024

Recently, it was announced that Synopsys is buying HPC tool developer Ansys. Started in Pittsburgh, Pa., in 1970 as Swanson Analysis Systems, Inc. (SASI) by John Swanson (and eventually renamed), Ansys serves the CAE (Computer Aided Engineering)/multiphysics engineering simulation market. Read more…

Choosing the Right GPU for LLM Inference and Training

December 11, 2023

Accelerating the training and inference processes of deep learning models is crucial for unleashing their true potential and NVIDIA GPUs have emerged as a game- Read more…

Intel’s Server and PC Chip Development Will Blur After 2025

January 15, 2024

Intel's dealing with much more than chip rivals breathing down its neck; it is simultaneously integrating a bevy of new technologies such as chiplets, artificia Read more…

Baidu Exits Quantum, Closely Following Alibaba’s Earlier Move

January 5, 2024

Reuters reported this week that Baidu, China’s giant e-commerce and services provider, is exiting the quantum computing development arena. Reuters reported � Read more…

Leading Solution Providers

Contributors

Comparing NVIDIA A100 and NVIDIA L40S: Which GPU is Ideal for AI and Graphics-Intensive Workloads?

October 30, 2023

With long lead times for the NVIDIA H100 and A100 GPUs, many organizations are looking at the new NVIDIA L40S GPU, which it’s a new GPU optimized for AI and g Read more…

Shutterstock 1179408610

Google Addresses the Mysteries of Its Hypercomputer 

December 28, 2023

When Google launched its Hypercomputer earlier this month (December 2023), the first reaction was, "Say what?" It turns out that the Hypercomputer is Google's t Read more…

AMD MI3000A

How AMD May Get Across the CUDA Moat

October 5, 2023

When discussing GenAI, the term "GPU" almost always enters the conversation and the topic often moves toward performance and access. Interestingly, the word "GPU" is assumed to mean "Nvidia" products. (As an aside, the popular Nvidia hardware used in GenAI are not technically... Read more…

Shutterstock 1606064203

Meta’s Zuckerberg Puts Its AI Future in the Hands of 600,000 GPUs

January 25, 2024

In under two minutes, Meta's CEO, Mark Zuckerberg, laid out the company's AI plans, which included a plan to build an artificial intelligence system with the eq Read more…

Google Introduces ‘Hypercomputer’ to Its AI Infrastructure

December 11, 2023

Google ran out of monikers to describe its new AI system released on December 7. Supercomputer perhaps wasn't an apt description, so it settled on Hypercomputer Read more…

China Is All In on a RISC-V Future

January 8, 2024

The state of RISC-V in China was discussed in a recent report released by the Jamestown Foundation, a Washington, D.C.-based think tank. The report, entitled "E Read more…

Intel Won’t Have a Xeon Max Chip with New Emerald Rapids CPU

December 14, 2023

As expected, Intel officially announced its 5th generation Xeon server chips codenamed Emerald Rapids at an event in New York City, where the focus was really o Read more…

IBM Quantum Summit: Two New QPUs, Upgraded Qiskit, 10-year Roadmap and More

December 4, 2023

IBM kicks off its annual Quantum Summit today and will announce a broad range of advances including its much-anticipated 1121-qubit Condor QPU, a smaller 133-qu Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire