The x86 Dynasty

By Michael Feldman

January 5, 2007

The longevity of the x86 architecture is perhaps one of the most surprising achievements of the Information Age thus far. Nobody, probably not even its Intel inventors, envisioned the dominance it has attained in the industry. After more than 25 years, the lowly x86 rules the all-important desktop, laptop and server markets.

For the past decade the x86 has been swallowing the high performance computing market, paralleling the rise of cluster computing. In the enterprise market, RISC/Unix boxes have been giving way to x86/Linux machines. And finally, with last year's conversion of Apple from PowerPC to Intel, the last bastion of non-x86 personal computers was removed from the desktop. In fact, had IBM anticipated the critical importance of desktop platform earlier and been a little quicker on the trigger with the development of the PowerPC chip, the whole history of computing might have followed a very different path.

As it was, the “Wintel” platform attracted a substantial software base in the 1980s before any RISC competitors could mount a challenge. The early accumulation of software, especially compiler/runtime tools and system software, created the initial momentum which propelled the x86 forward. With the thousands of applications that now run on x86 platforms, the cost of losing binary compatibility would be overwhelming for many users. It represents the technological version of the rich-get-richer syndrome: The bigger your market share, the more developers will be attracted to your architecture, which results in yet more market share.

Which brings us to the question: Will the x86 architecture ever lose its dominance? And if so, how will this happen? In 2020 it's conceivable that we'll be using terascale processors (and exascale supercomputers) based on the x86 ISA and implemented on post-CMOS technology. The demise of the x86 has been predicted before, so I hesitate to write its epitaph here. But all technologies have a lifespan and there is reason to believe that the architecture might not survive the age of terascale processors.

One problem to confront is that we're running out of Moore's Law. Before non-silicon-based processor technology — compound semiconductors, carbon nanotubes, nanowires, molecular electronics, three-dimensional transistor designs and spintronics — is developed and commercialized, the physics of sub-32nm process technology will constrain the number of transistors that can be placed on a die. The general-purpose x86 architecture, with its relatively complex instruction set, has to drag around a lot of transistors and microcode that have only limited utility for many types of computing, including high performance computing.

There's reason to believe that some the problems of sub-32nm technology will actually be solved, but most analysts believe CMOS-based silicon devices will no longer be practical at some point between 2015 and 2020. When this happens, transistor space on the die will become such a limiting factor that more efficient processor architectures will have an enormous advantage.

But even before that occurs, Intel and AMD may have moved beyond their x86 heritage. The current limitations of power consumption and heat dissipation are causing chipmakers to not only explore multi-core designs, but alternative processing engines as well. While the engineers at Intel and AMD have been extremely clever at increasing performance/watt, the market demand seems to be outstripping their efforts.

With the acquisition of ATI, AMD seems to have its sights set on a hybrid CPU-GPU approach, which could theoretically evolve away from strict x86 compatibility. The addition of GPU cores to general-purpose processors may be part of a trend that portends greater processor heterogeneity — the Cell chip being an early example. As for the x86-only roadmap, AMD has not publicized any plans beyond an 8-core processor. Of course, the company would be expected to change direction if their major customers demanded a many-core x86 solution.

Intel, itself, has actually tried to move beyond the x86 twice before (not counting the i432 processor), once with the i860/i960 chips and more recently with the Itanium processor. The failure of the i860 and the (as yet) unrealized potential of the Itanium shows how even Intel can be a victim of its own success. In 2006, the company previewed a very non-x86 80-core prototype of a terascale processor, which it expects to commercialize by the middle of the next decade. Intel will be showing the next prototype of this processor at the upcoming International Solid-State Circuits Conference next month in San Francisco. According to Intel, “the 65nm 100-million transistor die is designed to achieve a peak performance of 1.0 teraflops at 1V while dissipating 98 watts.”

With its (Niagara) UltraSPARC T1 chip, Sun Microsystems has demonstrated that a simplified processor can achieve much greater throughput than a more general-purpose architecture. The TI processor provides up to eight 4-way multithreaded cores (32 threads), while consuming just 72 watts. The processor is low on floating-point horsepower, making it unsuitable for scientific computing, but the design is well suited for Web servers and a wide variety of enterprise applications.

In contrast, SiCortex, an HPC cluster startup, developed a non-x86 architecture expressly targeted for high performance technical computing. Its MIPS-based chip holds six 64-bit CPUs, cache, two interleaved memory controllers, the interconnect fabric links and switch, a DMA Engine, and a PCI Express interface. The simplicity of the MIPS architecture enables a tightly integrated solution and claims two orders of magnitude more performance/watt compared to a typical x86 system. Their 5.8-teraflop, 8-terabyte cluster is housed in a single cabinet and consumes just 20 kilowatts of power. The system relies on GNU and PathScale compilers for the MIPS target and open source Linux to insulate the applications from the non-standard hardware.

The SiCortex case is interesting in another respect. The MIPS CPU, like many RISC chips, was a high-end processor that got relegated to the embedded market when it couldn't compete as a workstation chip. The embedded market is much more diversified than the desktop, laptop and server markets. The latter community runs a relatively limited set of applications, while embedded applications are much more diverse and include devices such as PDAs, laser printers, set-top boxes, network switches, automobile diagnostic controllers, game machines, etc. The diversity is reflected in the diversity of processors: PowerPC, MIPS, ARM, 68K, SPARC, and even x86. Due to the dynamic nature of the market, no processor has maintained dominance for any length of time.

But as power, heat and space constraints become increasingly important in the non-embedded world, the simpler, embedded RISC processors are looking more attractive. The simpler processor architectures enable more aggressive multi-core and multi-threaded designs. This advantage is especially important for HPC applications, where parallel throughput is usually much more critical than single thread performance. IBM's use of the energy-efficient PowerPC processors in its Blue Gene supercomputers is a reflection of this strategy.

While the end of the x86 dynasty will not happen in 2007, some of the forces that could end its dominance are already in motion. In a decade or so we'll probably look back at this time and wonder how we could ever have been so dependent on a single architecture for so long. Its 30-year reign will be seen as an anomalous blip in the early history of computer technology.

—–

As always, comments about HPCwire are welcomed and encouraged. Write to me, Michael Feldman, at [email protected].

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industry updates delivered to you every week!

MLPerf Inference 4.0 Results Showcase GenAI; Nvidia Still Dominates

March 28, 2024

There were no startling surprises in the latest MLPerf Inference benchmark (4.0) results released yesterday. Two new workloads — Llama 2 and Stable Diffusion XL — were added to the benchmark suite as MLPerf continues Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing power it brings to artificial intelligence.  Nvidia's DGX Read more…

Call for Participation in Workshop on Potential NSF CISE Quantum Initiative

March 26, 2024

Editor’s Note: Next month there will be a workshop to discuss what a quantum initiative led by NSF’s Computer, Information Science and Engineering (CISE) directorate could entail. The details are posted below in a Ca Read more…

Waseda U. Researchers Reports New Quantum Algorithm for Speeding Optimization

March 25, 2024

Optimization problems cover a wide range of applications and are often cited as good candidates for quantum computing. However, the execution time for constrained combinatorial optimization applications on quantum device Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at the network layer threatens to make bigger and brawnier pro Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HBM3E memory as well as the the ability to train 1 trillion pa Read more…

MLPerf Inference 4.0 Results Showcase GenAI; Nvidia Still Dominates

March 28, 2024

There were no startling surprises in the latest MLPerf Inference benchmark (4.0) results released yesterday. Two new workloads — Llama 2 and Stable Diffusion Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing po Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HB Read more…

Nvidia Looks to Accelerate GenAI Adoption with NIM

March 19, 2024

Today at the GPU Technology Conference, Nvidia launched a new offering aimed at helping customers quickly deploy their generative AI applications in a secure, s Read more…

The Generative AI Future Is Now, Nvidia’s Huang Says

March 19, 2024

We are in the early days of a transformative shift in how business gets done thanks to the advent of generative AI, according to Nvidia CEO and cofounder Jensen Read more…

Nvidia’s New Blackwell GPU Can Train AI Models with Trillions of Parameters

March 18, 2024

Nvidia's latest and fastest GPU, codenamed Blackwell, is here and will underpin the company's AI plans this year. The chip offers performance improvements from Read more…

Nvidia Showcases Quantum Cloud, Expanding Quantum Portfolio at GTC24

March 18, 2024

Nvidia’s barrage of quantum news at GTC24 this week includes new products, signature collaborations, and a new Nvidia Quantum Cloud for quantum developers. Wh Read more…

Alibaba Shuts Down its Quantum Computing Effort

November 30, 2023

In case you missed it, China’s e-commerce giant Alibaba has shut down its quantum computing research effort. It’s not entirely clear what drove the change. Read more…

Nvidia H100: Are 550,000 GPUs Enough for This Year?

August 17, 2023

The GPU Squeeze continues to place a premium on Nvidia H100 GPUs. In a recent Financial Times article, Nvidia reports that it expects to ship 550,000 of its lat Read more…

Shutterstock 1285747942

AMD’s Horsepower-packed MI300X GPU Beats Nvidia’s Upcoming H200

December 7, 2023

AMD and Nvidia are locked in an AI performance battle – much like the gaming GPU performance clash the companies have waged for decades. AMD has claimed it Read more…

DoD Takes a Long View of Quantum Computing

December 19, 2023

Given the large sums tied to expensive weapon systems – think $100-million-plus per F-35 fighter – it’s easy to forget the U.S. Department of Defense is a Read more…

Synopsys Eats Ansys: Does HPC Get Indigestion?

February 8, 2024

Recently, it was announced that Synopsys is buying HPC tool developer Ansys. Started in Pittsburgh, Pa., in 1970 as Swanson Analysis Systems, Inc. (SASI) by John Swanson (and eventually renamed), Ansys serves the CAE (Computer Aided Engineering)/multiphysics engineering simulation market. Read more…

Choosing the Right GPU for LLM Inference and Training

December 11, 2023

Accelerating the training and inference processes of deep learning models is crucial for unleashing their true potential and NVIDIA GPUs have emerged as a game- Read more…

Intel’s Server and PC Chip Development Will Blur After 2025

January 15, 2024

Intel's dealing with much more than chip rivals breathing down its neck; it is simultaneously integrating a bevy of new technologies such as chiplets, artificia Read more…

Baidu Exits Quantum, Closely Following Alibaba’s Earlier Move

January 5, 2024

Reuters reported this week that Baidu, China’s giant e-commerce and services provider, is exiting the quantum computing development arena. Reuters reported � Read more…

Leading Solution Providers

Contributors

Comparing NVIDIA A100 and NVIDIA L40S: Which GPU is Ideal for AI and Graphics-Intensive Workloads?

October 30, 2023

With long lead times for the NVIDIA H100 and A100 GPUs, many organizations are looking at the new NVIDIA L40S GPU, which it’s a new GPU optimized for AI and g Read more…

Shutterstock 1179408610

Google Addresses the Mysteries of Its Hypercomputer 

December 28, 2023

When Google launched its Hypercomputer earlier this month (December 2023), the first reaction was, "Say what?" It turns out that the Hypercomputer is Google's t Read more…

AMD MI3000A

How AMD May Get Across the CUDA Moat

October 5, 2023

When discussing GenAI, the term "GPU" almost always enters the conversation and the topic often moves toward performance and access. Interestingly, the word "GPU" is assumed to mean "Nvidia" products. (As an aside, the popular Nvidia hardware used in GenAI are not technically... Read more…

Shutterstock 1606064203

Meta’s Zuckerberg Puts Its AI Future in the Hands of 600,000 GPUs

January 25, 2024

In under two minutes, Meta's CEO, Mark Zuckerberg, laid out the company's AI plans, which included a plan to build an artificial intelligence system with the eq Read more…

Google Introduces ‘Hypercomputer’ to Its AI Infrastructure

December 11, 2023

Google ran out of monikers to describe its new AI system released on December 7. Supercomputer perhaps wasn't an apt description, so it settled on Hypercomputer Read more…

China Is All In on a RISC-V Future

January 8, 2024

The state of RISC-V in China was discussed in a recent report released by the Jamestown Foundation, a Washington, D.C.-based think tank. The report, entitled "E Read more…

Intel Won’t Have a Xeon Max Chip with New Emerald Rapids CPU

December 14, 2023

As expected, Intel officially announced its 5th generation Xeon server chips codenamed Emerald Rapids at an event in New York City, where the focus was really o Read more…

IBM Quantum Summit: Two New QPUs, Upgraded Qiskit, 10-year Roadmap and More

December 4, 2023

IBM kicks off its annual Quantum Summit today and will announce a broad range of advances including its much-anticipated 1121-qubit Condor QPU, a smaller 133-qu Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire