Model Based Computing

By Michael Feldman

March 16, 2007

For the past year or so, Intel has been talking up RMS, an application software model for terascale computing. RMS, which stands for Recognition, Mining and Synthesis, is the class of software that Intel believes will represent the killer apps of the not-too-distant future — 2010 and beyond. These applications will require the capabilities of terascale processors — teraflop performance processing terabytes of data.

RMS applications are used to manipulate complex models, which can be either objects or events. The three components of RMS describe its function. Recognition involves defining the model; mining has to do with sifting through datasets for instances of that model; and synthesis performs “what-if” types of calculations on the model to yield predictions or solutions.

For example in financial markets, there is a deluge of real-time data being generated for all types of traded options (bonds, stocks, currency). This makes qualitative financial analysis somewhat of a guessing game. RMS might change that. A trader would be able to define a model of an attractive options investment (recognition). Once an investment of this type is found (mining), an algorithm could be applied to provide the trader with the different levels of risk and potential return (synthesis) in a given economic environment. The application doesn't provide the trader with an answer, per se, just guidance on which investments are more likely to yield good returns under different sets of economic conditions (interest rates, currency rates, stock P/E ratios, etc.).

Other examples can be found in a variety areas, such as medicine (cancer treatment), security (terrorist threat identification), communication (real-time language translation), retail (virtual apparel shopping), and transportation (automated vehicle control), to name a few. In fact, it would be hard to find an area of human endeavor that would not be able to take advantage of RMS systems. After all, virtually everything we encounter in the real world can be modeled.

“It's a very powerful paradigm for dissecting problems,” says Jerry Bautista, Director of Technology Management for Intel's Microprocessor Research Laboratory and co-director of Intel's Terascale Program. “It has tremendous application in almost anyplace you look. We're trying to use the computer to suggest a course of action. That's a lot more powerful than Google, where you're just trying to find something.”

The fact that RMS application must manipulate whole models, rather than lower level constructs, not only means that more computing power is required, but also more sophisticated software.

“The problem is ordinary computers don't model things,” said Pradeep Dubey, Senior Principal Engineer, Manager of Innovative Platform Architecture Microprocessor Technology Lab, Intel. “Aside from supercomputers, today's computers aren't capable of developing mathematical models of complex objects, systems or processes.”

An important feature of this model is the interactive nature of the applications. This works on a couple of different levels. The first is that the types of applications being envisioned usually have to deal with real-time data input, and then turn around and generate timely output. For the options trading application above, it means that the investment predictions must be timely; an opportunity may no longer be relevant after a few hours, or perhaps even minutes.

Another aspect to the interactiveness is the ability of the software to learn, through the feedback of the mining and/or synthesis operations. Again using the example of the options trading app, the application could track actual performance of trades it identified and use that information to refine the original model of what defines an attractive investment.

“In this new approach, it doesn't matter how good the model is to begin with,” explains Dubey. “The use of real-time feedback loops can make the software much more powerful than static applications.”

If this is starting to sound like Artificial Intelligence (AI), it's because it is — or was. Intel tends to shy away from such jargon, since the AI term has become rather loaded. But the idea of an application suggesting outcomes or solutions is more akin to what humans do. It's been the Holy Grail of computing for 50 years. Intel's Terascale Program can be seen as the company's attempt to encapsulate this classic goal in a new way.

“The Terascale Program is not the case of Intel just flexing its hardware muscle and deciding this is the next thing to do,” says Bautista. “We actually started this RMS research several years ago, and we were driven by the applications themselves. We thought that they were compelling and had broad applicability — not just for high-end users but also for normal people to use in their homes.”

Certainly, if people were able to buy systems capable of such things as natural language recognition or image-based data mining, they would be in demand today. For these applications to be useful, nothing else needs to happen — except for the systems to be invented.

According to Bautista, Intel's RMS research is very well integrated into the company's overall technology strategy. They're not off working in a corner by themselves, he says. The RMS development is driving the direction for a variety of hardware technologies looking three to seven years out.

The nature of model-based computing points to certain hardware capabilities. Some of those capabilities are embodied in Intel's 80-core terascale processor prototype, demonstrated recently at the Integrated Solid State Circuits Conference. The basic idea is to compute in a highly parallel fashion and move data around very quickly between processors, memory and external devices.

Parallelism is a big part of it. RMS workloads have an insatiable appetite for computing power. Forget dual-core. Applications that manipulate models demand manycore architectures, supporting hundreds of threads. An RMS program will need the computational performance of a supercomputer or entire datacenter.

Another requirement is high processor-to-memory bandwidth. Intel is considering several approaches to scale the memory wall problem. The first is to place memory chips in the same package as the processor. Another approach is to stack memory chips underneath the processor — something the company has suggested it will do in a future prototype of its terascale processor. Lastly, memory can be placed on the chip, something already done on a relatively small scale with cache memory.

Since the RMS apps will access large dynamic data sets, high performance I/O is another key requirement. Intel has produced early demonstrations of silicon-based photonics, a model that could be used to increase I/O communication by a couple orders of magnitude (terabits of data per second). The only question mark for silicon photonics is if the technology can be implemented economically on standard semiconductors.

While the production of general-purpose terascale hardware in one form or another is almost a sure thing within the next five years, the software is another matter. The highly parallel nature of a future teraflop processor means that new classes of software and software technologies will have to be developed if the average programmer is going to be able to write applications for them. Parallel computing represents a paradigm where the hardware pretty quickly outruns the ability of developers to program it. That's why Intel is starting to think about these issues today.

The company is partnering with other organizations to move the effort along. Intel has been awarding research grants to a number of academic institutions to work on the fundamental problems associated with RMS software. In addition they've been seeding advanced software curriculums (i.e., courses in parallel computing) at over 40 colleges and universities, and are looking to add 100 more institutions this year. According to Bautista, the RMS work at Intel has progressed more rapidly than they anticipated, so they've become more aggressive in getting academia to catch up. Now that hardware prototypes are available, he expects the work will begin to accelerate.

In addition, Intel's Software Solutions Group is actively collaborating with Microsoft and others in the ISV community to help them prepare for the new application model. According to Bautista, ISVs are quite enthusiastic about terascale applications and the model-based paradigm.

“To be honest,” says Bautista, “the discussion usually end up with them saying: 'When can we get this thing? If I had it, I'd use it today.'”

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

SC19 Student Cluster Competition: Know Your Teams

November 19, 2019

I’m typing this live from Denver, the location of the 2019 Student Cluster Competition… and, oh yeah, the annual SC conference too. The attendance this year should be north of 13,000 people, with the majority attende Read more…

By Dan Olds

Top500: US Maintains Performance Lead; Arm Tops Green500

November 18, 2019

The 54th Top500, revealed today at SC19, is a familiar list: the U.S. Summit (ORNL) and Sierra (LLNL) machines, offering 148.6 and 94.6 petaflops respectively, remain in first and second place. The only new entrants in t Read more…

By Tiffany Trader

ScaleMatrix and Nvidia Launch ‘Deploy Anywhere’ DGX HPC and AI in a Controlled Enclosure

November 18, 2019

HPC and AI in a phone booth: ScaleMatrix and Nvidia announced today at the SC19 conference in Denver a joint offering that puts up to 13 petaflops of Nvidia DGX-1 compute power in an air conditioned, water-cooled ScaleMa Read more…

By Doug Black

HPE and NREL Collaborate on AI Ops to Accelerate Exascale Efficiency and Resilience

November 18, 2019

The ever-expanding complexity of high-performance computing continues to elevate the concerns posed by massive energy consumption and increasing points of failure. Now, the AI Ops collaboration between Hewlett Packard En Read more…

By Oliver Peckham

Intel Debuts New GPU – Ponte Vecchio – and Outlines Aspirations for oneAPI

November 17, 2019

Intel today revealed a few more details about its forthcoming Xe line of GPUs – the top SKU is named Ponte Vecchio and will be used in Aurora, the first planned U.S. exascale computer. Intel also provided a glimpse of Read more…

By John Russell

AWS Solution Channel

Making High Performance Computing Affordable and Accessible for Small and Medium Businesses with HPC on AWS

High performance computing (HPC) brings a powerful set of tools to a broad range of industries, helping to drive innovation and boost revenue in finance, genomics, oil and gas extraction, and other fields. Read more…

IBM Accelerated Insights

Data Management – The Key to a Successful AI Project

 

Five characteristics of an awesome AI data infrastructure

[Attend the IBM LSF & HPC User Group Meeting at SC19 in Denver on November 19!]

AI is powered by data

While neural networks seem to get all the glory, data is the unsung hero of AI projects – data lies at the heart of everything from model training to tuning to selection to validation. Read more…

SC19: Welcome to Denver

November 17, 2019

A significant swath of the HPC community has come to Denver for SC19, which began today (Sunday) with a rich technical program. As is customary, the ribbon cutting for the Expo Hall opening is Monday at 6:45pm, with the Read more…

By Tiffany Trader

Top500: US Maintains Performance Lead; Arm Tops Green500

November 18, 2019

The 54th Top500, revealed today at SC19, is a familiar list: the U.S. Summit (ORNL) and Sierra (LLNL) machines, offering 148.6 and 94.6 petaflops respectively, Read more…

By Tiffany Trader

ScaleMatrix and Nvidia Launch ‘Deploy Anywhere’ DGX HPC and AI in a Controlled Enclosure

November 18, 2019

HPC and AI in a phone booth: ScaleMatrix and Nvidia announced today at the SC19 conference in Denver a joint offering that puts up to 13 petaflops of Nvidia DGX Read more…

By Doug Black

Intel Debuts New GPU – Ponte Vecchio – and Outlines Aspirations for oneAPI

November 17, 2019

Intel today revealed a few more details about its forthcoming Xe line of GPUs – the top SKU is named Ponte Vecchio and will be used in Aurora, the first plann Read more…

By John Russell

SC19: Welcome to Denver

November 17, 2019

A significant swath of the HPC community has come to Denver for SC19, which began today (Sunday) with a rich technical program. As is customary, the ribbon cutt Read more…

By Tiffany Trader

SC19’s HPC Impact Showcase Chair: AI + HPC a ‘Speed Train’

November 16, 2019

This year’s chair of the HPC Impact Showcase at the SC19 conference in Denver is Lori Diachin, who has spent her career at the spearhead of HPC. Currently deputy director for the U.S. Department of Energy’s (DOE) Exascale Computing Project (ECP), Diachin is also... Read more…

By Doug Black

Cray, Fujitsu Both Bringing Fujitsu A64FX-based Supercomputers to Market in 2020

November 12, 2019

The number of top-tier HPC systems makers has shrunk due to a steady march of M&A activity, but there is increased diversity and choice of processing compon Read more…

By Tiffany Trader

Intel AI Summit: New ‘Keem Bay’ Edge VPU, AI Product Roadmap

November 12, 2019

At its AI Summit today in San Francisco, Intel touted a raft of AI training and inference hardware for deployments ranging from cloud to edge and designed to support organizations at various points of their AI journeys. The company revealed its Movidius Myriad Vision Processing Unit (VPU)... Read more…

By Doug Black

IBM Adds Support for Ion Trap Quantum Technology to Qiskit

November 11, 2019

After years of percolating in the shadow of quantum computing research based on superconducting semiconductors – think IBM, Rigetti, Google, and D-Wave (quant Read more…

By John Russell

Supercomputer-Powered AI Tackles a Key Fusion Energy Challenge

August 7, 2019

Fusion energy is the Holy Grail of the energy world: low-radioactivity, low-waste, zero-carbon, high-output nuclear power that can run on hydrogen or lithium. T Read more…

By Oliver Peckham

Using AI to Solve One of the Most Prevailing Problems in CFD

October 17, 2019

How can artificial intelligence (AI) and high-performance computing (HPC) solve mesh generation, one of the most commonly referenced problems in computational engineering? A new study has set out to answer this question and create an industry-first AI-mesh application... Read more…

By James Sharpe

Cray Wins NNSA-Livermore ‘El Capitan’ Exascale Contract

August 13, 2019

Cray has won the bid to build the first exascale supercomputer for the National Nuclear Security Administration (NNSA) and Lawrence Livermore National Laborator Read more…

By Tiffany Trader

DARPA Looks to Propel Parallelism

September 4, 2019

As Moore’s law runs out of steam, new programming approaches are being pursued with the goal of greater hardware performance with less coding. The Defense Advanced Projects Research Agency is launching a new programming effort aimed at leveraging the benefits of massive distributed parallelism with less sweat. Read more…

By George Leopold

AMD Launches Epyc Rome, First 7nm CPU

August 8, 2019

From a gala event at the Palace of Fine Arts in San Francisco yesterday (Aug. 7), AMD launched its second-generation Epyc Rome x86 chips, based on its 7nm proce Read more…

By Tiffany Trader

D-Wave’s Path to 5000 Qubits; Google’s Quantum Supremacy Claim

September 24, 2019

On the heels of IBM’s quantum news last week come two more quantum items. D-Wave Systems today announced the name of its forthcoming 5000-qubit system, Advantage (yes the name choice isn’t serendipity), at its user conference being held this week in Newport, RI. Read more…

By John Russell

Ayar Labs to Demo Photonics Chiplet in FPGA Package at Hot Chips

August 19, 2019

Silicon startup Ayar Labs continues to gain momentum with its DARPA-backed optical chiplet technology that puts advanced electronics and optics on the same chip Read more…

By Tiffany Trader

Crystal Ball Gazing: IBM’s Vision for the Future of Computing

October 14, 2019

Dario Gil, IBM’s relatively new director of research, painted a intriguing portrait of the future of computing along with a rough idea of how IBM thinks we’ Read more…

By John Russell

Leading Solution Providers

ISC 2019 Virtual Booth Video Tour

CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
GOOGLE
GOOGLE
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
VERNE GLOBAL
VERNE GLOBAL

Intel Confirms Retreat on Omni-Path

August 1, 2019

Intel Corp.’s plans to make a big splash in the network fabric market for linking HPC and other workloads has apparently belly-flopped. The chipmaker confirmed to us the outlines of an earlier report by the website CRN that it has jettisoned plans for a second-generation version of its Omni-Path interconnect... Read more…

By Staff report

Kubernetes, Containers and HPC

September 19, 2019

Software containers and Kubernetes are important tools for building, deploying, running and managing modern enterprise applications at scale and delivering enterprise software faster and more reliably to the end user — while using resources more efficiently and reducing costs. Read more…

By Daniel Gruber, Burak Yenier and Wolfgang Gentzsch, UberCloud

Dell Ramps Up HPC Testing of AMD Rome Processors

October 21, 2019

Dell Technologies is wading deeper into the AMD-based systems market with a growing evaluation program for the latest Epyc (Rome) microprocessors from AMD. In a Read more…

By John Russell

Cray, Fujitsu Both Bringing Fujitsu A64FX-based Supercomputers to Market in 2020

November 12, 2019

The number of top-tier HPC systems makers has shrunk due to a steady march of M&A activity, but there is increased diversity and choice of processing compon Read more…

By Tiffany Trader

Rise of NIH’s Biowulf Mirrors the Rise of Computational Biology

July 29, 2019

The story of NIH’s supercomputer Biowulf is fascinating, important, and in many ways representative of the transformation of life sciences and biomedical res Read more…

By John Russell

Xilinx vs. Intel: FPGA Market Leaders Launch Server Accelerator Cards

August 6, 2019

The two FPGA market leaders, Intel and Xilinx, both announced new accelerator cards this week designed to handle specialized, compute-intensive workloads and un Read more…

By Doug Black

When Dense Matrix Representations Beat Sparse

September 9, 2019

In our world filled with unintended consequences, it turns out that saving memory space to help deal with GPU limitations, knowing it introduces performance pen Read more…

By James Reinders

With the Help of HPC, Astronomers Prepare to Deflect a Real Asteroid

September 26, 2019

For years, NASA has been running simulations of asteroid impacts to understand the risks (and likelihoods) of asteroids colliding with Earth. Now, NASA and the European Space Agency (ESA) are preparing for the next, crucial step in planetary defense against asteroid impacts: physically deflecting a real asteroid. Read more…

By Oliver Peckham

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This