Intel Outlines Its HPC Strategy

By Steve Conway

March 16, 2007

Intel has been involved in HPC for more than 15 years. HPCwire asked Stephen Wheat, senior director of Intel's HPC Business Unit, about the company's perspective on HPC as a technology and business market.

HPCwire: What HPC activities is Intel involved in today, beyond supplying processors to HPC systems vendors?

Wheat: Intel is both leading and collaborating on a range of worldwide HPC activities. Aside from developing processors, chipsets and memory subsystems, Intel also has a major platform orientation. Intel works with worldwide Fellow Travelers, which include hardware and software vendors, to deliver and optimize solutions for HPC users. Aside from the hardware platform, Intel makes major investments in software at the applications and middleware levels, including performance analysis tools and an industry-standard MPI implementation that independent software vendors can utilize to maximize their compatibility. Additionally, there is much collaboration with the operating system vendors to ensure the systems software is ready for the latest Intel technology.

HPCwire: Where does HPC fit within Intel's overall technical and market strategy?

Wheat: While Intel has been involved in the HPC market segment for more than 15 years, we have recently formed an HPC business unit. From the standpoint of technical strategy, Intel looks at the HPC market as two segments, high-end and volume HPC. At the high end, there is a technology incubation market for rapid adopters. Beyond that, there is a proven technology segment for the rest of the market. The traditional, high-end segment is much more tolerant of rapid changes and is open to taking advantage of the latest technologies. It can be much more adaptable than segments that are compliance-bound or have a certification process and find it harder to take on new technology. We work directly with the end-user communities in these segments to identify their goals and how we can help achieve them.

In the near term, we look at what product offerings we can add to our lineup, in conjunction with our OEMs and the technology they produce. For Intel, the high-end incubation segment is a place to deploy enabling technology in the near term, and also represents an investment in potential volume technology for the rest of the HPC market and broader production-oriented markets. Incubation is about working to meet the needs of rapid adopters in order to get a larger, more stable group moving to greater performance levels as quickly as possible. We try to help push the innovation downward; and the production, volume-market requirements act as positive constraints on the incubation technology as it trickles down. We're always mindful of what volume segments need as we explore the cutting edge.

HPCwire: Does Intel view HPC as a sector that could provide a worthwhile return-on-investment for the company?

Wheat: Yes. We see the HPC market segment as a growing and viable business opportunity. However, we rarely look at the HPC segment in isolation. HPC innovation quickly migrates into the enterprise segment. There are many opportunities for HPC to influence offerings in the larger markets. Providing a technology pipeline from HPC to the volume enterprise market gives us an opportunity to greatly increase the ROI of our leadership technologies that we first explored and deployed in the HPC market segment.

HPCwire: Is Intel making an R&D investment in HPC, separate from the company's R&D investments in other areas? If so, can you describe the goals for this investment?

Wheat: While we don’t break out our R&D investments, we consider the HPC segment a critical market for technology adoption. We continue to deliver new products and technologies that bring new levels of performance and energy efficiency to this market. An example of this is our new quad-core Intel Xeon processor. Another example is the 80-core terascale research chip that Intel recently announced. While this is not a product, it does demonstrate the type of research and development that Intel is known for.

HPCwire: In five years, what role would Intel want to play within the HPC market?

Wheat: Our goal is to be the platform of choice and deliver technology that brings new levels of performance and energy efficiency for high performance computing. We pursue this goal with a balanced approach to the high-end capability market and the higher-volume capacity market within HPC. Over the next five years, the definition of success would be the clear leadership in HPC market segment share in both the high-end and in the volume part of the market. With the widespread customer acceptance and leadership in performance per watt, price performance, and general applicability to the myriad HPC applications, Intel’s current Core-microarchitecture-based processor line-up, including our currently shipping Quad Core Intel Xeon Processors, is a timely example of such an accomplishment.
 
HPCwire: In an earlier era, the Intel Paragon was the world's fastest Linpack machine. Will Intel ever get back into the business of creating and selling HPC systems?

Wheat: We never say never; however, developing HPC systems that are sold to end users is not our core competency. Having said that, the high-end is requiring increased cooperation between leadership companies to meet the unique challenges posed by the high-end segment. For example, the NSF Cyberinfrastructure program in the USA and the Petascale initiative in Europe each requires a comprehensive approach best achieved by technology collaborations. Therefore we expect to be a very active participant and contributor with our systems customers in the pursuit of opportunities in the high end.

In this way, Intel is best able to support the needs of the HPC market segment more than we had in the past, when we had our own direct product model up through the Paragon platform.

After the Paragon, which was on a non-mainstream i860 Intel processor, Intel developed the ASCI Red machine based on the Intel Pentium Pro Processor, which was our fastest mainstream processor at that time. What we showed there was that industry-standard processors could indeed be the basis of the most powerful computers. We saw several OEMs pursuing similar system designs and concluded it would be best to move forward via a Fellow Traveler strategy. In doing so, we could also support a variety of scale-up and scale-out designs. That's the role we took to increase our influence on the market.

Since then, we have increased the scope of influence, having moved from the basic building blocks model to our platform model where we comprehend how all the ingredients, including software, come together. In the commercial enterprise market, a platform is a server with the relevant software stacks readily available. In the HPC markets, multiple individual systems make up an HPC platform, which then includes the cluster management and provisioning software. Intel participates directly in all of the intermediate levels of integration, but it stops short of marketing a completed system directly to the end-user community.

HPCwire: What are the main things differentiating Intel from other microprocessor companies, where HPC is concerned?

Wheat: First and foremost, Intel's process technology and our ability to apply it to the volume market-at-large, and to make use of this in HPC offerings. No other company has our volume at 65nm, and we will be first with 45nm, then 32nm and so on. That foundation is our greatest differentiation. We can produce high-performance building blocks in a volume that permits us to have very competitive price-performance. The landing zones for trickle down technology are plentiful. There are many opportunities for Intel's high-end technologies to succeed in higher-volume markets. Consequently, our philosophy of innovation and integration will continue to out-pace that of other companies.

Additionally, across the entire ecosystem, Intel brings a level of participation, both driving and supporting platform integration, that is much broader than others. This includes working with the OSVs [Operating System Vendors], IHVs [Independant Hardware Vendors], and ISVs [Independant Software Vendors] at unmatched scales.

HPCwire: Increases in processor clock speed have slowed down significantly. Are there any new technologies on the horizon that could put single-core performance back on a Moore's Law kind of curve?

Wheat: Recent clock speed trends are very real and are due to the broad sensitivity toward power consumption in both enterprise and HPC market segments. The broad market is clearly favoring flops-per-watt over pure flops-per-second. Having said that, we do consider offerings where we increase the clock rate, along with thermal consequences for those who can make use of hotter parts. But in general, performance-per-watt is crucial, and multicores are the market trend for both HPC and the enterprise market.

HPCwire: Multicore processors create new challenges, such as finding enough parallelism within codes and supplying enough bandwidth to each core. As the HPC industry moves to larger numbers of cores, these problems intensify. How does Intel view this issue?

Wheat: Parallelism is an active area of research at Intel. Understanding codes and the mathematics and physics of the problems presents an opportunity to revisit how the algorithms are designed in order to exploit the latest-generation architectures. Application developers typically design for the platforms at hand, and multicore will give them a different platform to deal with. Intel internally has a large investment in the software environment for exploiting multicore platforms. We also work closely with leading academic institutions, standards bodies and our OEMs on the whole ecosystem.

HPCwire: Do you have a many-core (greater than, say, 8 cores) strategy for your x86 and Itanium architectures? If so, will these be part of your HPC strategy? How about the many-core Polaris terascale processor?

Wheat: It's too soon for us to respond to those questions in detail publicly. However, as recently disclosed, the 80-core teraflops research chip demonstrates our technology exploration and research in this area.

HPCwire: With the slowdown in single-core microprocessor progress, a growing variety of custom processors and co-processors are showing up in the HPC market: Cell, SiCortex, FPGAs, GPUs, vector processors, massively multithreaded processors, etc. Many of the world's petascale machine initiatives involve heterogeneous processors. How far will Intel go to embrace this diversity?

Wheat: Intel is about choice at all levels because we do want to be the platform of choice. Heterogeneous computing will be easy to deploy with our PCI Express roadmap. And through the Geneseo program, we are laying the foundation with a large community to ensure that heterogeneous computing is serviced very well. The greater challenge is not so much the connectivity, but the software that allows heterogeneous computing to have continuous benefit. It's important for a platform using an accelerator-of-choice one year to work with next-generation and prior-generation processors. That's a major software challenge. We believe the market will welcome accelerators that make sense and that can support software continuity from one generation to the next.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Top500: US Maintains Performance Lead; Arm Tops Green500

November 18, 2019

The 54th Top500, revealed today at SC19, is a familiar list: the U.S. Summit (ORNL) and Sierra (LLNL) machines, offering 148.6 and 94.6 petaflops respectively, remain in first and second place. The only new entrants in t Read more…

By Tiffany Trader

ScaleMatrix and Nvidia Launch ‘Deploy Anywhere’ DGX HPC and AI in a Controlled Enclosure

November 18, 2019

HPC and AI in a phone booth: ScaleMatrix and Nvidia announced today at the SC19 conference in Denver a joint offering that puts up to 13 petaflops of Nvidia DGX-1 compute power in an air conditioned, water-cooled ScaleMa Read more…

By Doug Black

HPE and NREL Collaborate on AI Ops to Accelerate Exascale Efficiency and Resilience

November 18, 2019

The ever-expanding complexity of high-performance computing continues to elevate the concerns posed by massive energy consumption and increasing points of failure. Now, the AI Ops collaboration between Hewlett Packard En Read more…

By Oliver Peckham

Intel Debuts New GPU – Ponte Vecchio – and Outlines Aspirations for oneAPI

November 17, 2019

Intel today revealed a few more details about its forthcoming Xe line of GPUs – the top SKU is named Ponte Vecchio and will be used in Aurora, the first planned U.S. exascale computer. Intel also provided a glimpse of Read more…

By John Russell

SC19: Welcome to Denver

November 17, 2019

A significant swath of the HPC community has come to Denver for SC19, which began today (Sunday) with a rich technical program. As is customary, the ribbon cutting for the Expo Hall opening is Monday at 6:45pm, with the Read more…

By Tiffany Trader

AWS Solution Channel

Making High Performance Computing Affordable and Accessible for Small and Medium Businesses with HPC on AWS

High performance computing (HPC) brings a powerful set of tools to a broad range of industries, helping to drive innovation and boost revenue in finance, genomics, oil and gas extraction, and other fields. Read more…

IBM Accelerated Insights

Data Management – The Key to a Successful AI Project

 

Five characteristics of an awesome AI data infrastructure

[Attend the IBM LSF & HPC User Group Meeting at SC19 in Denver on November 19!]

AI is powered by data

While neural networks seem to get all the glory, data is the unsung hero of AI projects – data lies at the heart of everything from model training to tuning to selection to validation. Read more…

SC19’s HPC Impact Showcase Chair: AI + HPC a ‘Speed Train’

November 16, 2019

This year’s chair of the HPC Impact Showcase at the SC19 conference in Denver is Lori Diachin, who has spent her career at the spearhead of HPC. Currently deputy director for the U.S. Department of Energy’s (DOE) Exascale Computing Project (ECP), Diachin is also... Read more…

By Doug Black

Top500: US Maintains Performance Lead; Arm Tops Green500

November 18, 2019

The 54th Top500, revealed today at SC19, is a familiar list: the U.S. Summit (ORNL) and Sierra (LLNL) machines, offering 148.6 and 94.6 petaflops respectively, Read more…

By Tiffany Trader

ScaleMatrix and Nvidia Launch ‘Deploy Anywhere’ DGX HPC and AI in a Controlled Enclosure

November 18, 2019

HPC and AI in a phone booth: ScaleMatrix and Nvidia announced today at the SC19 conference in Denver a joint offering that puts up to 13 petaflops of Nvidia DGX Read more…

By Doug Black

Intel Debuts New GPU – Ponte Vecchio – and Outlines Aspirations for oneAPI

November 17, 2019

Intel today revealed a few more details about its forthcoming Xe line of GPUs – the top SKU is named Ponte Vecchio and will be used in Aurora, the first plann Read more…

By John Russell

SC19: Welcome to Denver

November 17, 2019

A significant swath of the HPC community has come to Denver for SC19, which began today (Sunday) with a rich technical program. As is customary, the ribbon cutt Read more…

By Tiffany Trader

SC19’s HPC Impact Showcase Chair: AI + HPC a ‘Speed Train’

November 16, 2019

This year’s chair of the HPC Impact Showcase at the SC19 conference in Denver is Lori Diachin, who has spent her career at the spearhead of HPC. Currently deputy director for the U.S. Department of Energy’s (DOE) Exascale Computing Project (ECP), Diachin is also... Read more…

By Doug Black

Cray, Fujitsu Both Bringing Fujitsu A64FX-based Supercomputers to Market in 2020

November 12, 2019

The number of top-tier HPC systems makers has shrunk due to a steady march of M&A activity, but there is increased diversity and choice of processing compon Read more…

By Tiffany Trader

Intel AI Summit: New ‘Keem Bay’ Edge VPU, AI Product Roadmap

November 12, 2019

At its AI Summit today in San Francisco, Intel touted a raft of AI training and inference hardware for deployments ranging from cloud to edge and designed to support organizations at various points of their AI journeys. The company revealed its Movidius Myriad Vision Processing Unit (VPU)... Read more…

By Doug Black

IBM Adds Support for Ion Trap Quantum Technology to Qiskit

November 11, 2019

After years of percolating in the shadow of quantum computing research based on superconducting semiconductors – think IBM, Rigetti, Google, and D-Wave (quant Read more…

By John Russell

Supercomputer-Powered AI Tackles a Key Fusion Energy Challenge

August 7, 2019

Fusion energy is the Holy Grail of the energy world: low-radioactivity, low-waste, zero-carbon, high-output nuclear power that can run on hydrogen or lithium. T Read more…

By Oliver Peckham

Using AI to Solve One of the Most Prevailing Problems in CFD

October 17, 2019

How can artificial intelligence (AI) and high-performance computing (HPC) solve mesh generation, one of the most commonly referenced problems in computational engineering? A new study has set out to answer this question and create an industry-first AI-mesh application... Read more…

By James Sharpe

Cray Wins NNSA-Livermore ‘El Capitan’ Exascale Contract

August 13, 2019

Cray has won the bid to build the first exascale supercomputer for the National Nuclear Security Administration (NNSA) and Lawrence Livermore National Laborator Read more…

By Tiffany Trader

DARPA Looks to Propel Parallelism

September 4, 2019

As Moore’s law runs out of steam, new programming approaches are being pursued with the goal of greater hardware performance with less coding. The Defense Advanced Projects Research Agency is launching a new programming effort aimed at leveraging the benefits of massive distributed parallelism with less sweat. Read more…

By George Leopold

AMD Launches Epyc Rome, First 7nm CPU

August 8, 2019

From a gala event at the Palace of Fine Arts in San Francisco yesterday (Aug. 7), AMD launched its second-generation Epyc Rome x86 chips, based on its 7nm proce Read more…

By Tiffany Trader

D-Wave’s Path to 5000 Qubits; Google’s Quantum Supremacy Claim

September 24, 2019

On the heels of IBM’s quantum news last week come two more quantum items. D-Wave Systems today announced the name of its forthcoming 5000-qubit system, Advantage (yes the name choice isn’t serendipity), at its user conference being held this week in Newport, RI. Read more…

By John Russell

Ayar Labs to Demo Photonics Chiplet in FPGA Package at Hot Chips

August 19, 2019

Silicon startup Ayar Labs continues to gain momentum with its DARPA-backed optical chiplet technology that puts advanced electronics and optics on the same chip Read more…

By Tiffany Trader

Crystal Ball Gazing: IBM’s Vision for the Future of Computing

October 14, 2019

Dario Gil, IBM’s relatively new director of research, painted a intriguing portrait of the future of computing along with a rough idea of how IBM thinks we’ Read more…

By John Russell

Leading Solution Providers

ISC 2019 Virtual Booth Video Tour

CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
GOOGLE
GOOGLE
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
VERNE GLOBAL
VERNE GLOBAL

Intel Confirms Retreat on Omni-Path

August 1, 2019

Intel Corp.’s plans to make a big splash in the network fabric market for linking HPC and other workloads has apparently belly-flopped. The chipmaker confirmed to us the outlines of an earlier report by the website CRN that it has jettisoned plans for a second-generation version of its Omni-Path interconnect... Read more…

By Staff report

Kubernetes, Containers and HPC

September 19, 2019

Software containers and Kubernetes are important tools for building, deploying, running and managing modern enterprise applications at scale and delivering enterprise software faster and more reliably to the end user — while using resources more efficiently and reducing costs. Read more…

By Daniel Gruber, Burak Yenier and Wolfgang Gentzsch, UberCloud

Dell Ramps Up HPC Testing of AMD Rome Processors

October 21, 2019

Dell Technologies is wading deeper into the AMD-based systems market with a growing evaluation program for the latest Epyc (Rome) microprocessors from AMD. In a Read more…

By John Russell

Rise of NIH’s Biowulf Mirrors the Rise of Computational Biology

July 29, 2019

The story of NIH’s supercomputer Biowulf is fascinating, important, and in many ways representative of the transformation of life sciences and biomedical res Read more…

By John Russell

Cray, Fujitsu Both Bringing Fujitsu A64FX-based Supercomputers to Market in 2020

November 12, 2019

The number of top-tier HPC systems makers has shrunk due to a steady march of M&A activity, but there is increased diversity and choice of processing compon Read more…

By Tiffany Trader

Xilinx vs. Intel: FPGA Market Leaders Launch Server Accelerator Cards

August 6, 2019

The two FPGA market leaders, Intel and Xilinx, both announced new accelerator cards this week designed to handle specialized, compute-intensive workloads and un Read more…

By Doug Black

When Dense Matrix Representations Beat Sparse

September 9, 2019

In our world filled with unintended consequences, it turns out that saving memory space to help deal with GPU limitations, knowing it introduces performance pen Read more…

By James Reinders

With the Help of HPC, Astronomers Prepare to Deflect a Real Asteroid

September 26, 2019

For years, NASA has been running simulations of asteroid impacts to understand the risks (and likelihoods) of asteroids colliding with Earth. Now, NASA and the European Space Agency (ESA) are preparing for the next, crucial step in planetary defense against asteroid impacts: physically deflecting a real asteroid. Read more…

By Oliver Peckham

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This