SiCortex Brings Its Compiler In-House

By Michael Feldman

August 3, 2007

Not many computer system vendors develop their own compiler technology. Now SiCortex can claim to be among them. On Wednesday, the company announced that it had acquired the PathScale compiler business from QLogic Corp under undisclosed financial terms. PathScale’s compiler team, along with certain intellectual property and business agreements, will now be under the control of SiCortex.

Jettisoning the compiler business from QLogic Corp would seem to be a good move for everyone involved. QLogic originally purchased PathScale in February of 2006 for $109 million in order to obtain their InfiniPath interconnect technology. The PathScale compilers just went along for the ride. According to Duncan Poole, director of marketing for the compiler group, QLogic was aware their networking business was not well aligned with the compiler group. As a seller of adapters, switches and management tools for various network topologies (Fibre Channel, iSCSI and InfiniBand), QLogic’s attention was, by necessity, focused elsewhere. Over time it became clear that the compiler technology would be best served if it were partnered directly with a systems vendor, where application development tools, and compilers in particular, are viewed as fundamental technologies.

Even as an external entity, the PathScale compiler group had been involved with SiCortex since the company’s formation in 2003. As one of the few commercial developers of MIPS processor compiler technology and the only one with expertise in the HPC space, PathScale was critical in providing a solution for SiCortex’ MIPS-based HPC systems. From a financial perspective, the compiler business comes to SiCortex as a self-sustaining business — a welcome dividend for a startup company that has yet to announce a product sale. The company gets an additional benefit by no longer having to pay QLogic for compiler development and maintenance.

Poole said there were several suitors for the compiler technology, but the SiCortex offer made the most sense. “In the course of this analysis, we looked where the compiler team could be best aligned,” he said. “With our longstanding relationship, it became clear pretty quickly that SiCortex could be a happy home.”

The cultural fit between the two organizations seems almost perfect. Both teams are performance-obsessed. The SiCortex supercomputing systems are designed to deliver an extreme FLOPS-per-watt experience. The current machines offer 324 peak megaflops/watt, a metric that is comparable to what IBM is claiming for the new Blue Gene/P architecture. Likewise, the compiler team is equally passionate about squeezing all the performance out of the hardware. According to Poole, if someone finds a compiler that generates better performance than theirs does on a given piece of code, they treat that as a bug in the PathScale compiler. That kind of manic devotion to efficiency could produce some interesting results under the new arrangement.

It should be noted that PathScale’s bread-and-butter x86 compiler business will continue on. Developed at a time when compilers for Opteron-based HPC clusters were scarce, the PathScale x86 products filled a void in that rapidly expanding market. The C/C++ compilers are tightly integrated with the GNU tool chain, allowing users to build applications that mix and match GNU compiler generated objects with PathScale generated ones. PathScale also supports Fortran 95, which was derived from an SGI-based open source version. Current customers include big government labs and academic institutions. Although SiCortex isn’t planning to develop its own x86-based systems, the company has no intention of alienating HPC customers or losing revenue by abandoning the x86 compiler product line.

SiCortex could find other ways to benefit from PathScale’s established x86 customer base. For example, these same customers might be enticed to move their applications to higher performing SiCortex platforms, since they would be able to retain their development environment. And SiCortex customers would have the option to migrate to x86 environments if their applications needed to run on traditional clusters at some point. Of course, the downside is that the better the compiler is at making x86 clusters perform well, the less reason people will have to consider SiCortex an alternative.

Developing and selling tools for competing platforms may or may not prove to be a problem for SiCortex. Intel develops and sells compilers and other tools that run just fine on AMD Opterons. In a highly intertwined technological landscape, it can be difficult to come up with products that don’t also benefit your competitors to one extent or another. The objective is to make sure your products provide relatively more benefits for your company.

And now that the compiler technology has been taken in-house, SiCortex intends to take full advantage of the new arrangement. Not only will they be able to bundle the compiler suite with their HPC hardware, but the company also intends to tap the technical expertise in the compiler group to help design future SiCortex hardware. Fred Chow, who headed the PathScale team at QLogic and is now the new director of compiler engineering at SiCortex, helped write the original optimizing compiler for the MIPS processor with John Hennessy 25 years ago. Having the hardware and software engineering in one place could offer some nice synergies for the company.

SiCortex is also planning to leverage compiler improvements across all hardware platforms. Enhancements to parallel computing elements such as auto-parallelization and OpenMP runtime support will increase performance on systems, regardless of the underlying processor architecture. In the future, they intend to add support for Co-Array Fortran (as part of the Fortran 2008 standard) and probably UPC. The objective is to create compiler technologies that can be applied across many types of highly parallellized platforms.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

PRACEdays Reflects Europe’s HPC Commitment

May 25, 2017

More than 250 attendees and participants came together for PRACEdays17 in Barcelona last week, part of the European HPC Summit Week 2017, held May 15-19 at t Read more…

By Tiffany Trader

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurr Read more…

By Doug Black

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

Nvidia CEO Predicts AI ‘Cambrian Explosion’

May 25, 2017

The processing power and cloud access to developer tools used to train machine-learning models are making artificial intelligence ubiquitous across computing pl Read more…

By George Leopold

HPE Extreme Performance Solutions

Exploring the Three Models of Remote Visualization

The explosion of data and advancement of digital technologies are dramatically changing the way many companies do business. With the help of high performance computing (HPC) solutions and data analytics platforms, manufacturers are developing products faster, healthcare providers are improving patient care, and energy companies are improving planning, exploration, and production. Read more…

PGAS Use will Rise on New H/W Trends, Says Reinders

May 25, 2017

If you have not already tried using PGAS, it is time to consider adding PGAS to the programming techniques you know. Partitioned Global Array Space, commonly kn Read more…

By James Reinders

Exascale Escapes 2018 Budget Axe; Rest of Science Suffers

May 23, 2017

President Trump's proposed $4.1 trillion FY 2018 budget is good for U.S. exascale computing development, but grim for the rest of science and technology spend Read more…

By Tiffany Trader

Hedge Funds (with Supercomputing help) Rank First Among Investors

May 22, 2017

In case you didn’t know, The Quants Run Wall Street Now, or so says a headline in today’s Wall Street Journal. Quant-run hedge funds now control the largest Read more…

By John Russell

IBM, D-Wave Report Quantum Computing Advances

May 18, 2017

IBM said this week it has built and tested a pair of quantum computing processors, including a prototype of a commercial version. That progress follows an an Read more…

By George Leopold

PRACEdays Reflects Europe’s HPC Commitment

May 25, 2017

More than 250 attendees and participants came together for PRACEdays17 in Barcelona last week, part of the European HPC Summit Week 2017, held May 15-19 at t Read more…

By Tiffany Trader

PGAS Use will Rise on New H/W Trends, Says Reinders

May 25, 2017

If you have not already tried using PGAS, it is time to consider adding PGAS to the programming techniques you know. Partitioned Global Array Space, commonly kn Read more…

By James Reinders

Exascale Escapes 2018 Budget Axe; Rest of Science Suffers

May 23, 2017

President Trump's proposed $4.1 trillion FY 2018 budget is good for U.S. exascale computing development, but grim for the rest of science and technology spend Read more…

By Tiffany Trader

Cray Offers Supercomputing as a Service, Targets Biotechs First

May 16, 2017

Leading supercomputer vendor Cray and datacenter/cloud provider the Markley Group today announced plans to jointly deliver supercomputing as a service. The init Read more…

By John Russell

HPE’s Memory-centric The Machine Coming into View, Opens ARMs to 3rd-party Developers

May 16, 2017

Announced three years ago, HPE’s The Machine is said to be the largest R&D program in the venerable company’s history, one that could be progressing tow Read more…

By Doug Black

What’s Up with Hyperion as It Transitions From IDC?

May 15, 2017

If you’re wondering what’s happening with Hyperion Research – formerly the IDC HPC group – apparently you are not alone, says Steve Conway, now senior V Read more…

By John Russell

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

HPE Launches Servers, Services, and Collaboration at GTC

May 10, 2017

Hewlett Packard Enterprise (HPE) today launched a new liquid cooled GPU-driven Apollo platform based on SGI ICE architecture, a new collaboration with NVIDIA, a Read more…

By John Russell

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Just how close real-wo Read more…

By John Russell

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the cam Read more…

By John Russell

Google Pulls Back the Covers on Its First Machine Learning Chip

April 6, 2017

This week Google released a report detailing the design and performance characteristics of the Tensor Processing Unit (TPU), its custom ASIC for the inference Read more…

By Tiffany Trader

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its a Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Last week, Google reported that its custom ASIC Tensor Processing Unit (TPU) was 15-30x faster for inferencing workloads than Nvidia's K80 GPU (see our coverage Read more…

By Tiffany Trader

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

Since our first formal product releases of OSPRay and OpenSWR libraries in 2016, CPU-based Software Defined Visualization (SDVis) has achieved wide-spread adopt Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a ne Read more…

By Tiffany Trader

Leading Solution Providers

Facebook Open Sources Caffe2; Nvidia, Intel Rush to Optimize

April 18, 2017

From its F8 developer conference in San Jose, Calif., today, Facebook announced Caffe2, a new open-source, cross-platform framework for deep learning. Caffe2 is Read more…

By Tiffany Trader

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which w Read more…

By Tiffany Trader

Is Liquid Cooling Ready to Go Mainstream?

February 13, 2017

Lost in the frenzy of SC16 was a substantial rise in the number of vendors showing server oriented liquid cooling technologies. Three decades ago liquid cooling Read more…

By Steve Campbell

MIT Mathematician Spins Up 220,000-Core Google Compute Cluster

April 21, 2017

On Thursday, Google announced that MIT math professor and computational number theorist Andrew V. Sutherland had set a record for the largest Google Compute Eng Read more…

By Tiffany Trader

US Supercomputing Leaders Tackle the China Question

March 15, 2017

As China continues to prove its supercomputing mettle via the Top500 list and the forward march of its ambitious plans to stand up an exascale machine by 2020, Read more…

By Tiffany Trader

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu's Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural networ Read more…

By Tiffany Trader

IBM Wants to be “Red Hat” of Deep Learning

January 26, 2017

IBM today announced the addition of TensorFlow and Chainer deep learning frameworks to its PowerAI suite of deep learning tools, which already includes popular Read more…

By John Russell

DOE Supercomputer Achieves Record 45-Qubit Quantum Simulation

April 13, 2017

In order to simulate larger and larger quantum systems and usher in an age of "quantum supremacy," researchers are stretching the limits of today's most advance Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This