SiCortex Brings Its Compiler In-House

By Michael Feldman

August 3, 2007

Not many computer system vendors develop their own compiler technology. Now SiCortex can claim to be among them. On Wednesday, the company announced that it had acquired the PathScale compiler business from QLogic Corp under undisclosed financial terms. PathScale’s compiler team, along with certain intellectual property and business agreements, will now be under the control of SiCortex.

Jettisoning the compiler business from QLogic Corp would seem to be a good move for everyone involved. QLogic originally purchased PathScale in February of 2006 for $109 million in order to obtain their InfiniPath interconnect technology. The PathScale compilers just went along for the ride. According to Duncan Poole, director of marketing for the compiler group, QLogic was aware their networking business was not well aligned with the compiler group. As a seller of adapters, switches and management tools for various network topologies (Fibre Channel, iSCSI and InfiniBand), QLogic’s attention was, by necessity, focused elsewhere. Over time it became clear that the compiler technology would be best served if it were partnered directly with a systems vendor, where application development tools, and compilers in particular, are viewed as fundamental technologies.

Even as an external entity, the PathScale compiler group had been involved with SiCortex since the company’s formation in 2003. As one of the few commercial developers of MIPS processor compiler technology and the only one with expertise in the HPC space, PathScale was critical in providing a solution for SiCortex’ MIPS-based HPC systems. From a financial perspective, the compiler business comes to SiCortex as a self-sustaining business — a welcome dividend for a startup company that has yet to announce a product sale. The company gets an additional benefit by no longer having to pay QLogic for compiler development and maintenance.

Poole said there were several suitors for the compiler technology, but the SiCortex offer made the most sense. “In the course of this analysis, we looked where the compiler team could be best aligned,” he said. “With our longstanding relationship, it became clear pretty quickly that SiCortex could be a happy home.”

The cultural fit between the two organizations seems almost perfect. Both teams are performance-obsessed. The SiCortex supercomputing systems are designed to deliver an extreme FLOPS-per-watt experience. The current machines offer 324 peak megaflops/watt, a metric that is comparable to what IBM is claiming for the new Blue Gene/P architecture. Likewise, the compiler team is equally passionate about squeezing all the performance out of the hardware. According to Poole, if someone finds a compiler that generates better performance than theirs does on a given piece of code, they treat that as a bug in the PathScale compiler. That kind of manic devotion to efficiency could produce some interesting results under the new arrangement.

It should be noted that PathScale’s bread-and-butter x86 compiler business will continue on. Developed at a time when compilers for Opteron-based HPC clusters were scarce, the PathScale x86 products filled a void in that rapidly expanding market. The C/C++ compilers are tightly integrated with the GNU tool chain, allowing users to build applications that mix and match GNU compiler generated objects with PathScale generated ones. PathScale also supports Fortran 95, which was derived from an SGI-based open source version. Current customers include big government labs and academic institutions. Although SiCortex isn’t planning to develop its own x86-based systems, the company has no intention of alienating HPC customers or losing revenue by abandoning the x86 compiler product line.

SiCortex could find other ways to benefit from PathScale’s established x86 customer base. For example, these same customers might be enticed to move their applications to higher performing SiCortex platforms, since they would be able to retain their development environment. And SiCortex customers would have the option to migrate to x86 environments if their applications needed to run on traditional clusters at some point. Of course, the downside is that the better the compiler is at making x86 clusters perform well, the less reason people will have to consider SiCortex an alternative.

Developing and selling tools for competing platforms may or may not prove to be a problem for SiCortex. Intel develops and sells compilers and other tools that run just fine on AMD Opterons. In a highly intertwined technological landscape, it can be difficult to come up with products that don’t also benefit your competitors to one extent or another. The objective is to make sure your products provide relatively more benefits for your company.

And now that the compiler technology has been taken in-house, SiCortex intends to take full advantage of the new arrangement. Not only will they be able to bundle the compiler suite with their HPC hardware, but the company also intends to tap the technical expertise in the compiler group to help design future SiCortex hardware. Fred Chow, who headed the PathScale team at QLogic and is now the new director of compiler engineering at SiCortex, helped write the original optimizing compiler for the MIPS processor with John Hennessy 25 years ago. Having the hardware and software engineering in one place could offer some nice synergies for the company.

SiCortex is also planning to leverage compiler improvements across all hardware platforms. Enhancements to parallel computing elements such as auto-parallelization and OpenMP runtime support will increase performance on systems, regardless of the underlying processor architecture. In the future, they intend to add support for Co-Array Fortran (as part of the Fortran 2008 standard) and probably UPC. The objective is to create compiler technologies that can be applied across many types of highly parallellized platforms.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

SIA Recognizes Robert Dennard with 2019 Noyce Award

November 12, 2019

If you don’t know what Dennard Scaling is, the chances are strong you don’t labor in electronics. Robert Dennard, longtime IBM researcher, inventor of the DRAM and the fellow for whom Dennard Scaling was named, is th Read more…

By John Russell

Leveraging Exaflops Performance to Remediate Nuclear Waste

November 12, 2019

Nuclear waste storage sites are a subject of intense controversy and debate; nobody wants the radioactive remnants in their backyard. Now, a collaboration between Berkeley Lab, Pacific Northwest National University (PNNL Read more…

By Oliver Peckham

Using HPC and Machine Learning to Predict Traffic Congestion

November 12, 2019

Traffic congestion is a never-ending logic puzzle, dictated by commute patterns, but also by more stochastic accidents and similar disruptions. Traffic engineers struggle to model the traffic flow that occurs after accid Read more…

By Oliver Peckham

Mira Supercomputer Enables Cancer Research Breakthrough

November 11, 2019

Dynamic partial-wave spectroscopic (PWS) microscopy allows researchers to observe intracellular structures as small as 20 nanometers – smaller than those visible by optical microscopes – in three dimensions at a mill Read more…

By Staff report

IBM Adds Support for Ion Trap Quantum Technology to Qiskit

November 11, 2019

After years of percolating in the shadow of quantum computing research based on superconducting semiconductors – think IBM, Rigetti, Google, and D-Wave (quantum annealing) – ion trap technology is edging into the QC Read more…

By John Russell

AWS Solution Channel

Making High Performance Computing Affordable and Accessible for Small and Medium Businesses with HPC on AWS

High performance computing (HPC) brings a powerful set of tools to a broad range of industries, helping to drive innovation and boost revenue in finance, genomics, oil and gas extraction, and other fields. Read more…

IBM Accelerated Insights

Tackling HPC’s Memory and I/O Bottlenecks with On-Node, Non-Volatile RAM

November 8, 2019

On-node, non-volatile memory (NVRAM) is a game-changing technology that can remove many I/O and memory bottlenecks and provide a key enabler for exascale. That’s the conclusion drawn by the scientists and researcher Read more…

By Jan Rowell

IBM Adds Support for Ion Trap Quantum Technology to Qiskit

November 11, 2019

After years of percolating in the shadow of quantum computing research based on superconducting semiconductors – think IBM, Rigetti, Google, and D-Wave (quant Read more…

By John Russell

Tackling HPC’s Memory and I/O Bottlenecks with On-Node, Non-Volatile RAM

November 8, 2019

On-node, non-volatile memory (NVRAM) is a game-changing technology that can remove many I/O and memory bottlenecks and provide a key enabler for exascale. Th Read more…

By Jan Rowell

MLPerf Releases First Inference Benchmark Results; Nvidia Touts its Showing

November 6, 2019

MLPerf.org, the young AI-benchmarking consortium, today issued the first round of results for its inference test suite. Among organizations with submissions wer Read more…

By John Russell

Azure Cloud First with AMD Epyc Rome Processors

November 6, 2019

At Ignite 2019 this week, Microsoft's Azure cloud team and AMD announced an expansion of their partnership that began in 2017 when Azure debuted Epyc-backed ins Read more…

By Tiffany Trader

Nvidia Launches Credit Card-Sized 21 TOPS Jetson System for Edge Devices

November 6, 2019

Nvidia has launched a new addition to its Jetson product line: a credit card-sized (70x45mm) form factor delivering up to 21 trillion operations/second (TOPS) o Read more…

By Doug Black

In Memoriam: Steve Tuecke, Globus Co-founder

November 4, 2019

HPCwire is deeply saddened to report that Steve Tuecke, longtime scientist at Argonne National Lab and University of Chicago, has passed away at age 52. Tuecke Read more…

By Tiffany Trader

Spending Spree: Hyperscalers Bought $57B of IT in 2018, $10B+ by Google – But Is Cloud on Horizon?

October 31, 2019

Hyperscalers are the masters of the IT universe, gravitational centers of increasing pull in the emerging age of data-driven compute and AI.  In the high-stake Read more…

By Doug Black

Cray Debuts ClusterStor E1000 Finishing Remake of Portfolio for ‘Exascale Era’

October 30, 2019

Cray, now owned by HPE, today introduced the ClusterStor E1000 storage platform, which leverages Cray software and mixes hard disk drives (HDD) and flash memory Read more…

By John Russell

Supercomputer-Powered AI Tackles a Key Fusion Energy Challenge

August 7, 2019

Fusion energy is the Holy Grail of the energy world: low-radioactivity, low-waste, zero-carbon, high-output nuclear power that can run on hydrogen or lithium. T Read more…

By Oliver Peckham

Using AI to Solve One of the Most Prevailing Problems in CFD

October 17, 2019

How can artificial intelligence (AI) and high-performance computing (HPC) solve mesh generation, one of the most commonly referenced problems in computational engineering? A new study has set out to answer this question and create an industry-first AI-mesh application... Read more…

By James Sharpe

Cray Wins NNSA-Livermore ‘El Capitan’ Exascale Contract

August 13, 2019

Cray has won the bid to build the first exascale supercomputer for the National Nuclear Security Administration (NNSA) and Lawrence Livermore National Laborator Read more…

By Tiffany Trader

DARPA Looks to Propel Parallelism

September 4, 2019

As Moore’s law runs out of steam, new programming approaches are being pursued with the goal of greater hardware performance with less coding. The Defense Advanced Projects Research Agency is launching a new programming effort aimed at leveraging the benefits of massive distributed parallelism with less sweat. Read more…

By George Leopold

AMD Launches Epyc Rome, First 7nm CPU

August 8, 2019

From a gala event at the Palace of Fine Arts in San Francisco yesterday (Aug. 7), AMD launched its second-generation Epyc Rome x86 chips, based on its 7nm proce Read more…

By Tiffany Trader

D-Wave’s Path to 5000 Qubits; Google’s Quantum Supremacy Claim

September 24, 2019

On the heels of IBM’s quantum news last week come two more quantum items. D-Wave Systems today announced the name of its forthcoming 5000-qubit system, Advantage (yes the name choice isn’t serendipity), at its user conference being held this week in Newport, RI. Read more…

By John Russell

Ayar Labs to Demo Photonics Chiplet in FPGA Package at Hot Chips

August 19, 2019

Silicon startup Ayar Labs continues to gain momentum with its DARPA-backed optical chiplet technology that puts advanced electronics and optics on the same chip Read more…

By Tiffany Trader

Crystal Ball Gazing: IBM’s Vision for the Future of Computing

October 14, 2019

Dario Gil, IBM’s relatively new director of research, painted a intriguing portrait of the future of computing along with a rough idea of how IBM thinks we’ Read more…

By John Russell

Leading Solution Providers

ISC 2019 Virtual Booth Video Tour

CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
GOOGLE
GOOGLE
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
VERNE GLOBAL
VERNE GLOBAL

Intel Confirms Retreat on Omni-Path

August 1, 2019

Intel Corp.’s plans to make a big splash in the network fabric market for linking HPC and other workloads has apparently belly-flopped. The chipmaker confirmed to us the outlines of an earlier report by the website CRN that it has jettisoned plans for a second-generation version of its Omni-Path interconnect... Read more…

By Staff report

Kubernetes, Containers and HPC

September 19, 2019

Software containers and Kubernetes are important tools for building, deploying, running and managing modern enterprise applications at scale and delivering enterprise software faster and more reliably to the end user — while using resources more efficiently and reducing costs. Read more…

By Daniel Gruber, Burak Yenier and Wolfgang Gentzsch, UberCloud

Dell Ramps Up HPC Testing of AMD Rome Processors

October 21, 2019

Dell Technologies is wading deeper into the AMD-based systems market with a growing evaluation program for the latest Epyc (Rome) microprocessors from AMD. In a Read more…

By John Russell

Intel Debuts Pohoiki Beach, Its 8M Neuron Neuromorphic Development System

July 17, 2019

Neuromorphic computing has received less fanfare of late than quantum computing whose mystery has captured public attention and which seems to have generated mo Read more…

By John Russell

Rise of NIH’s Biowulf Mirrors the Rise of Computational Biology

July 29, 2019

The story of NIH’s supercomputer Biowulf is fascinating, important, and in many ways representative of the transformation of life sciences and biomedical res Read more…

By John Russell

Xilinx vs. Intel: FPGA Market Leaders Launch Server Accelerator Cards

August 6, 2019

The two FPGA market leaders, Intel and Xilinx, both announced new accelerator cards this week designed to handle specialized, compute-intensive workloads and un Read more…

By Doug Black

When Dense Matrix Representations Beat Sparse

September 9, 2019

In our world filled with unintended consequences, it turns out that saving memory space to help deal with GPU limitations, knowing it introduces performance pen Read more…

By James Reinders

With the Help of HPC, Astronomers Prepare to Deflect a Real Asteroid

September 26, 2019

For years, NASA has been running simulations of asteroid impacts to understand the risks (and likelihoods) of asteroids colliding with Earth. Now, NASA and the European Space Agency (ESA) are preparing for the next, crucial step in planetary defense against asteroid impacts: physically deflecting a real asteroid. Read more…

By Oliver Peckham

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This