The Coming Quad Wars

By Michael Feldman

August 17, 2007

Being in the x86 processor space has always been a double-edged sword for AMD. The market for this architecture, probably the most widely used ISA for general-purpose computing, is enormous. But so is the competition.

Intel dwarfs AMD by any measurement. In 2006, Intel’s net revenue was $35.38 billion, compared to $5.65 billion for AMD. In fact, last year Intel’s R&D spending alone — $5.87 billion — was larger the AMD’s entire revenue stream. This disparity is manifesting itself as AMD gets ready to release its much-anticipated “Barcelona” quad-core processor and Intel prepares to launch its new 45nm Penryn family.

On Tuesday, DailyTech reported that Intel is planning to release its first 45nm Penryn server chips on November 11, just nine weeks after the expected September 10 Barcelona release (and just in time for the 2007 Supercomputing Conference and Expo). Apparently the Penryn information was inadvertently placed on an unprotected Intel website. The 45nm shrink represents the next “tick” in Intel’s “tick-tock” processor development strategy.

With AMD just beginning its 65nm Opteron deliveries at almost the same time that Intel is introducing its 45nm Xeon chips, it looks like AMD will be nearly a full process technology cycle behind its rival. While transistor size and technology isn’t everything, it does offer the leader some fundamental advantages. For example, getting to 65nm ahead of AMD helped Intel deliver quad-core processors almost a year in advance of its rival. AMD is quick to remind us that the Intel designs are not “true” quad-core processors, since they rely on plugging two dual-core chips into a single socket. But that’s of little consequence to customers. The dual-dual chips achieve respectable performance numbers. The new Xeon L5335 Intel just announced this week is a 2.0GHz quad that consumes only 50 watts — a mere 12.5 watts per core.

While AMD is still ahead of the game in system design, using HyperTransport and an integrated memory controller to achieve better multicore integration and energy efficiency, the lack of a quad-core offering over the last ten months created an opportunity for Intel to retake market share, especially in the server space. With the quad-core Barcelona, AMD has a chance to recover some lost momentum. To its detriment, the company has over-hyped its new product and its vision of dealing a death blow to the Intel quads will not be realized. AMD scaled back the initial chip to a modest 2.0GHz, which is significantly less that the original target of 2.6GHz.

Because of the slower clock, AMD has backed away from claims of integer performance superiority for its initial Barcelona offering. However, the company still expects to beat the current raft of Xeons in floating point performance. It’s all but impossible to get an apples-to-apples comparison of processors these days, given the variation of CPU caches, clocks and power envelopes. But assuming the first Opteron quad-core will be a 2.0GHz processor at 95 watts, a comparable chip in the Intel stable might be the 2.6GHz Xeon X5355 quad-core, but which runs a hotter at 120 watts (and that doesn’t include the off-chip memory controller). AMD is claiming a 2.0GHz Barcelona should yield a peak SPECfp_rate2006 result of 69.5; Intel reports 58.9 for the Xeon X5355. So if the first quad-core Opteron out of the chute can put up these kinds of numbers against a comparable Xeon and use less power, that bodes well for the new Opteron line, especially in the floating-point-loving high performance technical computing market.

But if Intel does release Penryn-based Xeons a couple of months after the Barcelona launch, AMD’s performance edge will be in jeopardy. Because the Penryn processors will use the advanced high-K dielectric and metal gate transistor design for its 45nm manufacturing technology, these chips will be able to achieve significantly better performance within a given power envelope compared to their 65nm counterparts. I’m guessing that the Penryn launch will nullify any floating point performance advantage AMD will achieve with their first quad-core Opterons and widen Intel’s integer performance advantage. AMD, of course, will not be sitting still. They’re expected to come out with both higher performing and lower power versions of their quad offering following the initial September introduction. So by the time November rolls around, we could have a real horse race.

But being an entire process technology iteration behind their rival will be a heavy burden for AMD. Intel will have a lot of latitude in targeting performance or energy consumption with the new transistor technology. If we can believe the Penryn information leaked by Intel, the top of the line X5460 quad-core will clock in at 3.16GHz and dissipate 120 watts; the low-end quad-core L5410 will run at 2.33GHz and use just 50 watts. Until AMD can move to 45nm, which it plans to do in 2008, it will have to be content to find design tradeoffs where it can tweak the clock speed or exploit energy savings on the 65nm chips.

The only good news for AMD is that the Penryn chips will still rely on the antiquated Front Side Bus (FSB) and off-chip memory controllers. However, this will not be the case for Intel’s next-generation Nehalem microarchitecture due in 2008 — the next “tock” in the tick-tock strategy. Nehalem is expected to jettison the FSB in favor of a more HyperTransport-like system interconnect and use an integrated memory controller. There’s even talk of including a GPU on some Nehalem processors. The fact that Intel is following in its smaller rival’s footsteps is probably of little consolation to AMD at this point.

For AMD to compete effectively in the x86 server market, it has to be on par with Intel’s semiconductor technology. That doesn’t mean AMD has to embrace the same technologies or have the same manufacturing structure as Intel, but if Opteron transistors are always going to be bigger and leakier than Xeon transistors, that seems unsustainable in the long run.

Since AMD relies heavily on IBM for its process technology R&D, maybe it’s time to invest more heavily in that partnership — or develop a larger alliance of companies that it can use for both semiconductor research and manufacturing. Big Blue itself would not appear to be as motivated as AMD is in outgunning Intel chips, since IBM’s own Power and PowerPC processors aren’t in direct competition with the Xeons. (Itaniums, of course, are another matter.) Indeed, IBM manufactures both Xeon- and Opteron-based servers. That means AMD itself needs to find a way to drive the process. But time is not on their side. Tick-tock.

—–

As always, comments about HPCwire are welcomed and encouraged. Write to me, Michael Feldman, at editor@hpcwire.com.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Hedge Funds (with Supercomputing help) Rank First Among Investors

May 22, 2017

In case you didn’t know, The Quants Run Wall Street Now, or so says a headline in today’s Wall Street Journal. Quant-run hedge funds now control the largest Read more…

By John Russell

IBM, D-Wave Report Quantum Computing Advances

May 18, 2017

IBM said this week it has built and tested a pair of quantum computing processors, including a prototype of a commercial version. That progress follows an an Read more…

By George Leopold

PRACEdays 2017 Wraps Up in Barcelona

May 18, 2017

Barcelona has been absolutely lovely; the weather, the food, the people. I am, sadly, finishing my last day at PRACEdays 2017 with two sessions: an in-depth loo Read more…

By Kim McMahon

US, Europe, Japan Deepen Research Computing Partnership

May 18, 2017

On May 17, 2017, a ceremony was held during the PRACEdays 2017 conference in Barcelona to announce the memorandum of understanding (MOU) between PRACE in Europe Read more…

By Tiffany Trader

HPE Extreme Performance Solutions

Exploring the Three Models of Remote Visualization

The explosion of data and advancement of digital technologies are dramatically changing the way many companies do business. With the help of high performance computing (HPC) solutions and data analytics platforms, manufacturers are developing products faster, healthcare providers are improving patient care, and energy companies are improving planning, exploration, and production. Read more…

NSF, IARPA, and SRC Push into “Semiconductor Synthetic Biology” Computing

May 18, 2017

Research into how biological systems might be fashioned into computational technology has a long history with various DNA-based computing approaches explored. N Read more…

By John Russell

DOE’s HPC4Mfg Leads to Paper Manufacturing Improvement

May 17, 2017

Papermaking ranks third behind only petroleum refining and chemical production in terms of energy consumption. Recently, simulations made possible by the U.S. D Read more…

By John Russell

PRACEdays 2017: The start of a beautiful week in Barcelona

May 17, 2017

Touching down in Barcelona on Saturday afternoon, it was warm, sunny, and oh so Spanish. I was greeted at my hotel with a glass of Cava to sip and treated to a Read more…

By Kim McMahon

NSF Issues $60M RFP for “Towards a Leadership-Class” System

May 16, 2017

In case you missed it, the National Science Foundation issued the request for proposals (RFP) for the next ‘Towards a Leadership-Class Computing Facility – Read more…

By John Russell

Cray Offers Supercomputing as a Service, Targets Biotechs First

May 16, 2017

Leading supercomputer vendor Cray and datacenter/cloud provider the Markley Group today announced plans to jointly deliver supercomputing as a service. The init Read more…

By John Russell

HPE’s Memory-centric The Machine Coming into View, Opens ARMs to 3rd-party Developers

May 16, 2017

Announced three years ago, HPE’s The Machine is said to be the largest R&D program in the venerable company’s history, one that could be progressing tow Read more…

By Doug Black

What’s Up with Hyperion as It Transitions From IDC?

May 15, 2017

If you’re wondering what’s happening with Hyperion Research – formerly the IDC HPC group – apparently you are not alone, says Steve Conway, now senior V Read more…

By John Russell

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

HPE Launches Servers, Services, and Collaboration at GTC

May 10, 2017

Hewlett Packard Enterprise (HPE) today launched a new liquid cooled GPU-driven Apollo platform based on SGI ICE architecture, a new collaboration with NVIDIA, a Read more…

By John Russell

IBM PowerAI Tools Aim to Ease Deep Learning Data Prep, Shorten Training 

May 10, 2017

A new set of GPU-powered AI software announced by IBM today brings automation to many of the tedious, time consuming and complex aspects of AI project on-rampin Read more…

By Doug Black

Bright Computing 8.0 Adds Azure, Expands Machine Learning Support

May 9, 2017

Bright Computing, long a prominent provider of cluster management tools for HPC, today released version 8.0 of Bright Cluster Manager and Bright OpenStack. The Read more…

By John Russell

Microsoft Azure Will Debut Pascal GPU Instances This Year

May 8, 2017

As Nvidia's GPU Technology Conference gets underway in San Jose, Calif., Microsoft today revealed plans to add Pascal-generation GPU horsepower to its Azure clo Read more…

By Tiffany Trader

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Just how close real-wo Read more…

By John Russell

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the cam Read more…

By John Russell

Google Pulls Back the Covers on Its First Machine Learning Chip

April 6, 2017

This week Google released a report detailing the design and performance characteristics of the Tensor Processing Unit (TPU), its custom ASIC for the inference Read more…

By Tiffany Trader

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its a Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Last week, Google reported that its custom ASIC Tensor Processing Unit (TPU) was 15-30x faster for inferencing workloads than Nvidia's K80 GPU (see our coverage Read more…

By Tiffany Trader

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

Since our first formal product releases of OSPRay and OpenSWR libraries in 2016, CPU-based Software Defined Visualization (SDVis) has achieved wide-spread adopt Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a ne Read more…

By Tiffany Trader

Facebook Open Sources Caffe2; Nvidia, Intel Rush to Optimize

April 18, 2017

From its F8 developer conference in San Jose, Calif., today, Facebook announced Caffe2, a new open-source, cross-platform framework for deep learning. Caffe2 is Read more…

By Tiffany Trader

Leading Solution Providers

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which w Read more…

By Tiffany Trader

Is Liquid Cooling Ready to Go Mainstream?

February 13, 2017

Lost in the frenzy of SC16 was a substantial rise in the number of vendors showing server oriented liquid cooling technologies. Three decades ago liquid cooling Read more…

By Steve Campbell

MIT Mathematician Spins Up 220,000-Core Google Compute Cluster

April 21, 2017

On Thursday, Google announced that MIT math professor and computational number theorist Andrew V. Sutherland had set a record for the largest Google Compute Eng Read more…

By Tiffany Trader

IBM Wants to be “Red Hat” of Deep Learning

January 26, 2017

IBM today announced the addition of TensorFlow and Chainer deep learning frameworks to its PowerAI suite of deep learning tools, which already includes popular Read more…

By John Russell

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu's Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural networ Read more…

By Tiffany Trader

US Supercomputing Leaders Tackle the China Question

March 15, 2017

As China continues to prove its supercomputing mettle via the Top500 list and the forward march of its ambitious plans to stand up an exascale machine by 2020, Read more…

By Tiffany Trader

DOE Supercomputer Achieves Record 45-Qubit Quantum Simulation

April 13, 2017

In order to simulate larger and larger quantum systems and usher in an age of "quantum supremacy," researchers are stretching the limits of today's most advance Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This