Parallel Thoughts

By Michael Feldman

September 28, 2007

As Intel and AMD take a break from beating each other about the quads, this week we’ll turn our attention to software — specifically, parallel programming. Yes, multicore processors, GPUs and FPGAs are all the rage; but without applications to run on them, they’re just pretty etchings. In this week’s issue we have three articles that discuss different software approaches to getting the most out of the new hardware.

In our first feature article, RapidMind Chief Scientist Michael McCool makes a case for data parallelism — not surprising, considering his company’s platform is all about exploiting that particular aspect of HPC applications. McCool’s contention is that traditional task parallelism is of only limited use, since this model is difficult to scale to the levels necessary for today’s multicore systems, much less the manycore systems of the future. The main problem here is that the memory bottleneck demands much more latency tolerance than can be achieved by the relatively low numbers of tasks that can be naturally teased out of a typical application.

Says McCool: “The solution to this dilemma is data parallelism. In data parallelism, the structure of the data is used to drive the creation of more and more parallel tasks as needed. Since larger problems with more data naturally result in more parallel tasks, a data-parallel approach results in a scalable solution that can automatically take advantage of more and more cores.”

McCool does make an important distinction between SPMD (Single Program, Multiple Data) parallelism and SIMD (Single Instruction Multiple Data) parallelism. The former is the more versatile, inasmuch as it avoids the latter’s limitation of relying on a single operation per data stream. In essence, SIMD implies vector processors, while SPMD can be applied to a variety of architectures.

In “Language Design for an Uncertain Hardware Future,” The MathWorks’ Rod Lurie contends that the implementation language should be selected with the domain expert in mind. The idea is that language should enable users to develop applications as quickly as possible, without having to worry about the target architecture. He suggests programmers take a two-pass approach to software development. In the first pass, they should concentrate on getting the algorithm correct, and not be concerned with performance issues. In the second pass, the programmer can go back and insert parallelism to optimize runtime execution. But the language system itself should be responsible for mapping the parallelism onto the underlying hardware.

According to Lurie: “In this two-pass model, domain experts, like the scientists and engineers who will be major consumers of high performance computing systems, should be able to express their ideas in a natural way, allowing them to explore their solution space rapidly. To maximize their productivity, these experts should be able to focus on their core competencies.”

The second pass is accomplished by annotating the original algorithm with parallel constructs, like PARFOR, MATLAB’s method of specifying parallel for-loops. Parallel annotation usually has the advantage of being compatible with non-parallel hardware. In other words, the parallel constructs will just be ignored when executed on a single-core platform.

To round out our trio, Visual Numerics’ Tim Leite writes about some of the difficulties of porting applications from legacy systems to clusters. The advantages of porting are obvious, but the obstacles can be formidable and include preserving elements like computational accuracy and portability. Multiple language support also can become a big issue when migrating software to a new platform. Leite suggests that using commercial numerical libraries to insulate the application from the underlying hardware can help to ease some of these porting pitfalls. He also notes that these same libraries often give the developer some specific support for MPI programming.

Writes Leite: “As compute clusters become more prevalent and powerful, computational libraries continue to evolve to assist the developer in leveraging the cluster technology. Building parallel processing-enabled applications can be difficult, and commercial libraries can help programmers avoid some of the issues associated with optimizing code for a cluster. In fact, some libraries have introduced techniques that assist not only the sophisticated programmer, but also the novice distributed computing developer.”

While each of the three approaches reflects the particular vendor’s offerings, they all have some important elements in common. One is the realization that existing commercial toolchains can be harnessed. Although the APIs in the vendor solutions are proprietary, they leverage standard language environments. For example, The RapidMind platform is built around a C++ framework and can take advantage of the large ecosystem of tools, libraries and applications that has grown up around that language. The MathWorks is fortunate to have its very own and very popular MATLAB language. It was originally developed with a single processor in mind, but the Distributed Computing Toolbox was added in 2004 to help users adapt their code for the emerging generation of parallel hardware. And finally, Visual Numerics’ IMSL libraries are written in the some of the most widely used languages today: C, C#, Java and Fortran. Almost without exception, commercial parallel software products are built on top of well-established languages.

Each software approach discussed here also pays a good deal of attention to maintaining portability across targets. Since application development has become one of the most severe bottlenecks in system deployment, any technology that can decouple the code from the hardware is greatly appreciated. With the recent proliferation of multicore processors, accelerator coprocessors and cluster architectures, there is a real motivation to make sure the software developer (and end-user) is insulated as much as possible from hardware concerns. RapidMind’s solution is perhaps the most ambitious in this regard. It’s designed to map application code to x86 CPUs, a number of GPUs, or the Cell processor.

Related to portability is scalability. Today’s clusters come in many sizes, from a few nodes to thousands. At the level of the processor, chipmakers are using Moore’s Law to double the core count every couple of years. If applications aren’t developed with scalability in mind, the code’s longevity will be tied to the hardware it was originally targeted for. In the brave new world of parallel architectures, the ability to automatically scale software is a necessity.

Admittedly, none of the current approaches to deal with parallel programming is without drawbacks. For one thing, each tends to focus on a single dimension of parallelism, usually either at the level of the processor or at the level of the cluster. And Lurie himself acknowledges that his two-pass model would be unnecessary if the underlying language had built-in intelligence to implicitly perform parallelization. Forcing the software writer to think in parallel is the single biggest obstacle to large-scale development of parallel codes. Today unfortunately, there are no magic bullets because there is no magic gun. A more general framework awaits.

—–

As always, comments about HPCwire are welcomed and encouraged. Write to me, Michael Feldman, at [email protected].

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

AI Silicon Startup Graphcore Launches Channel Partner Program

September 23, 2020

AI compute platform vendor Graphcore has launched its first formal global channel partner program to promote and boost the sales of its AI processors and blade computing products. The formalized, all-new Graphcore Eli Read more…

By Todd R. Weiss

Arm Targets HPC with New Neoverse Platforms

September 22, 2020

UK-based semiconductor design company Arm today teased details of its Neoverse roadmap, introducing V1 (codenamed Zeus) and N2 (codenamed Perseus), Arm’s second generation N-series platform. The chip IP vendor said the Read more…

By Tiffany Trader

Microsoft’s Azure Quantum Platform Now Offers Toshiba’s ‘Simulated Bifurcation Machine’

September 22, 2020

While pure-play quantum computing (QC) gets most of the QC-related attention, there’s also been steady progress adapting quantum methods for select use on classical computers. Today, Microsoft announced that Toshiba’ Read more…

By John Russell

Oracle Cloud Deepens HPC Embrace with Launch of A100 Instances, Plans for Arm, More 

September 22, 2020

Oracle Cloud Infrastructure (OCI) continued its steady ramp-up of HPC capabilities today with a flurry of announcements. Topping the list is general availability of instances with Nvidia’s newest GPU, the A100. OCI als Read more…

By John Russell

IBM, CQC Enable Cloud-based Quantum Random Number Generation

September 21, 2020

IBM and Cambridge Quantum Computing (CQC) have partnered to achieve progress on one of the major business aspirations for quantum computing – the goal of generating verified, truly random numbers that can be used for a Read more…

By Todd R. Weiss

AWS Solution Channel

The Water Institute of the Gulf runs compute-heavy storm surge and wave simulations on AWS

The Water Institute of the Gulf (Water Institute) runs its storm surge and wave analysis models on Amazon Web Services (AWS)—a task that sometimes requires large bursts of compute power. Read more…

Intel® HPC + AI Pavilion

Berlin Institute of Health: Putting HPC to Work for the World

Researchers from the Center for Digital Health at the Berlin Institute of Health (BIH) are using science to understand the pathophysiology of COVID-19, which can help to inform the development of targeted treatments. Read more…

European Commission Declares €8 Billion Investment in Supercomputing

September 18, 2020

Just under two years ago, the European Commission formalized the EuroHPC Joint Undertaking (JU): a concerted HPC effort (comprising 32 participating states at current count) across the European Union and supplanting HPC Read more…

By Oliver Peckham

Arm Targets HPC with New Neoverse Platforms

September 22, 2020

UK-based semiconductor design company Arm today teased details of its Neoverse roadmap, introducing V1 (codenamed Zeus) and N2 (codenamed Perseus), Arm’s seco Read more…

By Tiffany Trader

Oracle Cloud Deepens HPC Embrace with Launch of A100 Instances, Plans for Arm, More 

September 22, 2020

Oracle Cloud Infrastructure (OCI) continued its steady ramp-up of HPC capabilities today with a flurry of announcements. Topping the list is general availabilit Read more…

By John Russell

European Commission Declares €8 Billion Investment in Supercomputing

September 18, 2020

Just under two years ago, the European Commission formalized the EuroHPC Joint Undertaking (JU): a concerted HPC effort (comprising 32 participating states at c Read more…

By Oliver Peckham

Google Hires Longtime Intel Exec Bill Magro to Lead HPC Strategy

September 18, 2020

In a sign of the times, another prominent HPCer has made a move to a hyperscaler. Longtime Intel executive Bill Magro joined Google as chief technologist for hi Read more…

By Tiffany Trader

Future of Fintech on Display at HPC + AI Wall Street

September 17, 2020

Those who tuned in for Tuesday's HPC + AI Wall Street event got a peak at the future of fintech and lively discussion of topics like blockchain, AI for risk man Read more…

By Alex Woodie, Tiffany Trader and Todd R. Weiss

IBM’s Quantum Race to One Million Qubits

September 15, 2020

IBM today outlined its ambitious quantum computing technology roadmap at its virtual Quantum Summit. The eye-popping million qubit number is still far out, agrees IBM, but perhaps not that far out. Just as eye-popping is IBM’s nearer-term plan for a 1,000-plus qubit system named Condor... Read more…

By John Russell

Nvidia Commits to Buy Arm for $40B

September 14, 2020

Nvidia is acquiring semiconductor design company Arm Ltd. for $40 billion from SoftBank in a blockbuster deal that catapults the GPU chipmaker to a dominant position in the datacenter while helping troubled SoftBank reverse its financial woes. The deal, which has been rumored for... Read more…

By Todd R. Weiss and George Leopold

AMD’s Massive COVID-19 HPC Fund Adds 18 Institutions, 5 Petaflops of Power

September 14, 2020

Almost exactly five months ago, AMD announced its COVID-19 HPC Fund, an ongoing flow of resources and equipment to research institutions studying COVID-19 that began with an initial donation of $15 million. In June, AMD announced major equipment donations to several major institutions. Now, AMD is making its third major COVID-19 HPC Fund... Read more…

By Oliver Peckham

Supercomputer-Powered Research Uncovers Signs of ‘Bradykinin Storm’ That May Explain COVID-19 Symptoms

July 28, 2020

Doctors and medical researchers have struggled to pinpoint – let alone explain – the deluge of symptoms induced by COVID-19 infections in patients, and what Read more…

By Oliver Peckham

Nvidia Said to Be Close on Arm Deal

August 3, 2020

GPU leader Nvidia Corp. is in talks to buy U.K. chip designer Arm from parent company Softbank, according to several reports over the weekend. If consummated Read more…

By George Leopold

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

By Doug Black

Intel’s 7nm Slip Raises Questions About Ponte Vecchio GPU, Aurora Supercomputer

July 30, 2020

During its second-quarter earnings call, Intel announced a one-year delay of its 7nm process technology, which it says it will create an approximate six-month shift for its CPU product timing relative to prior expectations. The primary issue is a defect mode in the 7nm process that resulted in yield degradation... Read more…

By Tiffany Trader

HPE Keeps Cray Brand Promise, Reveals HPE Cray Supercomputing Line

August 4, 2020

The HPC community, ever-affectionate toward Cray and its eponymous founder, can breathe a (virtual) sigh of relief. The Cray brand will live on, encompassing th Read more…

By Tiffany Trader

Google Hires Longtime Intel Exec Bill Magro to Lead HPC Strategy

September 18, 2020

In a sign of the times, another prominent HPCer has made a move to a hyperscaler. Longtime Intel executive Bill Magro joined Google as chief technologist for hi Read more…

By Tiffany Trader

Neocortex Will Be First-of-Its-Kind 800,000-Core AI Supercomputer

June 9, 2020

Pittsburgh Supercomputing Center (PSC - a joint research organization of Carnegie Mellon University and the University of Pittsburgh) has won a $5 million award Read more…

By Tiffany Trader

Supercomputer Modeling Tests How COVID-19 Spreads in Grocery Stores

April 8, 2020

In the COVID-19 era, many people are treating simple activities like getting gas or groceries with caution as they try to heed social distancing mandates and protect their own health. Still, significant uncertainty surrounds the relative risk of different activities, and conflicting information is prevalent. A team of Finnish researchers set out to address some of these uncertainties by... Read more…

By Oliver Peckham

Leading Solution Providers

Contributors

European Commission Declares €8 Billion Investment in Supercomputing

September 18, 2020

Just under two years ago, the European Commission formalized the EuroHPC Joint Undertaking (JU): a concerted HPC effort (comprising 32 participating states at c Read more…

By Oliver Peckham

Australian Researchers Break All-Time Internet Speed Record

May 26, 2020

If you’ve been stuck at home for the last few months, you’ve probably become more attuned to the quality (or lack thereof) of your internet connection. Even Read more…

By Oliver Peckham

Oracle Cloud Infrastructure Powers Fugaku’s Storage, Scores IO500 Win

August 28, 2020

In June, RIKEN shook the supercomputing world with its Arm-based, Fujitsu-built juggernaut: Fugaku. The system, which weighs in at 415.5 Linpack petaflops, topp Read more…

By Oliver Peckham

Google Cloud Debuts 16-GPU Ampere A100 Instances

July 7, 2020

On the heels of the Nvidia’s Ampere A100 GPU launch in May, Google Cloud is announcing alpha availability of the A100 “Accelerator Optimized” VM A2 instance family on Google Compute Engine. The instances are powered by the HGX A100 16-GPU platform, which combines two HGX A100 8-GPU baseboards using... Read more…

By Tiffany Trader

DOD Orders Two AI-Focused Supercomputers from Liqid

August 24, 2020

The U.S. Department of Defense is making a big investment in data analytics and AI computing with the procurement of two HPC systems that will provide the High Read more…

By Tiffany Trader

Microsoft Azure Adds A100 GPU Instances for ‘Supercomputer-Class AI’ in the Cloud

August 19, 2020

Microsoft Azure continues to infuse its cloud platform with HPC- and AI-directed technologies. Today the cloud services purveyor announced a new virtual machine Read more…

By Tiffany Trader

Japan’s Fugaku Tops Global Supercomputing Rankings

June 22, 2020

A new Top500 champ was unveiled today. Supercomputer Fugaku, the pride of Japan and the namesake of Mount Fuji, vaulted to the top of the 55th edition of the To Read more…

By Tiffany Trader

Joliot-Curie Supercomputer Used to Build First Full, High-Fidelity Aircraft Engine Simulation

July 14, 2020

When industrial designers plan the design of a new element of a vehicle’s propulsion or exterior, they typically use fluid dynamics to optimize airflow and in Read more…

By Oliver Peckham

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This