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November 30, 2007

The Week in Review

by John E. West

It seems that the HPC world is still recovering from the news-fest that surrounds SC every year. But good stuff did happen this week, and so here is this week’s collection of highlights, selected totally subjectively, from the HPC news stream as reported at and HPCwire.

>>10 words and a link

Cornell finds new human genes with HPC;

Presentations from the Sun HPC Consortium online;

HP Q3 numbers up thanks to Itanium;

NCSA announces workshop on datacenter design;

AnandTech: Quad Xeons outperform quad Opterons unless memory is stressed;

>>Great news for the next generation of HPC

I’m really excited to see the raft of recent announcements for fellowships in HPC and scientific computing.

Here are a few of the ones I’ve seen lately. If you’ve seen others, email me links at, and I’ll put together a cheat sheet and post it at the site permanently for interested future applicants.

  • Ken Kennedy-Cray Inc. Graduate Fellowship (graduate studies at Rice University).

  • Charlie Bender Scholarship from CASC (funding for computational chemistry students to attend SCxy).
  • Luis W. Alvarez Fellowship in Computational Science (post-doc at Berkeley Lab).

In the meantime if you’re interested in these opportunities you can find links to more information at

>>HPC Server 2008 Memory Requirements

I stumbled upon an interesting post on a Windows Vista blog site regarding the posted memory requirements for the various Windows operating system flavors. It seems that Windows HPC Server 2008 actually requires less memory to run than the standard version of Windows Vista. Windows Vista requires *at least* 1GB of memory (except for the ‘Home Basic’ version which will run on 512MB). Windows HPC 2008 can run on 512MB.

Granted, these are minimum values. The article also goes on to point out that HPC 2008 would prefer to run with 1.5-3GB in a 32-bit environment and greater than 4GB in the 64-bit flavor.

Full story at

>>Rambus shooting for 1 TB per second memory by 2011

The DailyTech is carrying news of Rambus Inc.’s new hardware plan, to be announced tomorrow: a new memory initiative aimed at delivering 1 terabtye per second of memory bandwidth to the market by 2011.

Rather than simply increasing the clock speed of memory to achieve higher output, Rambus looks to boost bandwidth with a 32X data rate. Just as DDR memory technologies doubles transfer on a single, full clock signal cycle, Rambus’ proposed technology is able to data at 32 times the reference clock frequency. With 32X technology, the memory company is targeting a bandwidth of 16Gbps per DQ link with memory running at 500MHz. In contrast, today’s DDR3 at 500MHz achieves a bandwidth of 1Gbps

While Rambus is (naturally) positioning this as a boon for gamers, it will be a big deal for us as well. Full story at


John West is part of the team that summarizes the headlines in HPC news every day at You can contact him at

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