Here’s a collection of highlights, selected totally subjectively, from this week’s HPC news stream as reported at insideHPC.com and HPCwire.
>>10 words and a link
The rise of hosted HPTC: NSF and the Google/IBM cluster;
GPULib enables vectorized math on NVIDIA GPUs;
Globus, Rocks, GridEngine communities combine in single conference;
Georgia State adds 3 TFLOPS IBM cluster;
Wired article highlights exascale partnership between Sandia and ORNL;
Our man in Texas reports on the Ranger dedication;
EU project aims to create market for unused cycles;
Stanford Associate Professor wins Oscar;
>>Details “leaked” on upcoming Intel hex-core chips
I hope Intel’s PR department is getting paid extra for all the effort they have to go through making these announcements look like leaks.
Anyway, according to the DailyTech (DT) the story is that Intel briefed Sun on futures last month and Sun posted the thing on its public Web servers over the weekend. Of interest: Dunnington and Nehalem.
Dunnington, Intel’s 45nm six-core Xeon processor from the Penryn family, will succeed the Xeon Tigerton processor. Whereas Tigerton is essentially two 65nm Core 2 Duo processors fused on one package, Dunnington will be Intel’s first Core 2 Duo processor with three dual- core banks. …The end result is a design very similar to the AMD Barcelona quad-core processor; however, each Barcelona core contains 512KB L2 cache, whereas Dunnington cores share L2 cache in pairs.
Dunnington is supposed to be pin-compatible with Tigerton and shipping in late 2008. Then there’s Nehalem — 45 nm quad-core — with QuickPath and no front-side bus, and on-die memory controllers.
As noted by ZDNet blogger George Ou, the slides contain some rudimentry benchmarks for Nehalem and other publicly available processors. From this slide deck, Ou estimates Nehalem’s SPECfp_rate_base2006 at 163 and the SPECint_rate_base2006 at 176. By contrast, Intel’s fastest Harpertown Xeon X5482 pulls a measly 80 and
122 SPEC fp and int rate_base2006.
>> Xtreme part 2, Appro’s sequel
Early November last year Appro announced its new Xtreme-X1 line of quad Xeon-based cluster HPCs. The X1 is designed to be the lego building block of cluster solutions by allowing customers to build systems up in 128-node blocks. Earlier this year, they announced the sale of a 95 TFLOPS Xtreme to the University of Tsukuba in Japan, and the company has had recent wins of note with 438 TFLOPS in 8 clusters across DOE’s NNSA and 33 TFLOPS in another system at LLNL.
The Tsukuba system is AMD-based, not Intel, and today Appro let the other X shoe drop. This week the company announced its new Xtreme-X2 line of AMD-based clusters. The machines feature dual-socket quad-core Opterons. The company expects to announce another large Xtreme customer in early March.
For more details and links to the backstory, check out this post at insideHPC: http://insidehpc.com/2008/02/26/xtreme-part-2-appros-sequel/.
>> Just how much Sun could we cram in here?
If you’re in a buying mood, or just wanting to do some productive doodling, head over to Sun’s relatively recently added web page detailing Constellation reference designs. See what it takes to host systems at 70, 210, and 579 TFLOPS.
I love the moxie of the Web pages; note the marketing language that informs you that yes, you can scale Constellation “down to TeraFLOPS” …if you’re _that_ sort of person (want a can of Pabst with that cluster, buddy?).