Compilers and More: The Dangers of COTS Supercomputing

By Michael Wolfe

April 4, 2008

One of the last events at Supercomputing 2007 (SC07) was a panel titled “(Super)Computing on FPGAs, GPUs, Cell and Other Exotic Architectures” on Friday morning.

Jack Dongarra (Univ. Tennessee and ORNL) said that the HPC ecosystem is out of balance; we’ve invested heavily in hardware development, and now we need to invest more heavily in software tools and methods to use the hardware. Rob Pennington (NCSA), the panel moderator, said that the tools will appear when there are enough of these systems out there that the vendors can make money at it. I disagree with both these statements.

In response to Jack Dongarra’s statement, I agree that the investment in software tools for high performance computing has been lacking, but it’s been equally limited for hardware. While I didn’t do a comprehensive survey on the exhibit show floor at SC07 in Reno, almost all the machines displayed there were built from COTS (commodity off-the-shelf) processors, mostly x86-64 from Intel and AMD, some PowerPC from IBM, and in some cases, SPARC and MIPS. Any innovation seems to be in the interconnect, packaging, power, and cooling. Notable exceptions are traditional vector supercomputers from NEC and Cray, and the ClearSpeed accelerators. It seems the HPC market can’t support processor development; current process technology is just too expensive.

There is a great deal of hype and promise for accelerators. However, even here we depend on the commodity market to drive the technology and development, and hope to gain what benefit we can. We are in the dangerous position of depending on the scraps that fall off the PlayStation table — and if they take their picnic and go somewhere else, we’re in real trouble. If you think this is silly, try asking NVIDIA to add a feature to their graphics cards that will speed up your application but will hurt graphics performance. I can hear the laughter already.

Of more concern is what may happen with the mainstream processor business. AMD and Intel have already announced quad-core chips, with plans for eight and more. David Scott (Intel), at a focus session in the HP-CAST user group meeting the Saturday prior to SC07, noted that if you are willing to give up single-core performance, you can put a lot of cores on a single chip, with today’s technology. There are many applications where such a strategy makes a great deal of sense: web services, database transactions — anything that responds to many small, independent requests. Think Google. In fact, most computing might fall into that market, where single thread performance doesn’t matter, only the total throughput.

But not HPC. Imagine having to expose and manage five or ten times more parallelism just to deliver the same performance as a single thread today. To get actual performance improvement, you need yet another factor of parallelism.

But guess who will win that architecture argument.

As for software, the dominant programming model for parallel computers hasn’t changed in almost 20 years, except to replace PVM with MPI. (I count substituting C or C++ for Fortran as a giant step sideways.) Perhaps this is inevitable. Douglass Post (DoD, HPCMP) pointed out at the SC07 panel that the lifetime of a large code is 20 to 30 years, whereas the lifetime of any large HPC system is more like 3 to 4 years. Portability, including performance portability, is more important than peak performance on any one system.

One of PGI’s consultants told us that today’s programmers like the MPI model, if only because it makes their lives easier. They can concentrate on porting and tuning today’s algorithms and programs to MPI, which is a lot of work, but not too mentally demanding. If we move to a model where parallel programming is less work, they’ll have to take on the task of finding better parallel algorithms, which is much more challenging.

So, to correct Jack Dongarra, the problem isn’t balance. The HPC ecosystem is in perfect balance, with little investment and innovation in both hardware and software. We’re in a precarious position now.  The community is able to benefit from the COTS market, but it’s anyone’s guess how long we’ll be able to thrive there.

In response to Rob Pennington, I believe that the HPC market is too small to support an aggressive hardware business, and it’s equally true that it’s too small to support a software tools industry. It may be hard to justify the cost of a large HPC hardware installation, but at least you can proudly give tours of the machine room. It’s hard to justify a large software budget, when all you get is a CD and a book (if you’re lucky).

Take compilers as an example, something near and dear to my heart. Historically, compiler development was taken on by the processor vendor and subsidized by that business. Compilers — and operating systems — hardly generated enough revenue to pay for themselves, but they were strategic investments by the vendors. Today’s HPC compilers are supported by the workstation business, and largely driven by it.

The hope has been that workstations were as complex today as yesteryear’s supercomputers, and need the same complex compilers and tools. So there is a natural fit in requirements and solutions. But some tools are hard to build, notably compilers. If compilers were easy, we wouldn’t have library-based solutions (BLAS, Linpack, MPI, etc.), we’d have extended the languages and compilers to solve those problems. Creating, supporting, and supplying these tools is a big investment and commitment. In almost every problem space, a software vendor can make more money applying that investment and commitment to a larger market than HPC. If HPC users will also buy it, that’s great, but it’s not enough to drive the market. I’m sure that statement will produce a plethora of rebuttals from HPC software vendors, but I’d ask how much of the revenue for those products is for non-HPC platforms.

Many HPC sites act as if they believe they can (or have to) develop all their own software internally. They’ve become a community of blacksmiths, building their own tools, and proud of it, with little need or desire for third party software. To be fair, the HPC market is volatile enough that a certain amount of FUD about dependence on independent software vendors can be justified.

To correct Rob Pennington, the tools will appear only if and when they apply to a larger market, or if some company (unlikely) or government agency (perhaps likely) chooses to make a long-term strategic investment.

—–

Michael Wolfe has developed compilers for over 30 years in both academia and industry, and is now a senior compiler engineer at The Portland Group, Inc. (www.pgroup.com), a wholly-owned subsidiary of STMicroelectronics, Inc. The opinions stated here are those of the author, and do not represent opinions of The Portland Group, Inc. or STMicroelectronics, Inc.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Data Vortex Users Contemplate the Future of Supercomputing

October 19, 2017

Last month (Sept. 11-12), HPC networking company Data Vortex held its inaugural users group at Pacific Northwest National Laboratory (PNNL) bringing together about 30 participants from industry, government and academia t Read more…

By Tiffany Trader

AI Self-Training Goes Forward at Google DeepMind

October 19, 2017

DeepMind, Google’s AI research organization, announced today in a blog that AlphaGo Zero, the latest evolution of AlphaGo (the first computer program to defeat a Go world champion) trained itself within three days to play Go at a superhuman level (i.e., better than any human) – and to beat the old version of AlphaGo – without leveraging human expertise, data or training. Read more…

By Doug Black

Researchers Scale COSMO Climate Code to 4888 GPUs on Piz Daint

October 17, 2017

Effective global climate simulation, sorely needed to anticipate and cope with global warming, has long been computationally challenging. Two of the major obstacles are the needed resolution and prolonged time to compute Read more…

By John Russell

HPE Extreme Performance Solutions

Transforming Genomic Analytics with HPC-Accelerated Insights

Advancements in the field of genomics are revolutionizing our understanding of human biology, rapidly accelerating the discovery and treatment of genetic diseases, and dramatically improving human health. Read more…

Student Cluster Competition Coverage New Home

October 16, 2017

Hello computer sports fans! This is the first of many (many!) articles covering the world-wide phenomenon of Student Cluster Competitions. Finally, the Student Cluster Competition coverage has come to its natural home: H Read more…

By Dan Olds

Data Vortex Users Contemplate the Future of Supercomputing

October 19, 2017

Last month (Sept. 11-12), HPC networking company Data Vortex held its inaugural users group at Pacific Northwest National Laboratory (PNNL) bringing together ab Read more…

By Tiffany Trader

AI Self-Training Goes Forward at Google DeepMind

October 19, 2017

DeepMind, Google’s AI research organization, announced today in a blog that AlphaGo Zero, the latest evolution of AlphaGo (the first computer program to defeat a Go world champion) trained itself within three days to play Go at a superhuman level (i.e., better than any human) – and to beat the old version of AlphaGo – without leveraging human expertise, data or training. Read more…

By Doug Black

Student Cluster Competition Coverage New Home

October 16, 2017

Hello computer sports fans! This is the first of many (many!) articles covering the world-wide phenomenon of Student Cluster Competitions. Finally, the Student Read more…

By Dan Olds

Intel Delivers 17-Qubit Quantum Chip to European Research Partner

October 10, 2017

On Tuesday, Intel delivered a 17-qubit superconducting test chip to research partner QuTech, the quantum research institute of Delft University of Technology (TU Delft) in the Netherlands. The announcement marks a major milestone in the 10-year, $50-million collaborative relationship with TU Delft and TNO, the Dutch Organization for Applied Research, to accelerate advancements in quantum computing. Read more…

By Tiffany Trader

Fujitsu Tapped to Build 37-Petaflops ABCI System for AIST

October 10, 2017

Fujitsu announced today it will build the long-planned AI Bridging Cloud Infrastructure (ABCI) which is set to become the fastest supercomputer system in Japan Read more…

By John Russell

HPC Chips – A Veritable Smorgasbord?

October 10, 2017

For the first time since AMD's ill-fated launch of Bulldozer the answer to the question, 'Which CPU will be in my next HPC system?' doesn't have to be 'Whichever variety of Intel Xeon E5 they are selling when we procure'. Read more…

By Dairsie Latimer

Delays, Smoke, Records & Markets – A Candid Conversation with Cray CEO Peter Ungaro

October 5, 2017

Earlier this month, Tom Tabor, publisher of HPCwire and I had a very personal conversation with Cray CEO Peter Ungaro. Cray has been on something of a Cinderell Read more…

By Tiffany Trader & Tom Tabor

Intel Debuts Programmable Acceleration Card

October 5, 2017

With a view toward supporting complex, data-intensive applications, such as AI inference, video streaming analytics, database acceleration and genomics, Intel i Read more…

By Doug Black

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

NERSC Scales Scientific Deep Learning to 15 Petaflops

August 28, 2017

A collaborative effort between Intel, NERSC and Stanford has delivered the first 15-petaflops deep learning software running on HPC platforms and is, according Read more…

By Rob Farber

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

Oracle Layoffs Reportedly Hit SPARC and Solaris Hard

September 7, 2017

Oracle’s latest layoffs have many wondering if this is the end of the line for the SPARC processor and Solaris OS development. As reported by multiple sources Read more…

By John Russell

US Coalesces Plans for First Exascale Supercomputer: Aurora in 2021

September 27, 2017

At the Advanced Scientific Computing Advisory Committee (ASCAC) meeting, in Arlington, Va., yesterday (Sept. 26), it was revealed that the "Aurora" supercompute Read more…

By Tiffany Trader

Google Releases Deeplearn.js to Further Democratize Machine Learning

August 17, 2017

Spreading the use of machine learning tools is one of the goals of Google’s PAIR (People + AI Research) initiative, which was introduced in early July. Last w Read more…

By John Russell

GlobalFoundries Puts Wind in AMD’s Sails with 12nm FinFET

September 24, 2017

From its annual tech conference last week (Sept. 20), where GlobalFoundries welcomed more than 600 semiconductor professionals (reaching the Santa Clara venue Read more…

By Tiffany Trader

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in Read more…

By Tiffany Trader

Leading Solution Providers

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Amazon Debuts New AMD-based GPU Instances for Graphics Acceleration

September 12, 2017

Last week Amazon Web Services (AWS) streaming service, AppStream 2.0, introduced a new GPU instance called Graphics Design intended to accelerate graphics. The Read more…

By John Russell

EU Funds 20 Million Euro ARM+FPGA Exascale Project

September 7, 2017

At the Barcelona Supercomputer Centre on Wednesday (Sept. 6), 16 partners gathered to launch the EuroEXA project, which invests €20 million over three-and-a-half years into exascale-focused research and development. Led by the Horizon 2020 program, EuroEXA picks up the banner of a triad of partner projects — ExaNeSt, EcoScale and ExaNoDe — building on their work... Read more…

By Tiffany Trader

Delays, Smoke, Records & Markets – A Candid Conversation with Cray CEO Peter Ungaro

October 5, 2017

Earlier this month, Tom Tabor, publisher of HPCwire and I had a very personal conversation with Cray CEO Peter Ungaro. Cray has been on something of a Cinderell Read more…

By Tiffany Trader & Tom Tabor

Cray Moves to Acquire the Seagate ClusterStor Line

July 28, 2017

This week Cray announced that it is picking up Seagate's ClusterStor HPC storage array business for an undisclosed sum. "In short we're effectively transitioning the bulk of the ClusterStor product line to Cray," said CEO Peter Ungaro. Read more…

By Tiffany Trader

Intel Launches Software Tools to Ease FPGA Programming

September 5, 2017

Field Programmable Gate Arrays (FPGAs) have a reputation for being difficult to program, requiring expertise in specialty languages, like Verilog or VHDL. Easin Read more…

By Tiffany Trader

IBM Advances Web-based Quantum Programming

September 5, 2017

IBM Research is pairing its Jupyter-based Data Science Experience notebook environment with its cloud-based quantum computer, IBM Q, in hopes of encouraging a new class of entrepreneurial user to solve intractable problems that even exceed the capabilities of the best AI systems. Read more…

By Alex Woodie

HPC Chips – A Veritable Smorgasbord?

October 10, 2017

For the first time since AMD's ill-fated launch of Bulldozer the answer to the question, 'Which CPU will be in my next HPC system?' doesn't have to be 'Whichever variety of Intel Xeon E5 they are selling when we procure'. Read more…

By Dairsie Latimer

  • arrow
  • Click Here for More Headlines
  • arrow
Share This