Here’s a collection of highlights, selected totally subjectively, from this week’s HPC news stream as reported at insideHPC.com and HPCwire.

>>10 words and a link

HPC admin certification program helps managers know what they’re hiring;
http://insidehpc.com/2008/06/30/hpc-admin-certification/

Minor science funding signed by President, COMPETES still underfunded;
http://insidehpc.com/2008/06/30/science-funding-in-supplemental-inked-by-president/

Rocks Gurus Interviewed by Tech Gurus;
http://insidehpc.com/2008/07/01/rocks-gurus-interviewed-by-tech-gurus/

Globus Toolkit 4.2 out;
http://insidehpc.com/2008/07/03/globus-toolkit-42-out/

Intel says developers aren’t going far enough;
http://www.hpcwire.com/blogs/22846564.html

Woven switch in new science cluster;
http://insidehpc.com/2008/07/03/woven-switch-in-new-science-cluster/

HPC Server 2008 RC1 out;
http://blogs.msdn.com/philpenn/archive/2008/06/30/rc1-released.aspx

Microsoft HPC in at Chip Ganassi Racing;
http://insidehpc.com/2008/06/30/chip-ganassi-racing-and-microsoft-hpc/

Panasas and Penguin partnership integrate Scyld Clusterware and ActiveStor;
http://insidehpc.com/2008/07/02/panasas-and-penguin-plan-a-partnership/

>>UPenn nanowire storage adds third bit state, increases density

A report at the DailyTech covers new work at the University of Pennsylvania’s School of Engineering and Applied Science using nanowires for storage. The nut:

While consumers have seen the price of data storage media of all kinds drop while storage capacity and densities have risen, one thing remains constant for all bit-based mechanisms: binary 0s and 1s represent data.

One way to further increase density could be to add a third state, or a 2. UPenn’s nanowire storage medium does just that.

But wait, there’s more…

In addition to a third readable state, UPenn’s nanowires have other properties which make them ideal for volatile memory storage. Due to the third state itself, densities become much greater. This could either enable smaller memory devices for portable electronics, or much more storage in current form factors.

>>UIUC named first CUDA Center of Excellence

NVIDIA announced this that the University of Illinois at Urbana-Champaign has been named the first CUDA Center of Excellence. Along with the designation, NVIDIA announced it has donated $500,000 for the development of parallel computing facilities at UIUC.

What’s it all about?

“The CUDA Center of Excellence program rewards schools that truly embrace the concept of parallel processing as the future of computing,” said Dr. David Kirk, chief scientist at NVIDIA. “Schools receiving this accreditation integrate the CUDA software environment into their curriculum to help their students harness the capabilities of these new parallel processing architectures. As one of the country’s leading schools in this field, I am personally delighted to appoint UIUC as our first CUDA Center of Excellence.”

The Theoretical and Computational Biophysics Group at UIUC has some experience using NVIDIA’s magic gear to speed up NAMD/VMD. How can you get some of this Center of Excellence goodness for your own university?

Universities wishing to become CUDA Centers of Excellence must teach a CUDA class and use CUDA technology in their research, usually across several labs. In return, NVIDIA supports the school through funding and equipment donations, including help to set up a GPU computing cluster. The appointment of UIUC follows on from the donation last year of 32 QuadroPlex model 4 systems, containing 64 GPUs for a 16-node CUDA technology cluster. The cluster, that has an $800K value, is administered by NCSA.