Language Design for an Uncertain Hardware Future

By Roy Lurie

August 28, 2008

Do you know where your algorithms will be running two years from now? Five? Ten? Are you investing in code today that you will need to throw away? What language should you choose today for your algorithms, to protect your investment for the future?

Every industry faces increasing interest and need for high performance computing. From automotive simulation to financial risk modeling, to systems biology and communication systems design, the need for raw computing power has increased dramatically, and will continue to do so. With the advent of high performance computing, hardware will provide the platform needed for this work.

Some fear that the explosion of diversity in hardware architectures means that the hardware available today will be replaced by something faster and better just beyond the horizon. This has always been happening, but the “C” single processor model remained while the processor architecture evolved. In the world of FPGAs, GPGPUs, many-cores, accelerators, multicores, clusters, grids, Cell processors and reconfigurable hardware, this model is not working. How do you choose a strategy that insulates you from these changes?

Many organizations have algorithm intellectual property locked into a particular language or environment that makes it virtually impossible to migrate to new technology. Often the experts who understand the subtleties of these codes and the particular optimizations made to get the “best performance” are not around anymore. With an uncertain future, prematurely selecting your architecture, language, and algorithm will require you to, at best, invest heavily in migrating the code, or at worst, live with legacy systems beyond their useful life.

So, what should software developers and domain experts be demanding from language providers to reduce the risk of algorithm obsolescence?

A best practice in software engineering is, where possible, to write a program in the simplest way that is the easiest to understand and maintain. Don’t try to predict where the performance bottlenecks are going to be in the first pass. Once the algorithm is working correctly, run it to find the performance bottlenecks. Trying to optimize for performance before you have the right algorithm leads to speculative performance enhancements that make the code less readable and maintainable, and that doesn’t address the underlying performance issues because you guessed incorrectly. This article applies this logic to language design for the future of high performance systems.

Languages should allow domain experts to develop the right algorithm as quickly as possible, without worrying initially about architectural nuances. To optimize your long-term investment in algorithms, you need to be able to express the algorithm in the highest level of abstraction possible, without prematurely adding architecture- or system-specific constructs.

In this two-pass model, domain experts, like the scientists and engineers who will be major consumers of high performance computing systems, should be able to express their ideas in a natural way, allowing them to explore their solution space rapidly. To maximize their productivity, these experts should be able to focus on their core competencies. For example, image processing experts should have at hand a language whose semantics, syntax and functions match the domain’s normal expression of ideas. Allowing image processing experts to remain focused on the core algorithm concepts, rather than the mundane issues of memory allocation, threading or data handling, empowers them to rapidly create appropriate algorithms.

The second pass of this two-pass model is the ability for users to annotate the algorithm with additional information that will act as guides and input to the underlying execution engine in order to achieve optimal performance for a particular architecture. This might include annotations to describe parallelism in the algorithm. Clearly, there are situations where architecture drives algorithms, and a distinct two-pass model is infeasible.

A better approach would be for the language to require no annotation to make optimal use of a particular architecture. This “fully implicit” system requires only a single pass performing operations such as automatic parallelization. This is an active research area, with currently no general solution. So for the foreseeable future, some annotation will be needed to provide clues to the particular execution engine to perform optimally. Such a system can be described as “minimally explicit,” where the minimum amount of explicit information is needed to assist the execution engine in producing optimal performance.

An example of such an annotation is the PARFOR construct available in MATLAB. By annotating the FOR as a PARFOR, the user is annotating the FOR loop with information that says the contents of the FOR loop may be executed in any order. If additional computational resources are available, the underlying execution engine can evaluate the code in parallel for faster results. When executed on a single processor system, PARFOR behaves like a traditional FOR loop. When executed on a multicore machine or cluster, PARFOR can make use of the additional computational resources to evaluate the code in parallel for faster results. With an annotated approach, the same algorithm can be rendered to run on a single core CPU, a multicore shared memory system, a cluster or some specialized accelerator, for optimal performance.

Another example of such an annotation are the SPAWN and SYNC constructs provided by Cilk (http://supertech.csail.mit.edu/cilk/). Cilk is an algorithmic multithreaded language. The philosophy behind Cilk is that a programmer should concentrate on annotating the program to expose parallelism and exploit locality. Traditional serial C-code can be annotated, and when coupled with the Cilk runtime system, efficiently scaled for large-scale threaded operation.

The advantage of such an approach is that the user makes a simple language substitution to provide additional information to the underlying execution engine. There is minimal mental load on the user to take full advantage of the hardware available.

How does this relate back to the two-pass model? A good example is a financial quantitative analyst attempting a Monte Carlo risk analysis of a portfolio. Running on a standard PC, the analyst would build a model in MATLAB, using specific financial modeling algorithms and components and traditional FOR loops to iterate over an extensive set of scenarios. Performance issues might arise due to the computational complexity of the problem. Having recently acquired a multicore machine, the analyst might be able to use the same program, modifying the FOR to a PARFOR. With the advantage of the new hardware would come a proportional speed up. Needing to cut execution time even further, the analyst might run the same PARFOR code on a departmental cluster and achieve the desired performance speed up.

With minimal effort and without knowledge of the underlying system, this domain expert was able to achieve high performance by minimally annotating his initial code. This is the kind of result high performance computing users should demand from all languages in the future.

—–

About the Author

Dr. Roy Lurie is vice president of engineering at The MathWorks, Inc. He is responsible for the MATLAB family of products, which includes dedicated teams in the areas of language execution, parallel and distributed computing, image processing, control design, financial modeling and analysis, test and measurement, and computational biology. He received his Ph.D. in Electrical Engineering from the University of Witwatersrand in South Africa in 1994. Prior to joining The MathWorks in 1994, he founded and operated OptiNum Solutions, selling MathWorks tools into the South African market.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industry updates delivered to you every week!

Edge-to-Cloud: Exploring an HPC Expedition in Self-Driving Learning

April 25, 2024

The journey begins as Kate Keahey's wandering path unfolds, leading to improbable events. Keahey, Senior Scientist at Argonne National Laboratory and the University of Chicago, leads Chameleon. This innovative projec Read more…

Quantum Internet: Tsinghua Researchers’ New Memory Framework could be Game-Changer

April 25, 2024

Researchers from the Center for Quantum Information (CQI), Tsinghua University, Beijing, have reported successful development and testing of a new programmable quantum memory framework. “This work provides a promising Read more…

Intel’s Silicon Brain System a Blueprint for Future AI Computing Architectures

April 24, 2024

Intel is releasing a whole arsenal of AI chips and systems hoping something will stick in the market. Its latest entry is a neuromorphic system called Hala Point. The system includes Intel's research chip called Loihi 2, Read more…

Anders Dam Jensen on HPC Sovereignty, Sustainability, and JU Progress

April 23, 2024

The recent 2024 EuroHPC Summit meeting took place in Antwerp, with attendance substantially up since 2023 to 750 participants. HPCwire asked Intersect360 Research senior analyst Steve Conway, who closely tracks HPC, AI, Read more…

AI Saves the Planet this Earth Day

April 22, 2024

Earth Day was originally conceived as a day of reflection. Our planet’s life-sustaining properties are unlike any other celestial body that we’ve observed, and this day of contemplation is meant to provide all of us Read more…

Intel Announces Hala Point – World’s Largest Neuromorphic System for Sustainable AI

April 22, 2024

As we find ourselves on the brink of a technological revolution, the need for efficient and sustainable computing solutions has never been more critical.  A computer system that can mimic the way humans process and s Read more…

Shutterstock 1748437547

Edge-to-Cloud: Exploring an HPC Expedition in Self-Driving Learning

April 25, 2024

The journey begins as Kate Keahey's wandering path unfolds, leading to improbable events. Keahey, Senior Scientist at Argonne National Laboratory and the Uni Read more…

Quantum Internet: Tsinghua Researchers’ New Memory Framework could be Game-Changer

April 25, 2024

Researchers from the Center for Quantum Information (CQI), Tsinghua University, Beijing, have reported successful development and testing of a new programmable Read more…

Intel’s Silicon Brain System a Blueprint for Future AI Computing Architectures

April 24, 2024

Intel is releasing a whole arsenal of AI chips and systems hoping something will stick in the market. Its latest entry is a neuromorphic system called Hala Poin Read more…

Anders Dam Jensen on HPC Sovereignty, Sustainability, and JU Progress

April 23, 2024

The recent 2024 EuroHPC Summit meeting took place in Antwerp, with attendance substantially up since 2023 to 750 participants. HPCwire asked Intersect360 Resear Read more…

AI Saves the Planet this Earth Day

April 22, 2024

Earth Day was originally conceived as a day of reflection. Our planet’s life-sustaining properties are unlike any other celestial body that we’ve observed, Read more…

Kathy Yelick on Post-Exascale Challenges

April 18, 2024

With the exascale era underway, the HPC community is already turning its attention to zettascale computing, the next of the 1,000-fold performance leaps that ha Read more…

Software Specialist Horizon Quantum to Build First-of-a-Kind Hardware Testbed

April 18, 2024

Horizon Quantum Computing, a Singapore-based quantum software start-up, announced today it would build its own testbed of quantum computers, starting with use o Read more…

MLCommons Launches New AI Safety Benchmark Initiative

April 16, 2024

MLCommons, organizer of the popular MLPerf benchmarking exercises (training and inference), is starting a new effort to benchmark AI Safety, one of the most pre Read more…

Nvidia H100: Are 550,000 GPUs Enough for This Year?

August 17, 2023

The GPU Squeeze continues to place a premium on Nvidia H100 GPUs. In a recent Financial Times article, Nvidia reports that it expects to ship 550,000 of its lat Read more…

Synopsys Eats Ansys: Does HPC Get Indigestion?

February 8, 2024

Recently, it was announced that Synopsys is buying HPC tool developer Ansys. Started in Pittsburgh, Pa., in 1970 as Swanson Analysis Systems, Inc. (SASI) by John Swanson (and eventually renamed), Ansys serves the CAE (Computer Aided Engineering)/multiphysics engineering simulation market. Read more…

Intel’s Server and PC Chip Development Will Blur After 2025

January 15, 2024

Intel's dealing with much more than chip rivals breathing down its neck; it is simultaneously integrating a bevy of new technologies such as chiplets, artificia Read more…

Comparing NVIDIA A100 and NVIDIA L40S: Which GPU is Ideal for AI and Graphics-Intensive Workloads?

October 30, 2023

With long lead times for the NVIDIA H100 and A100 GPUs, many organizations are looking at the new NVIDIA L40S GPU, which it’s a new GPU optimized for AI and g Read more…

Choosing the Right GPU for LLM Inference and Training

December 11, 2023

Accelerating the training and inference processes of deep learning models is crucial for unleashing their true potential and NVIDIA GPUs have emerged as a game- Read more…

Baidu Exits Quantum, Closely Following Alibaba’s Earlier Move

January 5, 2024

Reuters reported this week that Baidu, China’s giant e-commerce and services provider, is exiting the quantum computing development arena. Reuters reported � Read more…

Shutterstock 1179408610

Google Addresses the Mysteries of Its Hypercomputer 

December 28, 2023

When Google launched its Hypercomputer earlier this month (December 2023), the first reaction was, "Say what?" It turns out that the Hypercomputer is Google's t Read more…

AMD MI3000A

How AMD May Get Across the CUDA Moat

October 5, 2023

When discussing GenAI, the term "GPU" almost always enters the conversation and the topic often moves toward performance and access. Interestingly, the word "GPU" is assumed to mean "Nvidia" products. (As an aside, the popular Nvidia hardware used in GenAI are not technically... Read more…

Leading Solution Providers

Contributors

Shutterstock 1606064203

Meta’s Zuckerberg Puts Its AI Future in the Hands of 600,000 GPUs

January 25, 2024

In under two minutes, Meta's CEO, Mark Zuckerberg, laid out the company's AI plans, which included a plan to build an artificial intelligence system with the eq Read more…

China Is All In on a RISC-V Future

January 8, 2024

The state of RISC-V in China was discussed in a recent report released by the Jamestown Foundation, a Washington, D.C.-based think tank. The report, entitled "E Read more…

Shutterstock 1285747942

AMD’s Horsepower-packed MI300X GPU Beats Nvidia’s Upcoming H200

December 7, 2023

AMD and Nvidia are locked in an AI performance battle – much like the gaming GPU performance clash the companies have waged for decades. AMD has claimed it Read more…

Nvidia’s New Blackwell GPU Can Train AI Models with Trillions of Parameters

March 18, 2024

Nvidia's latest and fastest GPU, codenamed Blackwell, is here and will underpin the company's AI plans this year. The chip offers performance improvements from Read more…

Eyes on the Quantum Prize – D-Wave Says its Time is Now

January 30, 2024

Early quantum computing pioneer D-Wave again asserted – that at least for D-Wave – the commercial quantum era has begun. Speaking at its first in-person Ana Read more…

GenAI Having Major Impact on Data Culture, Survey Says

February 21, 2024

While 2023 was the year of GenAI, the adoption rates for GenAI did not match expectations. Most organizations are continuing to invest in GenAI but are yet to Read more…

The GenAI Datacenter Squeeze Is Here

February 1, 2024

The immediate effect of the GenAI GPU Squeeze was to reduce availability, either direct purchase or cloud access, increase cost, and push demand through the roof. A secondary issue has been developing over the last several years. Even though your organization secured several racks... Read more…

Intel’s Xeon General Manager Talks about Server Chips 

January 2, 2024

Intel is talking data-center growth and is done digging graves for its dead enterprise products, including GPUs, storage, and networking products, which fell to Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire