Intel: CPUs Will Prevail Over Accelerators in HPC

By Michael Feldman

September 24, 2008

HPC hardware accelerators — GPUs, FPGAs, the Cell processor, and custom ASICs like the ClearSpeed floating point device — have captured the imagination of HPC users in search of higher performance and lower power consumption. While these offload engines continue to show impressive performance results for supercomputing workloads, Intel is sticking to its CPU guns to deliver HPC to the broader market. According to Richard Dracott, Intel’s general manager of the company’s High Performance Computing business unit, CPU multicore processors, and eventually manycore processors, will prevail over accelerator solutions in the financial services industry, as well as for HPC applications in general.

Dracott says he’s seen the pattern before where people get attracted to specialized hardware for particular applications. But in the end, he says, general-purpose CPUs turn out to deliver the best ROI. Dracott claims that to exploit acceleration in HPC, developers need to modify the software anyway, so they might as well modify it for multicore. “What we’re finding is that if someone is going to go to the effort of optimizing an application to take advantage of an offload engine, whatever it may be, the first thing they have to do is parallelize their code,” he told me.

To Intel’s credit, the company has developed a full-featured set of tools and libraries to help mainstream developers parallelize their codes for x86 hardware. With the six-core Dunnington in the field today and eight-core Nehalem processors just around the corner, developers will need all the help they can get to fully utilize the additional processing power.

In fact though, adding CPU-based multithreading parallelism to your app tends to be more difficult than adding data parallelism. The latter is the only type of parallelism accelerators are any good at. And if your workload can exploit data parallelism, this can be done rather straightforwardly. With the advent of NVIDIA’s CUDA, AMD’s Brook+, RapidMind’s development platform, FPGA C-based frameworks, and SDKs from ClearSpeed and other vendors, the programming of these devices has become simpler.

And it may get simpler yet. PGI compiler developer Michael Wolfe thinks there is no reason why high-level language compilers can’t take advantage of these offload engines. “We believe we can produce compilers that allow evolutionary migration from today’s processors to accelerators, and that accelerators provide the most promising path to high performance in the future,” he wrote recently in his HPCwire column.

Of course, CPUs are not standing still performance-wise. According to Dracott, when financial customers were asked how long a 10x performance advantage over a CPU-based solution would have to be maintained to make it worth their while, they told him anywhere from 2-3 years up to as much as 7 years. For production environments, the software investment required to bring accelerators into the mix needs to account for re-testing and re-certification. In the case of the financial services industry (because of regulatory and other legal requirements), this can be a significant part of the effort. “And by the time they actually make the investment in the software, the general-purpose [CPU] hardware has caught up,” says Dracott.

Maybe. A lot of applications are already realizing much better than a 10x improvements in performance with hardware acceleration. SciComp, a company that offers derivatives pricing software, recently announced a “20-100X execution speed increase” for its pricing models. Other HPC workloads have done even better. And while the CPU hardware will eventually catch up to current accelerators, all silicon is moving up the performance ladder, roughly according to Moore’s Law. So the CPU-accelerator performance gap will in all likelihood remain.

Accelerators do have a steeper hill to climb in certain areas though. Except for the Cell processor, where a PowerPC core is built-in, all accelerators require a connection to a CPU host. Depending upon the nature of the connection (PCI, HyperTransport, QuickPath, etc.) the offload engine can become starved for data because of bandwidth limitations. In fact, the time spent talking to the host can eat up any performance gains realized through faster execution. More local store on the accelerator and careful programming can often mitigate this, but the general-purpose CPU has a built-in advantage here.

Dracott points out that the lack of double precision floating point capabilities and error correction code (ECC) memory limits accelerator deployment in many HPC production environments. This is especially true in the financial space, where predictability and reliability of results are paramount. But the latest generation of offload engines all support DP to some degree, and only GPUs have an ECC problem. ClearSpeed ASICs, in particular, have full-throttle 64-bit support plus enterprise-level ECC protection. GPUs, on the other hand, will have to deal with soft error protection in some systematic way to become a more widely deployed solution for technical computing. I’ve got to believe that NVIDIA and AMD will eventually add this capability to their GPU computing offerings.
 
The shortcomings of accelerator solutions have prevented much real-world deployment in production situations, according to Dracott. He thinks users will continue to experiment with offload engines for several more years, but with the exception of certain application niches, most will eventually end up back at the CPU. But interest in these more exotic solutions remains high in the HPC community. HPCwire’s Dennis Barker, at this week’s High Performance on Wall Street conference, reports that the hardware accelerator companies were drawing quite a crowd and a number of FPGA-accelerated products are already on the market. “Sellers of these products were all over the place, their booths were busy, and several sessions on the subject were standing-room only,” he writes.

And despite Intel’s commitment to the x86 CPU and Dracott’s take on the future of accelerators, the company has been evolving its position on co-processor acceleration. Intel’s (and IBM’s) Geneseo initiative to extend PCI Express for offload engines and its plans to license the new QuickPath interconnect technology would seem to indicate that the company hasn’t completely discounted acceleration. AMD, of course, has Torenzza, its own co-processor integration technology. Whether Intel is just hedging its bets to counter its rival or is genuinely committed to sharing the computing world with other architectures remains to be seen.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Lenovo to Debut ‘Neptune’ Cooling Technologies at ISC ‘18

June 19, 2018

Lenovo today announced a set of cooling technologies, dubbed Neptune, that include direct to node (DTN) warm water cooling, rear door heat exchanger (RDHX), and hybrid solutions that combine air and liquid cooling. Lenov Read more…

By John Russell

World Cup is Lame Compared to This Competition

June 18, 2018

So you think World Cup soccer is a big deal? While I’m sure it’s very compelling to watch a bunch of athletes kick a ball around, World Cup misses the boat because it doesn’t include teams putting together their ow Read more…

By Dan Olds

IBM Demonstrates Deep Neural Network Training with Analog Memory Devices

June 18, 2018

From smarter, more personalized apps to seemingly-ubiquitous Google Assistant and Alexa devices, AI adoption is showing no signs of slowing down – and yet, the hardware used for AI is far from perfect. Currently, GPUs Read more…

By Oliver Peckham

HPE Extreme Performance Solutions

HPC and AI Convergence is Accelerating New Levels of Intelligence

Data analytics is the most valuable tool in the digital marketplace – so much so that organizations are employing high performance computing (HPC) capabilities to rapidly collect, share, and analyze endless streams of data. Read more…

IBM Accelerated Insights

Banks Boost Infrastructure to Tackle GDPR

As banks become more digital and data-driven, their IT managers are challenged with fast growing data volumes and lines-of-businesses’ (LoBs’) seemingly limitless appetite for analytics. Read more…

Sandia to Take Delivery of World’s Largest Arm System

June 18, 2018

While the enterprise remains circumspect on prospects for Arm servers in the datacenter, the leadership HPC community is taking a bolder, brighter view of the x86 server CPU alternative. Amongst current and planned Arm HPC installations – i.e., the innovative Mont-Blanc project, led by Bull/Atos, the 'Isambard’ Cray XC50 going into the University of Bristol, and commitments from both Japan and France among others -- HPE is announcing that it will be supply the United States National Nuclear Security Administration (NNSA) with a 2.3 petaflops peak Arm-based system, named Astra. Read more…

By Tiffany Trader

Sandia to Take Delivery of World’s Largest Arm System

June 18, 2018

While the enterprise remains circumspect on prospects for Arm servers in the datacenter, the leadership HPC community is taking a bolder, brighter view of the x86 server CPU alternative. Amongst current and planned Arm HPC installations – i.e., the innovative Mont-Blanc project, led by Bull/Atos, the 'Isambard’ Cray XC50 going into the University of Bristol, and commitments from both Japan and France among others -- HPE is announcing that it will be supply the United States National Nuclear Security Administration (NNSA) with a 2.3 petaflops peak Arm-based system, named Astra. Read more…

By Tiffany Trader

The Machine Learning Hype Cycle and HPC

June 14, 2018

Like many other HPC professionals I’m following the hype cycle around machine learning/deep learning with interest. I subscribe to the view that we’re probably approaching the ‘peak of inflated expectation’ but not quite yet starting the descent into the ‘trough of disillusionment. This still raises the probability that... Read more…

By Dairsie Latimer

Xiaoxiang Zhu Receives the 2018 PRACE Ada Lovelace Award for HPC

June 13, 2018

Xiaoxiang Zhu, who works for the German Aerospace Center (DLR) and Technical University of Munich (TUM), was awarded the 2018 PRACE Ada Lovelace Award for HPC for her outstanding contributions in the field of high performance computing (HPC) in Europe. Read more…

By Elizabeth Leake

U.S Considering Launch of National Quantum Initiative

June 11, 2018

Sometime this month the U.S. House Science Committee will introduce legislation to launch a 10-year National Quantum Initiative, according to a recent report by Read more…

By John Russell

ORNL Summit Supercomputer Is Officially Here

June 8, 2018

Oak Ridge National Laboratory (ORNL) together with IBM and Nvidia celebrated the official unveiling of the Department of Energy (DOE) Summit supercomputer toda Read more…

By Tiffany Trader

Exascale USA – Continuing to Move Forward

June 6, 2018

The end of May 2018, saw several important events that continue to advance the Department of Energy’s (DOE) Exascale Computing Initiative (ECI) for the United Read more…

By Alex R. Larzelere

Exascale for the Rest of Us: Exaflops Systems Capable for Industry

June 6, 2018

Enterprise advanced scale computing – or HPC in the enterprise – is an entity unto itself, situated between (and with characteristics of) conventional enter Read more…

By Doug Black

Fracas in Frankfurt: ISC18 Cluster Competition Teams Unveiled

June 6, 2018

The Student Cluster Competition season heats up with the seventh edition of the ISC Student Cluster Competition, slated to begin on June 25th in Frankfurt, Germ Read more…

By Dan Olds

MLPerf – Will New Machine Learning Benchmark Help Propel AI Forward?

May 2, 2018

Let the AI benchmarking wars begin. Today, a diverse group from academia and industry – Google, Baidu, Intel, AMD, Harvard, and Stanford among them – releas Read more…

By John Russell

How the Cloud Is Falling Short for HPC

March 15, 2018

The last couple of years have seen cloud computing gradually build some legitimacy within the HPC world, but still the HPC industry lies far behind enterprise I Read more…

By Chris Downing

US Plans $1.8 Billion Spend on DOE Exascale Supercomputing

April 11, 2018

On Monday, the United States Department of Energy announced its intention to procure up to three exascale supercomputers at a cost of up to $1.8 billion with th Read more…

By Tiffany Trader

Deep Learning at 15 PFlops Enables Training for Extreme Weather Identification at Scale

March 19, 2018

Petaflop per second deep learning training performance on the NERSC (National Energy Research Scientific Computing Center) Cori supercomputer has given climate Read more…

By Rob Farber

Lenovo Unveils Warm Water Cooled ThinkSystem SD650 in Rampup to LRZ Install

February 22, 2018

This week Lenovo took the wraps off the ThinkSystem SD650 high-density server with third-generation direct water cooling technology developed in tandem with par Read more…

By Tiffany Trader

ORNL Summit Supercomputer Is Officially Here

June 8, 2018

Oak Ridge National Laboratory (ORNL) together with IBM and Nvidia celebrated the official unveiling of the Department of Energy (DOE) Summit supercomputer toda Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

HPE Wins $57 Million DoD Supercomputing Contract

February 20, 2018

Hewlett Packard Enterprise (HPE) today revealed details of its massive $57 million HPC contract with the U.S. Department of Defense (DoD). The deal calls for HP Read more…

By Tiffany Trader

Leading Solution Providers

SC17 Booth Video Tours Playlist

Altair @ SC17

Altair

AMD @ SC17

AMD

ASRock Rack @ SC17

ASRock Rack

CEJN @ SC17

CEJN

DDN Storage @ SC17

DDN Storage

Huawei @ SC17

Huawei

IBM @ SC17

IBM

IBM Power Systems @ SC17

IBM Power Systems

Intel @ SC17

Intel

Lenovo @ SC17

Lenovo

Mellanox Technologies @ SC17

Mellanox Technologies

Microsoft @ SC17

Microsoft

Penguin Computing @ SC17

Penguin Computing

Pure Storage @ SC17

Pure Storage

Supericro @ SC17

Supericro

Tyan @ SC17

Tyan

Univa @ SC17

Univa

Hennessy & Patterson: A New Golden Age for Computer Architecture

April 17, 2018

On Monday June 4, 2018, 2017 A.M. Turing Award Winners John L. Hennessy and David A. Patterson will deliver the Turing Lecture at the 45th International Sympo Read more…

By Staff

Google Chases Quantum Supremacy with 72-Qubit Processor

March 7, 2018

Google pulled ahead of the pack this week in the race toward "quantum supremacy," with the introduction of a new 72-qubit quantum processor called Bristlecone. Read more…

By Tiffany Trader

Google I/O 2018: AI Everywhere; TPU 3.0 Delivers 100+ Petaflops but Requires Liquid Cooling

May 9, 2018

All things AI dominated discussion at yesterday’s opening of Google’s I/O 2018 developers meeting covering much of Google's near-term product roadmap. The e Read more…

By John Russell

Nvidia Ups Hardware Game with 16-GPU DGX-2 Server and 18-Port NVSwitch

March 27, 2018

Nvidia unveiled a raft of new products from its annual technology conference in San Jose today, and despite not offering up a new chip architecture, there were still a few surprises in store for HPC hardware aficionados. Read more…

By Tiffany Trader

Pattern Computer – Startup Claims Breakthrough in ‘Pattern Discovery’ Technology

May 23, 2018

If it weren’t for the heavy-hitter technology team behind start-up Pattern Computer, which emerged from stealth today in a live-streamed event from San Franci Read more…

By John Russell

Part One: Deep Dive into 2018 Trends in Life Sciences HPC

March 1, 2018

Life sciences is an interesting lens through which to see HPC. It is perhaps not an obvious choice, given life sciences’ relative newness as a heavy user of H Read more…

By John Russell

Intel Pledges First Commercial Nervana Product ‘Spring Crest’ in 2019

May 24, 2018

At its AI developer conference in San Francisco yesterday, Intel embraced a holistic approach to AI and showed off a broad AI portfolio that includes Xeon processors, Movidius technologies, FPGAs and Intel’s Nervana Neural Network Processors (NNPs), based on the technology it acquired in 2016. Read more…

By Tiffany Trader

Google Charts Two-Dimensional Quantum Course

April 26, 2018

Quantum error correction, essential for achieving universal fault-tolerant quantum computation, is one of the main challenges of the quantum computing field and it’s top of mind for Google’s John Martinis. At a presentation last week at the HPC User Forum in Tucson, Martinis, one of the world's foremost experts in quantum computing, emphasized... Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This