Woven Launches New 10 GbE Switch

By Michael Feldman

October 14, 2008

Woven Systems has expanded its Ethernet product lineup with a new 10 Gigabit Ethernet (GbE) top-of-rack switch. The 24-port TRX 200 offers 10 gigabits per second (Gbps) wirespeed performance on each port and InfiniBand-like latencies. The TRX 200 joins Woven’s other two offerings, the 48-port Gigabit Ethernet TRX 100 top-of-rack switch and the 144-port 10 GbE “Fabric Switch” for the network core.

Like its Woven brethren, the TRX 200 is aimed at HPC and Web services — two markets where bandwidth and latency requirements exceed that of the standard enterprise setup. Leading-edge interconnect performance has been the norm in HPC environments for some time. But with the advent of the Web services industry, a whole new market is developing for high bandwidth, low latency infrastructure. In this area, search engines or any application that performs Web page indexing must often operate with soft real-time constraints, so node-to-node latencies must be kept to a minimum.

Bandwidth can always be overprovisioned with extra switches, but that doesn’t help the latency picture. Woven has specifically designed its products for InfiniBand-like latencies. Instead of store-and-forward switching used in standard Ethernet gear, Woven employs cut-through switching. The company claims latencies of 1.6µs for its flagship EFX 1000 switch.

Woven’s big story with the new TRX 200 top-of-rack switch is its pricing. At less than $500 per wirespeed 10 Gbps port ($11,995 for a single unit), Woven is pushing back against Arastra, its closest competitor in high-performance 10 GbE switching. When Arastra launched its line of Ethernet gear last year, it quoted $400 per port. But it’s not clear if that pricing applies across its entire product line. The new TRX against Arastra’s 24-port 7124S would be the real apples-to-apples comparison, since both products claim to offer bi-directional wirespeed performance (480 Gbps aggregate) plus low latency.

The closest Cisco gear is probably the 4900M, which is a top-of-rack switch for users transitioning from GbE to 10 GbE. But at a maximum aggregate throughput of just 320 Gbps, and latencies in the 2.6µs range (according to eWeek testing), the Cisco switch is really not in the same performance ballpark as the Woven and Arastra offerings. Also, with a price that starts at $22,000, the 4900M is at least twice as expensive as its upstart competition.*

The roadblocks remaining for the Woven offerings, and for 10 GbE switches in general, are price (compared to standard Gigabit Ethernet) and performance (compared to InfiniBand). But if you are an Ethernet vendor, time may be on your side.

Many in the industry are predicting that by 2010 10 GbE will move onto the server motherboard en masse, reducing the cost of connection from about $300 or $400 down to around $22 dollars. (The real cost to the buyer is even a bit less than that since motherboard manufacturers will be replacing the older GbE interfaces.) In that same year, the total cost of a 10 GbE connection will be just twice that of a GbE connection. In 2002, the 2x cost differential proved to be an inflection point for the transition from Fast Ethernet to GbE. “That will usher in a much bigger ramp for 10 GigE servers and thus the beginning of a large transformation of the datacenter,” predicts Woven VP of marketing Joe Ammirato.

If history does repeat itself, one of the first places we’re likely to see the GbE to 10 GbE transition is on the TOP500 list. Even today, 57 percent of the top “supercomputers” are based on GbE. It must be said, though, that in most of these cases, the interconnect is not the bottleneck for system performance, or if it is, it’s a tolerable one. For loosely-coupled, embarrassingly-parallel applications, node-to-node communications are only needed intermittently, so larger latencies and lower bandwidth are not as much of an issue.

For more tightly-coupled HPC applications, DDR InfiniBand is now the interconnect of choice. When 10 GbE goes mainstream, the choice becomes more difficult. Joe Ammirato says both performance and cost are catching up to InfiniBand, even without the benefit of native 10 GbE on the motherboard. When that happens, the interconnect interface becomes essentially free for Ethernet fabrics compared to InfiniBand, which will still require a $300 adapter.

DDR and QDR InfiniBand will still have the raw performance advantage, offering perhaps a half or a third the latency of the best Ethernet solutions and more than twice the bandwidth (QDR is 40 Gbps, but because the on-board PCIe interface limits how fast data can be moved, only about 25 Gbps is realized). Masum Mir, Woven’s senior product manager, admits that InfiniBand will remain viable, but the presence of affordable 10 GbE solutions will compete at the high end. Especially with larger clusters and more variable traffic data traffic patterns, Mir sees Ethernet solutions like theirs — with dynamic congestion avoidance and lossless fabric support — as the more flexible choice.

Certainly for end users looking for a longer ROI horizon, Ethernet will look less risky. The battle cry of all Ethernet vendors continues to be that Ethernet will prevail. This may be less true for HPC users, who have come to view InfiniBand as a more mainstream technology with each passing year. And with much of the discussion about 10 GbE still in the future tense, companies like Woven Systems will be required to push the technology uphill for the next couple of years.

*Update: A more accurate comparison may be with Cisco’s new Nexus 5020, a 40-port 10 GbE switch that offers wirespeed performance and a switch latency of 3.2µs. The 5020 can be expanded to up to 52 10 GbE ports to yield an aggregate throughput of 1 Tbps. At around $900 per port it’s twice as expensive as the Woven or Arastra gear, but the Cisco box also comes with support for Fibre Channel over Ethernet and Cisco Data Center Ethernet.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

IBM Launches Commercial Quantum Network with Samsung, ORNL

December 14, 2017

In the race to commercialize quantum computing, IBM is one of several companies leading the pack. Today, IBM announced it had signed JPMorgan Chase, Daimler AG, Samsung and a number of other corporations to its IBM Q Net Read more…

By Tiffany Trader

TACC Researchers Test AI Traffic Monitoring Tool in Austin

December 13, 2017

Traffic jams and mishaps are often painful and sometimes dangerous facts of life. At this week’s IEEE International Conference on Big Data being held in Boston, researchers from TACC and colleagues will present a new Read more…

By HPCwire Staff

AMD Wins Another: Baidu to Deploy EPYC on Single Socket Servers

December 13, 2017

When AMD introduced its EPYC chip line in June, the company said a portion of the line was specifically designed to re-invigorate a single socket segment in what has become an overwhelmingly two-socket landscape in the d Read more…

By John Russell

HPE Extreme Performance Solutions

Explore the Origins of Space with COSMOS and Memory-Driven Computing

From the formation of black holes to the origins of space, data is the key to unlocking the secrets of the early universe. Read more…

Microsoft Wants to Speed Quantum Development

December 12, 2017

Quantum computing continues to make headlines in what remains of 2017 as several tech giants jockey to establish a pole position in the race toward commercialization of quantum. This week, Microsoft took the next step in Read more…

By Tiffany Trader

IBM Launches Commercial Quantum Network with Samsung, ORNL

December 14, 2017

In the race to commercialize quantum computing, IBM is one of several companies leading the pack. Today, IBM announced it had signed JPMorgan Chase, Daimler AG, Read more…

By Tiffany Trader

AMD Wins Another: Baidu to Deploy EPYC on Single Socket Servers

December 13, 2017

When AMD introduced its EPYC chip line in June, the company said a portion of the line was specifically designed to re-invigorate a single socket segment in wha Read more…

By John Russell

Microsoft Wants to Speed Quantum Development

December 12, 2017

Quantum computing continues to make headlines in what remains of 2017 as several tech giants jockey to establish a pole position in the race toward commercializ Read more…

By Tiffany Trader

HPC Iron, Soft, Data, People – It Takes an Ecosystem!

December 11, 2017

Cutting edge advanced computing hardware (aka big iron) does not stand by itself. These computers are the pinnacle of a myriad of technologies that must be care Read more…

By Alex R. Larzelere

IBM Begins Power9 Rollout with Backing from DOE, Google

December 6, 2017

After over a year of buildup, IBM is unveiling its first Power9 system based on the same architecture as the Department of Energy CORAL supercomputers, Summit a Read more…

By Tiffany Trader

Microsoft Spins Cycle Computing into Core Azure Product

December 5, 2017

Last August, cloud giant Microsoft acquired HPC cloud orchestration pioneer Cycle Computing. Since then the focus has been on integrating Cycle’s organization Read more…

By John Russell

GlobalFoundries, Ayar Labs Team Up to Commercialize Optical I/O

December 4, 2017

GlobalFoundries (GF) and Ayar Labs, a startup focused on using light, instead of electricity, to transfer data between chips, today announced they've entered in Read more…

By Tiffany Trader

HPE In-Memory Platform Comes to COSMOS

November 30, 2017

Hewlett Packard Enterprise is on a mission to accelerate space research. In August, it sent the first commercial-off-the-shelf HPC system into space for testing Read more…

By Tiffany Trader

US Coalesces Plans for First Exascale Supercomputer: Aurora in 2021

September 27, 2017

At the Advanced Scientific Computing Advisory Committee (ASCAC) meeting, in Arlington, Va., yesterday (Sept. 26), it was revealed that the "Aurora" supercompute Read more…

By Tiffany Trader

NERSC Scales Scientific Deep Learning to 15 Petaflops

August 28, 2017

A collaborative effort between Intel, NERSC and Stanford has delivered the first 15-petaflops deep learning software running on HPC platforms and is, according Read more…

By Rob Farber

Oracle Layoffs Reportedly Hit SPARC and Solaris Hard

September 7, 2017

Oracle’s latest layoffs have many wondering if this is the end of the line for the SPARC processor and Solaris OS development. As reported by multiple sources Read more…

By John Russell

AMD Showcases Growing Portfolio of EPYC and Radeon-based Systems at SC17

November 13, 2017

AMD’s charge back into HPC and the datacenter is on full display at SC17. Having launched the EPYC processor line in June along with its MI25 GPU the focus he Read more…

By John Russell

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Japan Unveils Quantum Neural Network

November 22, 2017

The U.S. and China are leading the race toward productive quantum computing, but it's early enough that ultimate leadership is still something of an open questi Read more…

By Tiffany Trader

GlobalFoundries Puts Wind in AMD’s Sails with 12nm FinFET

September 24, 2017

From its annual tech conference last week (Sept. 20), where GlobalFoundries welcomed more than 600 semiconductor professionals (reaching the Santa Clara venue Read more…

By Tiffany Trader

Amazon Debuts New AMD-based GPU Instances for Graphics Acceleration

September 12, 2017

Last week Amazon Web Services (AWS) streaming service, AppStream 2.0, introduced a new GPU instance called Graphics Design intended to accelerate graphics. The Read more…

By John Russell

Leading Solution Providers

IBM Begins Power9 Rollout with Backing from DOE, Google

December 6, 2017

After over a year of buildup, IBM is unveiling its first Power9 system based on the same architecture as the Department of Energy CORAL supercomputers, Summit a Read more…

By Tiffany Trader

Perspective: What Really Happened at SC17?

November 22, 2017

SC is over. Now comes the myriad of follow-ups. Inboxes are filled with templated emails from vendors and other exhibitors hoping to win a place in the post-SC thinking of booth visitors. Attendees of tutorials, workshops and other technical sessions will be inundated with requests for feedback. Read more…

By Andrew Jones

EU Funds 20 Million Euro ARM+FPGA Exascale Project

September 7, 2017

At the Barcelona Supercomputer Centre on Wednesday (Sept. 6), 16 partners gathered to launch the EuroEXA project, which invests €20 million over three-and-a-half years into exascale-focused research and development. Led by the Horizon 2020 program, EuroEXA picks up the banner of a triad of partner projects — ExaNeSt, EcoScale and ExaNoDe — building on their work... Read more…

By Tiffany Trader

Delays, Smoke, Records & Markets – A Candid Conversation with Cray CEO Peter Ungaro

October 5, 2017

Earlier this month, Tom Tabor, publisher of HPCwire and I had a very personal conversation with Cray CEO Peter Ungaro. Cray has been on something of a Cinderell Read more…

By Tiffany Trader & Tom Tabor

Tensors Come of Age: Why the AI Revolution Will Help HPC

November 13, 2017

Thirty years ago, parallel computing was coming of age. A bitter battle began between stalwart vector computing supporters and advocates of various approaches to parallel computing. IBM skeptic Alan Karp, reacting to announcements of nCUBE’s 1024-microprocessor system and Thinking Machines’ 65,536-element array, made a public $100 wager that no one could get a parallel speedup of over 200 on real HPC workloads. Read more…

By John Gustafson & Lenore Mullin

Flipping the Flops and Reading the Top500 Tea Leaves

November 13, 2017

The 50th edition of the Top500 list, the biannual publication of the world’s fastest supercomputers based on public Linpack benchmarking results, was released Read more…

By Tiffany Trader

Intel Launches Software Tools to Ease FPGA Programming

September 5, 2017

Field Programmable Gate Arrays (FPGAs) have a reputation for being difficult to program, requiring expertise in specialty languages, like Verilog or VHDL. Easin Read more…

By Tiffany Trader

HPC Chips – A Veritable Smorgasbord?

October 10, 2017

For the first time since AMD's ill-fated launch of Bulldozer the answer to the question, 'Which CPU will be in my next HPC system?' doesn't have to be 'Whichever variety of Intel Xeon E5 they are selling when we procure'. Read more…

By Dairsie Latimer

  • arrow
  • Click Here for More Headlines
  • arrow
Share This