Lawrence Livermore Prepares for 20 Petaflop Blue Gene/Q

By Michael Feldman

February 3, 2009

Roadrunner and Jaguar, the DOE supercomputers that launched the petaflop era last year, will soon be eclipsed by new machines more than ten times as powerful. IBM and the US National Nuclear Security Administration (NNSA) announced on Tuesday that in 2011 Lawrence Livermore National Laboratory will install a 20 petaflop system to provide computational support for the country’s aging nuclear weapons.

Building on its Blue Gene heritage, IBM will deliver “Dawn,” a 500 teraflop Blue Gene/P system in the first quarter of this year, followed by “Sequoia,” a 20 petaflop next-generation Blue Gene/Q machine for 2011. Sequoia is expected to officially go online in 2012. The new machines will take over Lawrence Livermore’s weapon simulation codes that are being maintained under the Advanced Simulation and Computing (ASC) Program. Currently this work is being done with the existing capability supercomputers at the lab: the 100 teraflop ASC Purple and the 600 teraflop Blue Gene/L.

Dawn will act as an interim platform for porting and scaling the weapons codes. Once the Blue Gene/Q super comes online, those codes will be moved over to the bigger machine for production. The Dawn machine is in the process of being built right now, with about half of the machine already wired together at Lawrence Livermore. The lab is planning on getting the rest of the hardware over the next few months, with system acceptance scheduled for April.

Using Dawn as a stepping stone to Sequoia is possible since, unlike Blue Gene/L, both Blue Gene/P and Blue Gene/Q support node-level cache coherency, which allows for SMP-style programming. Especially for the weapons code, mapping one MPI task per core would be a real challenge, but going to a mixed SMP-message passing model — shared-memory parallelism within the nodes and distributed parallelism across the nodes — is much more practical.

Not only will Sequoia be more than ten times as powerful as the current crop of petaflop supercomputers, its energy efficiency will be much improved. According to IBM Deep Computing VP Dave Turek, Sequoia will consume around 6 megawatts, yielding an energy efficiency ratio of over 3,000 MFLOPS/watt*. That represents a 7X improvement over the Blue Gene/P generation (440 MFLOPS/watt*), and is even better than the Cell-based Roadrunner system at Los Alamos (587 MFLOPS/watt*). For a starker comparison, the 1.6 petaflop Opteron-based Jaguar supercomputer installed at Oak Ridge National Laboratory uses about 8.5 megawatts (188 MFLOPS/watt*).

When Sequoia arrives in the first half of 2011, space is going to be at a premium in the lab’s Terascale Simulation Facility, (which already houses ASC Purple and the Blue Gene/L system) but power is going to be the real problem. Although both new Blue Genes are much more energy efficient than their predecessors, the lab is planning to more than double the facility’s power — from 12.5 to 30 megawatts.

IBM is not releasing low-level details of the Blue Gene/Q architecture. However, since Sequoia will be composed of 98,304 compute nodes and contain a total of 1.6 million cores, one can surmise that a Blue Gene/Q node will contain 16 cores. Whether this is implemented as one 16-core chip or two 8-core chips (or even four quad-core chips) remains to be seen. Since Sequoia will sport 1.6 petabytes of memory, each node stands to have 16 GB. The current Blue Gene/P technology offers 4 cores and 4 GB of main memory per node.

At 20 petaflops, Sequoia will be 160 times as powerful as Lawrence Livermore’s ASC Purple and 17 times as powerful as its current Blue Gene/L, giving scientists a lot more computing cycles for weapons simulations and basic science research. “It’s been an interesting journey,” notes Turek. “When you think back to when the ASCI [now ASC] program was launched in the 90s and what the aspirations were for FLOPs back then versus where we are today, I think we’ve exceeded everyone’s expectations.”

Indeed. Considering the original supercomputers under the ASC program (i.e., ASCI Blue Pacific at 3.9 teraflops and ASCI White at 12.3 teraflops) don’t even show up on today’s TOP500 list, the new systems represent a completely different class of capability for the stockpile stewardship program. Mark Seager, who manages the Platforms Program for the ASC Program at Lawrence Livermore and led the team that wrote the RFP for the new machines, says Sequoia will enable a new level of predictive science.

Toward that end, the lab will be enhancing the existing weapons codes with “uncertainty quantification” (UQ) methods. Seager says this is a relatively new branch of science that allows researchers to apply a lot of physics parameters to the simulations. With this model, researchers will be able to quantify the errors associated with simulation results. Once the largest sources of errors are known, the models can be systematically refined to enhance the predictive capabilities. Unfortunately, UQ is computationally expensive, so only limited numbers of simulations can be attempted on existing hardware.

“On [ASC] Purple we were able to do a UQ study on one weapons system in about a month with approximately 4,400 calculations, some of which took up the maximum practical size of the machine, which is 8,192 MPI tasks,” explains Seager. “With Sequoia, multiply that capability by somewhere between 12 and 24X.”

But MPI applications tend to be very sensitive to hardware or software failures, so completing a fault-free run is going to be challenging at the scale of a million-plus cores. To address the resiliency issue, Seager says they’ll be applying “ensemble” calculations to their codes. In the ensemble method, the same algorithm can be run thousands of time with different sets of parameters. Using this approach, isolated failures on a small number of calculations can be tolerated without sacrificing the integrity of the whole application. It’s analogous to the way many Web applications like search engines operate today.

Sequoia’s second mission will be to support basic science at scale, where scientists are looking to achieve 20 to 50 times the capability that is provided by the existing Blue Gene/L system. Along with the extra capability Sequoia will provide the weapons codes migrating from ASC Purple, Lawrence Livermore stands to leapfrog rather decisively into the petascale era. Says Seager: “It is probably the single largest jump in computing power that the lab has ever seen.”

*The original version of this article incorrectly expressed the energy efficiency ratios at FLOPS/watt, instead of MFLOPS/watt.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

India Plots Three-Phase Indigenous Supercomputing Strategy

July 26, 2017

Additional details on India's plans to stand up an indigenous supercomputer came to light earlier this week. As reported in the Indian press, the Rs 4,500-crore (~$675 million) supercomputing project, approved by the Ind Read more…

By Tiffany Trader

Tuning InfiniBand Interconnects Using Congestion Control

July 26, 2017

InfiniBand is among the most common and well-known cluster interconnect technologies. However, the complexities of an InfiniBand (IB) network can frustrate the most experienced cluster administrators. Maintaining a balan Read more…

By Adam Dorsey

NSF Project Sets Up First Machine Learning Cyberinfrastructure – CHASE-CI

July 25, 2017

Earlier this month, the National Science Foundation issued a $1 million grant to Larry Smarr, director of Calit2, and a group of his colleagues to create a community infrastructure in support of machine learning research Read more…

By John Russell

HPE Extreme Performance Solutions

HPE Servers Deliver High Performance Remote Visualization

Whether generating seismic simulations, locating new productive oil reservoirs, or constructing complex models of the earth’s subsurface, energy, oil, and gas (EO&G) is a highly data-driven industry. Read more…

DARPA Continues Investment in Post-Moore’s Technologies

July 24, 2017

The U.S. military long ago ceded dominance in electronics innovation to Silicon Valley, the DoD-backed powerhouse that has driven microelectronic generation for decades. With Moore's Law clearly running out of steam, the Read more…

By George Leopold

India Plots Three-Phase Indigenous Supercomputing Strategy

July 26, 2017

Additional details on India's plans to stand up an indigenous supercomputer came to light earlier this week. As reported in the Indian press, the Rs 4,500-crore Read more…

By Tiffany Trader

Tuning InfiniBand Interconnects Using Congestion Control

July 26, 2017

InfiniBand is among the most common and well-known cluster interconnect technologies. However, the complexities of an InfiniBand (IB) network can frustrate the Read more…

By Adam Dorsey

NSF Project Sets Up First Machine Learning Cyberinfrastructure – CHASE-CI

July 25, 2017

Earlier this month, the National Science Foundation issued a $1 million grant to Larry Smarr, director of Calit2, and a group of his colleagues to create a comm Read more…

By John Russell

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in Read more…

By Tiffany Trader

Fujitsu Continues HPC, AI Push

July 19, 2017

Summer is well under way, but the so-called summertime slowdown, linked with hot temperatures and longer vacations, does not seem to have impacted Fujitsu's out Read more…

By Tiffany Trader

Researchers Use DNA to Store and Retrieve Digital Movie

July 18, 2017

From abacus to pencil and paper to semiconductor chips, the technology of computing has always been an ever-changing target. The human brain is probably the com Read more…

By John Russell

The Exascale FY18 Budget – The Next Step

July 17, 2017

On July 12, 2017, the U.S. federal budget for its Exascale Computing Initiative (ECI) took its next step forward. On that day, the full Appropriations Committee Read more…

By Alex R. Larzelere

Women in HPC Luncheon Shines Light on Female-Friendly Hiring Practices

July 13, 2017

The second annual Women in HPC luncheon was held on June 20, 2017, during the International Supercomputing Conference in Frankfurt, Germany. The luncheon provid Read more…

By Tiffany Trader

Google Pulls Back the Covers on Its First Machine Learning Chip

April 6, 2017

This week Google released a report detailing the design and performance characteristics of the Tensor Processing Unit (TPU), its custom ASIC for the inference Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Just how close real-wo Read more…

By John Russell

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its a Read more…

By Tiffany Trader

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the cam Read more…

By John Russell

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

In this contributed perspective piece, Intel’s Jim Jeffers makes the case that CPU-based visualization is now widely adopted and as such is no longer a contrarian view, but is rather an exascale requirement. Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

Facebook Open Sources Caffe2; Nvidia, Intel Rush to Optimize

April 18, 2017

From its F8 developer conference in San Jose, Calif., today, Facebook announced Caffe2, a new open-source, cross-platform framework for deep learning. Caffe2 is the successor to Caffe, the deep learning framework developed by Berkeley AI Research and community contributors. Read more…

By Tiffany Trader

Leading Solution Providers

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurrencies like Bitcoin, along with classified government communications and other sensitive digital transfers. Read more…

By Doug Black

MIT Mathematician Spins Up 220,000-Core Google Compute Cluster

April 21, 2017

On Thursday, Google announced that MIT math professor and computational number theorist Andrew V. Sutherland had set a record for the largest Google Compute Engine (GCE) job. Sutherland ran the massive mathematics workload on 220,000 GCE cores using preemptible virtual machine instances. Read more…

By Tiffany Trader

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

Groq This: New AI Chips to Give GPUs a Run for Deep Learning Money

April 24, 2017

CPUs and GPUs, move over. Thanks to recent revelations surrounding Google’s new Tensor Processing Unit (TPU), the computing world appears to be on the cusp of Read more…

By Alex Woodie

Six Exascale PathForward Vendors Selected; DoE Providing $258M

June 15, 2017

The much-anticipated PathForward awards for hardware R&D in support of the Exascale Computing Project were announced today with six vendors selected – AMD Read more…

By John Russell

Top500 Results: Latest List Trends and What’s in Store

June 19, 2017

Greetings from Frankfurt and the 2017 International Supercomputing Conference where the latest Top500 list has just been revealed. Although there were no major Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This