Heterogeneous Processing: Trite or Trend?

By Dr. Vincent Natoli

June 24, 2009

Heterogeneous processing or co-processing on chips other than the CPU is the most recent trend in HPC. To some extent there has always been a small fringe element pursuing this direction, but as recently as a few years ago, a colleague claiming to be coding a GPU for physics or chemistry calculations would have been politely avoided. Programming FPGAs in strange hardware languages was even more far-fetched.

In the past few years, however, there has been a rich diversity of efforts and support from major HPC vendors. This year brings at least two conferences focused on heterogeneous computing: The Symposium on Application Accelerators in HPC (SAAHPC09, U. Illinois-Urbana, July 28-30) and the CECAM workshop “Algorithmic Re-Engineering for Modern Non-Conventional Processing Units” (Lugano, Sept. 30-Oct. 2). Several other meetings are dedicated to one type or another of specific co-processing approaches.

The most prominent examples of heterogeneous elements and efforts in HPC include the rapidly growing GPU computing community supported by NVIDIA and AMD/ATI and reconfigurable computing on field programmable gate arrays (FPGAs). C-based APIs, such as CUDA put out by NVIDIA, have opened up GPU computing to a much wider audience. Other examples include the IBM Cell chip and ASICs, such as those available from ClearSpeed, as well as soon to be released chips with built-in heterogeneous elements, such as Intel’s Larabee and AMD’s Fusion.

As more HPC practitioners are adopting these platforms today, many organizations are now taking a second look and evaluating them for their needs. Companies, university departments and government agencies want to know if heterogeneous processing is another fleeting trend or a real, sustainable technology transition driven by long-developing forces. The questions organizations are asking are: Will heterogeneous processing be an integral part of future HPC? Is it here to stay? To attempt an answer it’s useful to consider the recent past of HPC that has been characterized by a move to computing on large clusters of commodity chips.

Recent Trends in HPC

The share of the TOP500 machines using x86 programmable machines progressed from negligible in 1999 to roughly 90 percent in 2009, the balance comprised mainly of IBM Power. The numbers for cluster architectures versus MPP and others show the same development. The progression toward HPC computing on large clusters of commodity computing has had many positive impacts, providing great price/performance ratios and a large pool of qualified programmers by pushing affordable and scalable technology down to the department level. While clock speed increased reliably HPC practitioners were willing to turn a blind eye to the deficiencies of commodity solutions; happy to type make on their new platforms and see a doubling of performance every two years. The party ended in 2004, however, when clock speeds began to stall and the problems of HPC commodity computing became more salient, especially the memory wall (further reading here and here) and the divergence problem.

The story of power dissipation and the saturation of CPU clock speed is by now well known in HPC. With more silicon area available and the inability to jack up clock speed further, CPU vendors did what any clever vendor would do — provide more of their key product on die. At Intel it was called “the right hand turn” and it began to show effect in the market in 2004. Before 2004 data from the TOP500 list shows that FLOP performance improved at a healthy factor of 1.8 per year with 1.4 from improved clock and 1.3 from simply having a bigger machine. Plotting machine size against time shows a clear inflection point around 2004 after which machines have mainly improved performance and kept on trend by using more and more cores for processing. The multicore transition started with two cores, is currently at four and six cores, and will soon move to eight cores and higher.

Problems with Commodity HPC

The truth though is that many — in fact, most — HPC codes don’t scale well past 16 processors at least in their current form. In a world where performance can only be improved by use of more cores this is not great news. In short, commodity trends have led to great capacity solutions but not capability systems. Seymour Cray stated it succinctly as “If you were plowing a field, which would you rather use? Two strong oxen or 1024 chickens?” Clearly one of the seminal influences on HPC and supercomputing preferred oxen to chickens, but the HPC menu appears to favor poultry at the moment.

The recent percolation in the market of heterogeneous or co-processing solutions may be viewed as a response to this capacity/capability gap and the opportunity to use the new silicon area offered by Moore’s law for something other than CPU cores. Once programmers understand multi-level parallelism is required or they reach the scaling limits of their problem, adopting a novel platform to achieve more performance does not seem unreasonable.

The Landscape of Heterogeneous Processing

The landscape of Heterogeneous HPC can be viewed as a continuum when parallelism is plotted along the horizontal axis and core complexity along the vertical (see figure below). At the extremes, CPUs are moderately parallel (2 to 4 cores) but highly complex while FPGAs are massively parallel with hundreds of thousands of very simple processing elements. GPUs and others heterogeneous elements fall in between. It’s interesting to note that multicores are moving down and to the right in this chart with more, simpler cores; an evolutionary approach advocated by the Berkeley report on parallel computing, while FPGAs may be moving up and to the left by including more specialized hard-cores such as DSP blocks. There is no reason to believe a-priori that all applications will map optimally to a CPU architecture. Additionally, the relative complexity of writing codes for each platform needs to be considered.
Complexity Parallelism Chart

Our experience has been that development times for CPU:GPU:FPGA are roughly 1:1.25:3 for the same algorithm. This assumes a full-up parallel CPU optimization using low-level parallelism (SSE) and high-level parallelism (MPI) on the CPU, a CUDA implementation on the GPU and HDL coding for the FPGA by skilled programmers. When does it make sense to implement heterogeneous solutions? Key considerations are how well your algorithm maps to the platform and the operational use case.

Choosing Your Co-Processor

CPUs are obviously the default platform of choice with great clock speed, the ability to handle branching well and relatively easy coding. If your algorithm has a lot of branching and can’t be cast in a streaming or SIMD type formulation, CPUs are your best choice. If your algorithm is a floating point SIMD type problem that can be divided up into many independent threads doing the same operations on different data, GPUs may be a good choice. GPU programming is slightly more complicated than the full-up CPU optimization. It sometimes requires recasting the problem and the cache, or shared memory must be manually managed to achieve performance. If your problem is mainly integer or fixed point, can be cast into a streaming form, has non-traditional data representations and is spatially parallel, that is, able to be written as many independent calculation pipes, FPGAs may be an excellent choice.

Another consideration is the operational mode of your application. Is it under constant development or does development proceed for a time with long operational periods that follow in which the code is essentially run 24/7 in production mode? The latter situation justifies the cost required to port code to a heterogeneous platform and invest in the required hardware since it will be balanced by higher performance and lower operational power consumption per flop.

The Need for Speed

There are a few ways that high performance is actually achieved and they are nicely and symmetrically summarized by both space and time considerations. (This is particularly satisfying for a physicist.) Performance is achieved temporally by 1) operating on data faster with a higher clock speed and 2) implementing temporal parallelism (deep pipelines) for concurrence in time; and spatially by 1) moving data faster and 2) implementing spatial parallelism for concurrence in space (multiple parallel threads). Heterogeneous platforms differ by their relative strengths and weaknesses in one or more of these areas.


Seen in the context of the decided move to on-chip parallelism and the limits of computing on large clusters of commodity chips, heterogeneous co-processing fills a market gap that is not soon to disappear. Developers today are confronted with multi-level parallelism that spans the domain, process, thread and even the bit level in their traditional CPU-based systems. Confronted with this complexity and the requirements for better performance, they are considering alternate uses of the silicon in non-traditional platforms — GPUs, FPGAs and ASICs — to achieve their requirements.

About the Author
Dr. Vincent NatoliDr. Natoli is the president and founder of Stone Ridge Technology. He is a computational physicist with 20 years experience in the field of high performance computing. He worked as a technical director at High Performance Technologies (HPTi) and before that for 10 years as a senior physicist at ExxonMobil Corporation, at their Corporate Research Lab in Clinton, New Jersey, and in the Upstream Research Center in Houston, Texas. Dr. Natoli holds Bachelor’s and Master’s degrees from MIT, a PhD in Physics from the University of Illinois Urbana-Champaign, and a Masters in Technology Management from the University of Pennsylvania and the Wharton School. Stone Ridge Technology is a professional services firm focused on authoring, profiling, optimizing and porting high performance technical codes to multicore CPUs, GPUs, and FPGAs.

Dr. Natoli can be reached at vnatoli@stoneridgetechnology.com.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Deep Learning at 15 PFlops Enables Training for Extreme Weather Identification at Scale

March 19, 2018

Petaflop per second deep learning training performance on the NERSC (National Energy Research Scientific Computing Center) Cori supercomputer has given climate scientists the ability to use machine learning to identify e Read more…

By Rob Farber

Mellanox Reacts to Activist Investor Pressures in Letter to Shareholders

March 16, 2018

Activist investor Starboard Value has been exerting pressure on Mellanox Technologies to increase its returns. In response, the high-performance networking company on Monday, March 12, published a letter to shareholders outlining its proposal for a May 2018 extraordinary general meeting (EGM) of shareholders and highlighting its long-term growth strategy and focus on operating margin improvement. Read more…

By Staff

Quantum Computing vs. Our ‘Caveman Newtonian Brain’: Why Quantum Is So Hard

March 15, 2018

Quantum is coming. Maybe not today, maybe not tomorrow, but soon enough. Within 10 to 12 years, we’re told, special-purpose quantum systems will enter the commercial realm. Assuming this happens, we can also assume that quantum will, over extended time, become increasingly general purpose as it delivers mind-blowing power. Read more…

By Doug Black

HPE Extreme Performance Solutions

Achieve Optimal Performance at Scale with High Performance Fabrics for HPC

High Performance Computing (HPC) is unlocking a new era of speed and productivity to fuel business transformation. Rapid advancements in HPC capabilities are helping organizations operate faster and more effectively than ever, but in today’s fast-paced marketplace, a new generation of technologies is required to reach greater scalability and cost-efficiency. Read more…

How the Cloud Is Falling Short for HPC

March 15, 2018

The last couple of years have seen cloud computing gradually build some legitimacy within the HPC world, but still the HPC industry lies far behind enterprise IT in its willingness to outsource computational power. The m Read more…

By Chris Downing

Deep Learning at 15 PFlops Enables Training for Extreme Weather Identification at Scale

March 19, 2018

Petaflop per second deep learning training performance on the NERSC (National Energy Research Scientific Computing Center) Cori supercomputer has given climate Read more…

By Rob Farber

How the Cloud Is Falling Short for HPC

March 15, 2018

The last couple of years have seen cloud computing gradually build some legitimacy within the HPC world, but still the HPC industry lies far behind enterprise I Read more…

By Chris Downing

Stephen Hawking, Legendary Scientist, Dies at 76

March 14, 2018

Stephen Hawking passed away at his home in Cambridge, England, in the early morning of March 14; he was 76. Born on January 8, 1942, Hawking was an English theo Read more…

By Tiffany Trader

Hyperion Tackles Elusive Quantum Computing Landscape

March 13, 2018

Quantum computing - exciting and off-putting all at once - is a kaleidoscope of technology and market questions whose shapes and positions are far from settled. Read more…

By John Russell

Part Two: Navigating Life Sciences Choppy HPC Waters in 2018

March 8, 2018

2017 was not necessarily the best year to build a large HPC system for life sciences say Ari Berman, VP and GM of consulting services, and Aaron Gardner, direct Read more…

By John Russell

Google Chases Quantum Supremacy with 72-Qubit Processor

March 7, 2018

Google pulled ahead of the pack this week in the race toward "quantum supremacy," with the introduction of a new 72-qubit quantum processor called Bristlecone. Read more…

By Tiffany Trader

SciNet Launches Niagara, Canada’s Fastest Supercomputer

March 5, 2018

SciNet and the University of Toronto today unveiled "Niagara," Canada's most-powerful supercomputer, comprising 1,500 dense Lenovo ThinkSystem SD530 high-perfor Read more…

By Tiffany Trader

Part One: Deep Dive into 2018 Trends in Life Sciences HPC

March 1, 2018

Life sciences is an interesting lens through which to see HPC. It is perhaps not an obvious choice, given life sciences’ relative newness as a heavy user of H Read more…

By John Russell

Inventor Claims to Have Solved Floating Point Error Problem

January 17, 2018

"The decades-old floating point error problem has been solved," proclaims a press release from inventor Alan Jorgensen. The computer scientist has filed for and Read more…

By Tiffany Trader

Japan Unveils Quantum Neural Network

November 22, 2017

The U.S. and China are leading the race toward productive quantum computing, but it's early enough that ultimate leadership is still something of an open questi Read more…

By Tiffany Trader

Researchers Measure Impact of ‘Meltdown’ and ‘Spectre’ Patches on HPC Workloads

January 17, 2018

Computer scientists from the Center for Computational Research, State University of New York (SUNY), University at Buffalo have examined the effect of Meltdown Read more…

By Tiffany Trader

IBM Begins Power9 Rollout with Backing from DOE, Google

December 6, 2017

After over a year of buildup, IBM is unveiling its first Power9 system based on the same architecture as the Department of Energy CORAL supercomputers, Summit a Read more…

By Tiffany Trader

Fast Forward: Five HPC Predictions for 2018

December 21, 2017

What’s on your list of high (and low) lights for 2017? Volta 100’s arrival on the heels of the P100? Appearance, albeit late in the year, of IBM’s Power9? Read more…

By John Russell

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Russian Nuclear Engineers Caught Cryptomining on Lab Supercomputer

February 12, 2018

Nuclear scientists working at the All-Russian Research Institute of Experimental Physics (RFNC-VNIIEF) have been arrested for using lab supercomputing resources to mine crypto-currency, according to a report in Russia’s Interfax News Agency. Read more…

By Tiffany Trader

Chip Flaws ‘Meltdown’ and ‘Spectre’ Loom Large

January 4, 2018

The HPC and wider tech community have been abuzz this week over the discovery of critical design flaws that impact virtually all contemporary microprocessors. T Read more…

By Tiffany Trader

Leading Solution Providers

GlobalFoundries, Ayar Labs Team Up to Commercialize Optical I/O

December 4, 2017

GlobalFoundries (GF) and Ayar Labs, a startup focused on using light, instead of electricity, to transfer data between chips, today announced they've entered in Read more…

By Tiffany Trader

How Meltdown and Spectre Patches Will Affect HPC Workloads

January 10, 2018

There have been claims that the fixes for the Meltdown and Spectre security vulnerabilities, named the KPTI (aka KAISER) patches, are going to affect applicatio Read more…

By Rosemary Francis

Perspective: What Really Happened at SC17?

November 22, 2017

SC is over. Now comes the myriad of follow-ups. Inboxes are filled with templated emails from vendors and other exhibitors hoping to win a place in the post-SC thinking of booth visitors. Attendees of tutorials, workshops and other technical sessions will be inundated with requests for feedback. Read more…

By Andrew Jones

V100 Good but not Great on Select Deep Learning Aps, Says Xcelerit

November 27, 2017

Wringing optimum performance from hardware to accelerate deep learning applications is a challenge that often depends on the specific application in use. A benc Read more…

By John Russell

Lenovo Unveils Warm Water Cooled ThinkSystem SD650 in Rampup to LRZ Install

February 22, 2018

This week Lenovo took the wraps off the ThinkSystem SD650 high-density server with third-generation direct water cooling technology developed in tandem with par Read more…

By Tiffany Trader

AMD Wins Another: Baidu to Deploy EPYC on Single Socket Servers

December 13, 2017

When AMD introduced its EPYC chip line in June, the company said a portion of the line was specifically designed to re-invigorate a single socket segment in wha Read more…

By John Russell

World Record: Quantum Computer with 46 Qubits Simulated

December 18, 2017

Scientists from the Jülich Supercomputing Centre have set a new world record. Together with researchers from Wuhan University and the University of Groningen, Read more…

New Blueprint for Converging HPC, Big Data

January 18, 2018

After five annual workshops on Big Data and Extreme-Scale Computing (BDEC), a group of international HPC heavyweights including Jack Dongarra (University of Te Read more…

By John Russell

  • arrow
  • Click Here for More Headlines
  • arrow
Share This