Solace Systems Sets the Pace in the Race to Zero Latency

By Michael Feldman

September 14, 2009

In the algorithmic trading business, speed is literally money. An extra microsecond of latency between the market feed and the trading application could be worth a million dollars to a large investment bank or hedge fund. The annual take of algorithmic trading in the US is estimated in the billions of dollars per year — $8 billion according Tabb Group, a research and advisory firm for the financial industry.

That’s why companies that offer the fastest market messaging platforms are getting a lot of attention these days. In financial applications, messaging filters and massages the data, and as such, is the critical layer between the market data feed, or feed handler, and the trading application. For example, messaging middleware is the software that makes the decision to send MSFT messages to a subscriber that is looking to buy or sell Microsoft stock. But getting that information to the subscriber as quickly as possible is what determines how much of an advantage the customer has.

The lucrative messaging business has attracted a number of companies, including TIBCO Software, 29West, IBM, RTI, Tervela, NYSE Technologies, and Solace Systems. Of these, Solace has been one of the most aggressive in attacking the latency issue. The company’s big claim to fame is its hardware approach to message acceleration. Traditional messaging is accomplished via software running on servers, but Solace has developed what they call a message (or content) router. It’s implemented as an appliance that provides the message processing using FPGAs, network processors, and other off-the-shelf ASICs. The company’s Unified Messaging Platform API provides client applications access to the functionality.

According to Larry Neumann, Solace’s senior vice president of marketing and alliances, the hardware-based message router is analogous to what IP routers did for Internet, namely to commoditize software functionality into the network. The advantage, he says, is that the hardware approach gives a 10x performance boost — in some cases, 100x — compared to software-based messaging, mainly by eliminating all the context switching between the OS and the application. Also, FPGAs and ASICs just generally outperform CPUs for these kinds of high throughput workloads.

“Being a newer entrant into the market, if we were 20 percent faster, it would be very hard to displace the incumbent,” says Neumann. “But if you’re 10 times faster, they’ll take a good hard look at you; if you’re 100 times faster, it becomes pretty easy.”

The hardware is not identical for all use cases. Solace offers six different function-specific “blades” or cards that can be included in a configuration, and not all of them necessarily apply to financial market applications (Solace’s message platform offerings are applicable across a variety of application areas outside financial services, such as real-time billing systems, IPTV, mobile content distribution, and even geospatial applications like emergency alerts, proximity marketing, and social networking). For algorithmic trading, the minimum configuration is the network acceleration blade and the topic routing blade.

TIBCO Software and Tervela also offer hardware-based messaging appliances. In TIBCO’s case, the company is actually employing Solace blades, which are used to implement TIBCO’s Rendezvous messaging software in firmware. Tervela’s version is its own TMX Message Switch, which also uses a combination of ASICs and FPGAs to implement messaging middleware.

In all cases, the hardware-based appliances promise at least an order of magnitude boost in performance compared to software solutions. This allows the financial customers to replace many servers with a single appliance, reducing the datacenter footprint, along with the attendant power and cooling. Latency within the appliance is predictably low, but the end-to-end latency is still dependent upon the other pieces of the market trading system: the feed handler and the algorithmic engine on the server. Because of the separate devices and the network hops between them, the best-case latency is in the tens of microseconds.

The next logical step is to integrate the components into a single system in order to avoid all the network latency and intermediate memory copies. And that’s what Solace Systems has done. Announced on Monday at the High Performance Computing on Wall Street conference in New York, Solace has demonstrated sub-microsecond latencies by adding support for inter-process communications (IPC) via shared memory. Using Solace’s latest Unified Messaging Platform API, developers will be able to fold the ticker feed function, the messaging platform, and the algorithmic engine into the same application, and use shared memory IPC as the data transport.

Such applications do not rely on special hardware appliances. All you need is a standard multicore x86 server, preferably sitting in a colocation facility right next to the exchange. With quad-core chips now the norm, and eight-core chips (and greater) on the horizon, single servers are becoming powerful enough to handle these integrated trading applications. Solace ran tests with a million 100-byte messages per second, achieving an average latency of less than 700 nanoseconds using a single Intel Xeon “Harpertown” 5400 processor.

To put that in perspective, currently the largest market feed is delivered by the Options Price Reporting Authority (OPRA), which coincidentally tops out at about a million messages per second. However, those numbers are projected to rise, and as they do, latency tends to rise with it. Fortunately, core counts are increasing as well. Intel’s eight-core Nehalem EX processor is expected to be launched in early 2010, essentially doubling the processing power of the quad-core generation.

In fact, Solace CTO Shawn McAllister believes the Nehalem processors, in general, with their larger caches and better memory bandwidth, should deliver even lower latencies than they demonstrated with their Harpertown tests. He says for best results you want to keep each application on the same processor, and nail individual application components (like the feed handler and algo engine) to specific cores. That way, application data can be shared between the cores in the Level 2 cache, reducing latency even further.

Not all the applications that make up an automated trading suite can be run in a single server, however. There are risk management systems, order executions systems, and back-end settlement systems, among others, that can’t all be shoe-horned onto a single motherboard. The idea, of course, would be to put the most pathologically latency-sensitive trading applications in the server, and spread the rest out across the datacenter using the more traditional feed handlers, message platforms and servers. McAllister says one of the advantages of their model is that their common API allows developers to deploy the same code in a networked environment as in a shared memory one, since the middleware takes care of the data transport underneath the programmer interface.

Solace is not the only vendor to have thought to implement a messaging system using IPC on shared memory. In February, 29West introduced a similar IPC transport offering, claiming end-to-end latencies in the 3 to 5 microsecond range. But with Solace breaking the 1 microsecond barrier, McAllister thinks they’ve got a game changer — at least for the time being. Considering there is so much money at stake in algorithmic trading, the race toward zero latency is far from over.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

DNA Data Storage Innovation Reduces Write Times, Boosts Density

September 20, 2019

Storing digital data inside of DNA has been an idea since the 1960s, and recent developments have addressed some of the obstacles facing its scaled implementation. Now, researchers at the Technion-Israel Institute of Technology and the Interdisciplinary Center Herzliya have crossed another major milestone by using new techniques to store 10 petabytes of data in one gram of DNA. Read more…

By Oliver Peckham

IBM Opens Quantum Computing Center; Announces 53-Qubit Machine

September 19, 2019

Gauging progress in quantum computing is a tricky thing. IBM yesterday announced the opening of the IBM Quantum Computing Center in New York, with five 20-qubit systems up and running and a 53-qubit system expected to go Read more…

By John Russell

Kubernetes, Containers and HPC

September 19, 2019

Software containers and Kubernetes are important tools for building, deploying, running and managing modern enterprise applications at scale and delivering enterprise software faster and more reliably to the end user — while using resources more efficiently and reducing costs. Read more…

By Daniel Gruber,Burak Yenier and Wolfgang Gentzsch, UberCloud

AWS Solution Channel

A Guide to Discovering the Best AWS Instances and Configurations for Your HPC Workload

The flexibility and heterogeneity of HPC cloud services provide a welcome contrast to the constraints of on-premises HPC. Every HPC configuration is potentially accessible to any given workload in a well-resourced cloud HPC deployment, with vast scalability to spin up as much compute as that workload demands in any given moment. Read more…

HPE Extreme Performance Solutions

Intel FPGAs: More Than Just an Accelerator Card

FPGA (Field Programmable Gate Array) acceleration cards are not new, as they’ve been commercially available since 1984. Typically, the emphasis around FPGAs has centered on the fact that they’re programmable accelerators, and that they can truly offer workload specific hardware acceleration solutions without requiring custom silicon. Read more…

IBM Accelerated Insights

Rumors of My Death Are Still Exaggerated: The Mainframe

[Connect with Spectrum users and learn new skills in the IBM Spectrum LSF User Community.]

As of 2017, 92 of the world’s top 100 banks used mainframes. Read more…

The European Processor Initiative’s Ambitious Vision of the Future

September 19, 2019

With the EuroHPC program well underway, much of the European Union’s ambition to be a leader in the exascale era rests with the European Processor Initiative (EPI). The project – which has a budget of roughly €160 Read more…

By Oliver Peckham

IBM Opens Quantum Computing Center; Announces 53-Qubit Machine

September 19, 2019

Gauging progress in quantum computing is a tricky thing. IBM yesterday announced the opening of the IBM Quantum Computing Center in New York, with five 20-qubit Read more…

By John Russell

Kubernetes, Containers and HPC

September 19, 2019

Software containers and Kubernetes are important tools for building, deploying, running and managing modern enterprise applications at scale and delivering enterprise software faster and more reliably to the end user — while using resources more efficiently and reducing costs. Read more…

By Daniel Gruber,Burak Yenier and Wolfgang Gentzsch, UberCloud

The European Processor Initiative’s Ambitious Vision of the Future

September 19, 2019

With the EuroHPC program well underway, much of the European Union’s ambition to be a leader in the exascale era rests with the European Processor Initiative Read more…

By Oliver Peckham

When in Rome: AMD Announces New Epyc CPU for HPC, Server and Cloud Wins

September 18, 2019

Where else but Rome could AMD hold the official Europe launch party for its second generation of Epyc microprocessors, codenamed Rome. Today, AMD did just that announcing key server wins, important cloud provider wins... Read more…

By John Russell

Dell’s AMD-Powered Server Line Targets High-End Jobs

September 17, 2019

Dell Technologies rolled out five new servers this week based on AMD’s latest Epyc processor that are geared toward data-driven workloads running on increasin Read more…

By George Leopold

Cerebras to Supply DOE with Wafer-Scale AI Supercomputing Technology

September 17, 2019

Cerebras Systems, which debuted its wafer-scale AI silicon at Hot Chips last month, has entered into a multi-year partnership with Argonne National Laboratory and Lawrence Livermore National Laboratory as part of a larger collaboration with the U.S. Department of Energy... Read more…

By Tiffany Trader

IDAS: ‘Automagic’ HPC With Training Wheels

September 12, 2019

High-performance computing (HPC) for research is notorious for having steep barriers to entry. For this reason, high-tech disciplines were early adopters, have Read more…

By Elizabeth Leake

Univa Brings Cloud Automation to Slurm Users with Navops Launch 2.0

September 11, 2019

Univa, the company behind Grid Engine, announced today its HPC cloud-automation platform NavOps Launch will support the popular open-source workload scheduler Slurm. With the release of NavOps Launch 2.0, “Slurm users will have access to the same cloud automation capabilities... Read more…

By Tiffany Trader

High Performance (Potato) Chips

May 5, 2006

In this article, we focus on how Procter & Gamble is using high performance computing to create some common, everyday supermarket products. Tom Lange, a 27-year veteran of the company, tells us how P&G models products, processes and production systems for the betterment of consumer package goods. Read more…

By Michael Feldman

Supercomputer-Powered AI Tackles a Key Fusion Energy Challenge

August 7, 2019

Fusion energy is the Holy Grail of the energy world: low-radioactivity, low-waste, zero-carbon, high-output nuclear power that can run on hydrogen or lithium. T Read more…

By Oliver Peckham

AMD Verifies Its Largest 7nm Chip Design in Ten Hours

June 5, 2019

AMD announced last week that its engineers had successfully executed the first physical verification of its largest 7nm chip design – in just ten hours. The AMD Radeon Instinct Vega20 – which boasts 13.2 billion transistors – was tested using a TSMC-certified Calibre nmDRC software platform from Mentor. Read more…

By Oliver Peckham

TSMC and Samsung Moving to 5nm; Whither Moore’s Law?

June 12, 2019

With reports that Taiwan Semiconductor Manufacturing Co. (TMSC) and Samsung are moving quickly to 5nm manufacturing, it’s a good time to again ponder whither goes the venerable Moore’s law. Shrinking feature size has of course been the primary hallmark of achieving Moore’s law... Read more…

By John Russell

DARPA Looks to Propel Parallelism

September 4, 2019

As Moore’s law runs out of steam, new programming approaches are being pursued with the goal of greater hardware performance with less coding. The Defense Advanced Projects Research Agency is launching a new programming effort aimed at leveraging the benefits of massive distributed parallelism with less sweat. Read more…

By George Leopold

Cray Wins NNSA-Livermore ‘El Capitan’ Exascale Contract

August 13, 2019

Cray has won the bid to build the first exascale supercomputer for the National Nuclear Security Administration (NNSA) and Lawrence Livermore National Laborator Read more…

By Tiffany Trader

AMD Launches Epyc Rome, First 7nm CPU

August 8, 2019

From a gala event at the Palace of Fine Arts in San Francisco yesterday (Aug. 7), AMD launched its second-generation Epyc Rome x86 chips, based on its 7nm proce Read more…

By Tiffany Trader

Ayar Labs to Demo Photonics Chiplet in FPGA Package at Hot Chips

August 19, 2019

Silicon startup Ayar Labs continues to gain momentum with its DARPA-backed optical chiplet technology that puts advanced electronics and optics on the same chip Read more…

By Tiffany Trader

Leading Solution Providers

ISC 2019 Virtual Booth Video Tour

CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
GOOGLE
GOOGLE
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
VERNE GLOBAL
VERNE GLOBAL

Nvidia Embraces Arm, Declares Intent to Accelerate All CPU Architectures

June 17, 2019

As the Top500 list was being announced at ISC in Frankfurt today with an upgraded petascale Arm supercomputer in the top third of the list, Nvidia announced its Read more…

By Tiffany Trader

Top500 Purely Petaflops; US Maintains Performance Lead

June 17, 2019

With the kick-off of the International Supercomputing Conference (ISC) in Frankfurt this morning, the 53rd Top500 list made its debut, and this one's for petafl Read more…

By Tiffany Trader

A Behind-the-Scenes Look at the Hardware That Powered the Black Hole Image

June 24, 2019

Two months ago, the first-ever image of a black hole took the internet by storm. A team of scientists took years to produce and verify the striking image – an Read more…

By Oliver Peckham

Chinese Company Sugon Placed on US ‘Entity List’ After Strong Showing at International Supercomputing Conference

June 26, 2019

After more than a decade of advancing its supercomputing prowess, operating the world’s most powerful supercomputer from June 2013 to June 2018, China is keep Read more…

By Tiffany Trader

Qualcomm Invests in RISC-V Startup SiFive

June 7, 2019

Investors are zeroing in on the open standard RISC-V instruction set architecture and the processor intellectual property being developed by a batch of high-flying chip startups. Last fall, Esperanto Technologies announced a $58 million funding round. Read more…

By George Leopold

Intel Confirms Retreat on Omni-Path

August 1, 2019

Intel Corp.’s plans to make a big splash in the network fabric market for linking HPC and other workloads has apparently belly-flopped. The chipmaker confirmed to us the outlines of an earlier report by the website CRN that it has jettisoned plans for a second-generation version of its Omni-Path interconnect... Read more…

By Staff report

Intel Debuts Pohoiki Beach, Its 8M Neuron Neuromorphic Development System

July 17, 2019

Neuromorphic computing has received less fanfare of late than quantum computing whose mystery has captured public attention and which seems to have generated mo Read more…

By John Russell

Rise of NIH’s Biowulf Mirrors the Rise of Computational Biology

July 29, 2019

The story of NIH’s supercomputer Biowulf is fascinating, important, and in many ways representative of the transformation of life sciences and biomedical res Read more…

By John Russell

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This