Cray XT5m Midrange Supercomputer Builds Market Momentum

By Nicole Hemsoth

September 28, 2009

In March 2009, Cray announced the Cray XT5m system, a compatible midrange extension of the high-end Cray XT5 product line that was first to break the sustained petaflop performance barrier on real-world applications. HPCwire asked Barry Bolding, Cray’s vice president of scalable systems, for an update on the midrange product.

Cray XT5HPCwire: How is the Cray XT5m midrange supercomputer doing in the market place?

Bolding: We disclosed one customer name with the March announcement, the High Performance Computing Center Stuttgart, where it’s being used for automotive, academic and public sector work. We have also publically announced a second customer, the Finnish Meteorological Institute (FMI) in the production weather forecasting segment. The Cray XT5m has been meeting our sales goals since then. Granted, our expectations for the first six months were fairly modest because the midrange is a new space for us and we viewed this as a learning period. The good news is that we have validated that the XT5m can be a leader in the mid-range. We have won customers in several of our key target segments and our pricing is very competitive in this price sensitive space so we expect higher volumes going forward. Today we have a large number of bids outstanding in academia, automotive, aerospace, pharma and weather forecasting, as well as in government and R&D labs.

HPCwire: Why did Cray decide to develop this product?

Bolding: There were several reasons. We were consistently running into procurements that were in the midrange and needed a more price-competitive system for that space, which we view as a growth area for us. According to IDC, Cray is the current global market share leader for HPC systems priced at $3 million and up, but we have a very small presence in the midrange segment. Many of the characteristics of our largest machines are applicable in the midrange, but to succeed in this space we needed to develop a price-competitive product, turn around procurements faster, and provide a wider range of ISV applications. ISV applications are also important at the high end, but industry typically buys midrange systems and relies more heavily on third-party apps than government and academia do. The Cray XT5m is the initial product on our midrange roadmap.

HPCwire: Why would someone buy a Cray XT5m system instead of a same-size cluster? What are the key differences?

Bolding: Primarily they get Cray’s more capable SeaStar interconnect and interconnect roadmap. The Cray SeaStar has proven itself over the past several years as the industry-leading interconnect for MPI scalability.  With the Cray SeaStar interconnect, the Cray XT5m handles complex messaging traffic very efficiently.  You also get the entire Cray software stack that has been scaled and validated up to the petascale performance level, plus the network roadmap driving toward global addressability and high-performance UPC and Co-Array Fortran, along with MPI of course. So, Cray XT5m customers are buying into a broader portfolio than just a typical midrange system.  They’re buying into the demonstrated petascale scalability of the XT5 architecture. To achieve true scaling today, even at midrange size, one needs a full portfolio of network, software and infrastructure support, which Cray provides in the XT5m. And with multicore processors becoming prevalent, users will soon be facing the need to scale substantially higher even with midrange systems, especially starting in 2010.  Our midrange systems are designed to benefit from Cray’s high-end system development and this will continue. For example, the Cray XT5m line provides the same TCO benefits to our midrange customers as our largest supercomputer customers enjoy with the ECOphlex cooling technology we developed for petascale systems.

HPCwire: Assuming the Cray XT5m has a more capable network and memory subsystem than a standard cluster, with better bandwidth and latency characteristics, wouldn’t it be able to tackle a broader range of applications efficiently?

Bolding: The Cray XT5m today is a midrange industry leader from a network bandwidth and latency perspective. This gives users an important advantage over commodity InfiniBand networks and allows the Cray XT5m to handle a broader range of applications efficiently. The system is aimed at codes scaling to 256 cores and beyond, and in this range users typically see significant benefits from the overall system and software design.

HPCwire: Are customers using their Cray XT5m systems as their main HPC systems or for specific portions of their workloads?

Bolding: It varies. In production weather forecasting, we have a customer using it as their primary production system. At academic sites it varies from being primary system to one among multiple HPC systems. Some users are experimenting with the new functionalities, including the network features and the Cray software and compilers. It’s also allowing users to experiment with scalability in ways they haven’t been able to do before. So, the Cray XT5m is being used both as a development platform and a production platform.

HPCwire: Is there any customer who operates both a Cray XT5 and a Cray XT5m system?

Bolding: There are customers running applications across both Cray XT5 and Cray  XT5m systems, although they don’t have both systems in-house today.  By the end of this year, we’ll have sites that have both in their data centers.

HPCwire: The XT5m is a compatible downward extension of the Cray XT5 architecture, but uses a 2D torus interconnect instead of the XT5’s 3D torus. What’s the strategy behind this change?

Bolding: It’s a cost-saving strategy for the midrange scale. With a Cray XT5m system consisting of 1-6 cabinets, customers tend not to have applications that require the full 3D topology as much as with a larger, high-end Cray XT5. We right-sized the Cray XT5m for midrange requirements, including the interconnect, allowing us to provide a price-competitive product in this space. We’ve done extensive studies on application performance on the Cray XT5m, and there has been minimal performance impact at six cabinets and below. Above that size, you need the Cray XT5’s 3D torus to maintain scalability. For most apps in the 1-6 cabinet range, performance degradation due to the topology is less than 5 percent even for applications running across several thousand cores of a Cray XT5m.

HPCwire: If a site maxes out on their XT5m, what’s the upgrade path to a Cray XT5 system?

Bolding: It’s very simple. Today, it just involves replacing the network mezzanine card and adding more cables to transform the 2D torus into a 3D torus. We’ll make the upgrade path even simpler in the future of our midrange systems.

HPCwire: Do you expect some users to take advantage of non-MPI programming models that are available on the XT5m, such as SHMEM, UPC and Co-Array Fortran?

Bolding: We do. We port those in the software today and will be making announcements of enhancements to the hardware support for some of these features in the next 12 months. We are committed to making more innovations and remaining a leader in HPC, and this requires providing our customers with multiple, high performance programming models.

HPCwire: What is the Data Virtualization Service that comes with the XT5 and XT5m, and why is it important?

Bolding: DVS is an important part of Cray systems. DVS is a flexible virtualization layer that Cray plans use to expand our software functionality and performance . One feature of DVS is that it can allow Cray to project various file systems onto the compute nodes (which are diskless on Cray XT5 systems). This allows Cray systems to act more like a standard commodity cluster if it needs to.  We support IO and storage functionalities that we haven’t in the past. We can share file systems with high-performance file systems on platforms other than clusters. Customers such as NERSC and Oak Ridge are doing very innovative things with file systems and DVS can play a role in providing the flexibility they need.  So, DVS helps us both with compute and IO/storage.

HPCwire: Where is the Cray XT5m product line headed in the future?

Bolding: We are going to continue driving into the midrange market, which is a segment that has excellent growth opportunities for Cray. We want to build a substantial and sustainable market presence there, especially with customers focused on scalability of applications. To grow the XT5m line we need to continue to be competitive on cost while improving price/performance, network scalability,  software features and ISV availability, and we’ll be doing all those things. We’ll also be improving the processor roadmap with new technologies coming into market place. Cray’s innovation, combined with AMD’s strong roadmap is a winning combination for the next few years for the entire XT family of systems. 
HPCwire: What should we look for next?

Bolding: At SC09, we plan to talk more specifically about our future plans for the Cray XT5m product line.

For more information on how the Cray XT5m is making petaflops performance affordable, download the AMD white paper here.

 

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

AMD Wins Another: Baidu to Deploy EPYC on Single Socket Servers

December 13, 2017

When AMD introduced its EPYC chip line in June, the company said a portion of the line was specifically designed to re-invigorate a single socket segment in what has become an overwhelmingly two-socket landscape in the d Read more…

By John Russell

Microsoft Wants to Speed Quantum Development

December 12, 2017

Quantum computing continues to make headlines in what remains of 2017 as tech giants jockey to establish a pole position in the race toward commercialization of quantum. This week, Microsoft took the next step in advanci Read more…

By Tiffany Trader

ESnet Now Moving More Than 1 Petabyte/wk

December 12, 2017

Optimizing ESnet (Energy Sciences Network), the world's fastest network for science, is an ongoing process. Recently a two-year collaboration by ESnet users – the Petascale DTN Project – achieved its ambitious goal t Read more…

HPE Extreme Performance Solutions

Explore the Origins of Space with COSMOS and Memory-Driven Computing

From the formation of black holes to the origins of space, data is the key to unlocking the secrets of the early universe. Read more…

HPC-as-a-Service Finds Toehold in Iceland

December 11, 2017

While high-demand workloads (e.g., bitcoin mining) can overheat data center cooling capabilities, at least one data center infrastructure provider has announced an HPC-as-a-service offering that features 100 percent fre Read more…

By Doug Black

AMD Wins Another: Baidu to Deploy EPYC on Single Socket Servers

December 13, 2017

When AMD introduced its EPYC chip line in June, the company said a portion of the line was specifically designed to re-invigorate a single socket segment in wha Read more…

By John Russell

Microsoft Wants to Speed Quantum Development

December 12, 2017

Quantum computing continues to make headlines in what remains of 2017 as tech giants jockey to establish a pole position in the race toward commercialization of Read more…

By Tiffany Trader

HPC Iron, Soft, Data, People – It Takes an Ecosystem!

December 11, 2017

Cutting edge advanced computing hardware (aka big iron) does not stand by itself. These computers are the pinnacle of a myriad of technologies that must be care Read more…

By Alex R. Larzelere

IBM Begins Power9 Rollout with Backing from DOE, Google

December 6, 2017

After over a year of buildup, IBM is unveiling its first Power9 system based on the same architecture as the Department of Energy CORAL supercomputers, Summit a Read more…

By Tiffany Trader

Microsoft Spins Cycle Computing into Core Azure Product

December 5, 2017

Last August, cloud giant Microsoft acquired HPC cloud orchestration pioneer Cycle Computing. Since then the focus has been on integrating Cycle’s organization Read more…

By John Russell

GlobalFoundries, Ayar Labs Team Up to Commercialize Optical I/O

December 4, 2017

GlobalFoundries (GF) and Ayar Labs, a startup focused on using light, instead of electricity, to transfer data between chips, today announced they've entered in Read more…

By Tiffany Trader

HPE In-Memory Platform Comes to COSMOS

November 30, 2017

Hewlett Packard Enterprise is on a mission to accelerate space research. In August, it sent the first commercial-off-the-shelf HPC system into space for testing Read more…

By Tiffany Trader

SC17 Cluster Competition: Who Won and Why? Results Analyzed and Over-Analyzed

November 28, 2017

Everyone by now knows that Nanyang Technological University of Singapore (NTU) took home the highest LINPACK Award and the Overall Championship from the recently concluded SC17 Student Cluster Competition. We also already know how the teams did in the Highest LINPACK and Highest HPCG competitions, with Nanyang grabbing bragging rights for both benchmarks. Read more…

By Dan Olds

US Coalesces Plans for First Exascale Supercomputer: Aurora in 2021

September 27, 2017

At the Advanced Scientific Computing Advisory Committee (ASCAC) meeting, in Arlington, Va., yesterday (Sept. 26), it was revealed that the "Aurora" supercompute Read more…

By Tiffany Trader

NERSC Scales Scientific Deep Learning to 15 Petaflops

August 28, 2017

A collaborative effort between Intel, NERSC and Stanford has delivered the first 15-petaflops deep learning software running on HPC platforms and is, according Read more…

By Rob Farber

Oracle Layoffs Reportedly Hit SPARC and Solaris Hard

September 7, 2017

Oracle’s latest layoffs have many wondering if this is the end of the line for the SPARC processor and Solaris OS development. As reported by multiple sources Read more…

By John Russell

AMD Showcases Growing Portfolio of EPYC and Radeon-based Systems at SC17

November 13, 2017

AMD’s charge back into HPC and the datacenter is on full display at SC17. Having launched the EPYC processor line in June along with its MI25 GPU the focus he Read more…

By John Russell

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Japan Unveils Quantum Neural Network

November 22, 2017

The U.S. and China are leading the race toward productive quantum computing, but it's early enough that ultimate leadership is still something of an open questi Read more…

By Tiffany Trader

GlobalFoundries Puts Wind in AMD’s Sails with 12nm FinFET

September 24, 2017

From its annual tech conference last week (Sept. 20), where GlobalFoundries welcomed more than 600 semiconductor professionals (reaching the Santa Clara venue Read more…

By Tiffany Trader

Google Releases Deeplearn.js to Further Democratize Machine Learning

August 17, 2017

Spreading the use of machine learning tools is one of the goals of Google’s PAIR (People + AI Research) initiative, which was introduced in early July. Last w Read more…

By John Russell

Leading Solution Providers

Amazon Debuts New AMD-based GPU Instances for Graphics Acceleration

September 12, 2017

Last week Amazon Web Services (AWS) streaming service, AppStream 2.0, introduced a new GPU instance called Graphics Design intended to accelerate graphics. The Read more…

By John Russell

Perspective: What Really Happened at SC17?

November 22, 2017

SC is over. Now comes the myriad of follow-ups. Inboxes are filled with templated emails from vendors and other exhibitors hoping to win a place in the post-SC thinking of booth visitors. Attendees of tutorials, workshops and other technical sessions will be inundated with requests for feedback. Read more…

By Andrew Jones

EU Funds 20 Million Euro ARM+FPGA Exascale Project

September 7, 2017

At the Barcelona Supercomputer Centre on Wednesday (Sept. 6), 16 partners gathered to launch the EuroEXA project, which invests €20 million over three-and-a-half years into exascale-focused research and development. Led by the Horizon 2020 program, EuroEXA picks up the banner of a triad of partner projects — ExaNeSt, EcoScale and ExaNoDe — building on their work... Read more…

By Tiffany Trader

Delays, Smoke, Records & Markets – A Candid Conversation with Cray CEO Peter Ungaro

October 5, 2017

Earlier this month, Tom Tabor, publisher of HPCwire and I had a very personal conversation with Cray CEO Peter Ungaro. Cray has been on something of a Cinderell Read more…

By Tiffany Trader & Tom Tabor

Tensors Come of Age: Why the AI Revolution Will Help HPC

November 13, 2017

Thirty years ago, parallel computing was coming of age. A bitter battle began between stalwart vector computing supporters and advocates of various approaches to parallel computing. IBM skeptic Alan Karp, reacting to announcements of nCUBE’s 1024-microprocessor system and Thinking Machines’ 65,536-element array, made a public $100 wager that no one could get a parallel speedup of over 200 on real HPC workloads. Read more…

By John Gustafson & Lenore Mullin

Flipping the Flops and Reading the Top500 Tea Leaves

November 13, 2017

The 50th edition of the Top500 list, the biannual publication of the world’s fastest supercomputers based on public Linpack benchmarking results, was released Read more…

By Tiffany Trader

IBM Begins Power9 Rollout with Backing from DOE, Google

December 6, 2017

After over a year of buildup, IBM is unveiling its first Power9 system based on the same architecture as the Department of Energy CORAL supercomputers, Summit a Read more…

By Tiffany Trader

Intel Launches Software Tools to Ease FPGA Programming

September 5, 2017

Field Programmable Gate Arrays (FPGAs) have a reputation for being difficult to program, requiring expertise in specialty languages, like Verilog or VHDL. Easin Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This