AMD Server Roadmap: Cores, Lots of Them

By Michael Feldman

December 1, 2009

Even though SC09 was something of a coming out party for GPU computing, CPUs are the foundation of high performance computing. The x86 architecture, in particular, continues to dominate the space, with Intel clearly owning the majority of the HPC server market. That dominance will probably remain for the foreseeable future. AMD’s server roadmap over the next couple of years may be able to blunt some of its rival’s momentum, but there are no magic bullets in the company’s arsenal.

At AMD’s Financial Analyst Day on November 11, the company laid out its 2010-2011 product roadmap across all its markets. This year the company focused a lot more on its client-side products, with quite a bit of emphasis devoted to its CPU-GPU “Fusion” chip strategy (which I’ll get to in a moment). For the near term, AMD’s Opteron processors will be carrying the HPC load.

In early 2010, the 45nm “Magny-Cours” processor family will kick off the Opteron 6000 series, using the new “Maranello” platform and G34 socket. Magny-Cours will fulfill the 2P and 4P/8P server markets and is positioned as the “performance” Opteron chip. As such, it is expected to attract the majority of HPC server adoption, although the lower-power 1P and 2P Opteron 4000 series chips may be employed in certain cases. Magny-Cours will come with 8 or 12 cores, doubling up on the previous generation’s Shanghai and Istanbul processors, respectively. Likewise, the memory channels have doubled from 2 to 4, just to keep cores and memory bandwidth in balance. Other enhancements include DDR3 memory support and an Enhanced C1 state (C1E) to reduce power consumption under partial loads.

None of this is news. AMD has been talking up Magny-Cours for awhile now. However, the company did offer some new details about “Interlagos,” the Magny-Cours sequel that’s scheduled for release in 2011. Interlagos will be on the 32nm process node and will come in 12- and 16-core flavors. But it’s more than just core addition enabled by a process shrink. Interlagos will be based on the next-generation “Bulldozer” core architecture, which turns out to be a rather unique design.

According to AMD, each Bulldozer ” module consists of two integer “cores” plus a floating point unit (FPU) that encompasses two 128-bit wide FMACs. Each core and the FPU, has its own instruction scheduler. The FPU itself can either be dedicated to one of the integer cores or shared between the two of them. On the surface it looks as if AMD scrimped on floating point execution in favor of integer execution, but until more details are revealed on how Bulldozer performs on real workloads, it’s probably best to withhold judgement.

 Apparently AMD is counting the integer cores as actual cores, so a 16-core Interlagos processor would be made up of 8 Bulldozer modules. In reality, each module appears as a single core to software, but can carry two threads in SMT fashion. It seems like AMD has needlessly confused the semantics here. It probably would have been better just to call each Bulldozer module a core, with the further explanation that dedicated hardware exists to serve two threads of control simultaneously.

While AMD is going core happy, Intel will be doing its usual tick-tock routine. The 32nm “Westmere” shrink of Nehalem is due out in 2010, with the six-core Westmere EP slated for release in the first half of the year. In 2011, the new “Sandy Bridge” microarchitecture products will show up to meet Bulldozer head on. Trying to battle Intel in the CPU arena is going to be tough for AMD. Intel is about a year ahead of its smaller rival in semiconductor process technology, and has a much larger R&D effort to drive engineering innovation.

Where AMD has the upper hand is its GPU technology, courtesy of its ATI division. That’s why the company’s big focus for the next couple of years will be to fulfill its so-called Fusion strategy of integrating CPU and GPU IP onto the same die. It’s something CPU-centric Intel and, to a lesser extent, GPU-centric NVIDIA are also pursuing, but without the benefit of strong technologies in both areas.

The idea is to create an heterogeneous chip architecture that combines the CPU’s strength in sequential processing with the GPU’s superior data parallel processing capabilities. AMD calls this new architecture an APU (for Accelerated Processing Unit). Applications that mix video, audio, and graphics into more traditional applications will be the main beneficiaries, but that happens to represent a lot of the Web-related content at the heart of computing today. “I think Fusion is going to bring the forward pass to the computing business,” gushed AMD CEO Dirk Meyer at the recent Financial Analyst Day.

Unfortunately for HPC users, for the time being all of AMD’s Fusion efforts are aimed at the client side. The first APU, called Llano, is scheduled to show up in 2011. The GPU performance of these heterogeneous chips won’t rival discrete graphics devices, since die real estate obviously has to be shared with CPU resources. So in the near term at least, AMD will continue to offer standalone GPU products for high-end graphics users and, presumably, HPC users via its FireStream products. The only suggestion that APUs might extend beyond the client space was offered on a slide of AMD’s server roadmap, which had heterogeneous computing appear after 2012.

AMD’s focus on client computing is understandable since that is where most of the growth opportunities exist, albeit at smaller margins than the server space. Even in the latter market, AMD is focusing on mainstream enterprise needs. According to them, their “performance cluster” segment represents only 5 percent of their total server market, giving them little incentive to craft specialty products for the high end. In fact, Intel is more likely to be adventuresome, inasmuch as it can leverage a greater economy of scale than its smaller competitor. The chip maker’s recent announcement of a new collaboration with NEC is an example of the way Intel is pursuing special-purpose HPC.

Despite the dominance of Intel, most HPC system vendors are expected to continue to offer Opteron-based hardware. Certainly AMD’s devotion to upgradeability has made the system vendor’s life a little easier. And in any case, no one wants to return to a single source x86 world.

Cray is sort of a special case. At SC09, the company announced the XT6 (and mid-range XT6m) supercomputer, which will incorporate the Magny-Cours processor, thus fulfilling Cray’s commitment to stick with AMD until at least 2010. Since AMD will introduce the G34-compatible Interlagos in 2011, one can assume at XT6 gear will be socket upgradeable for at least another year. Beyond that, or maybe even before the XT6 has run its course, Cray may exercise its Intel option. When the supercomputer maker brought Intel inside in 2008, certainly it had more in mind than using Xeon silicon for its deskside CX1 system. I would expect to see a high-end supercomputer line with Intel processors introduced sometime within the next couple of years.

The wild card is NVIDIA. If more high performance computing over the next couple of years begins to rely on NVIDIA GPUs (or even AMD/ATI GPUs) to drive performance, the choice of CPU is calculated differently. In this case, cost and power concerns would tend to override performance, placing Opterons on a more even playing field with their Xeon counterparts. And if AMD and NVIDIA could bring themselves to collaborate on some sort of mutually-beneficial Opteron CPU/Fermi GPU arrangement, that might present an interesting challenge to Intel’s preeminence in HPC.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

GDPR’s Impact on Scientific Research Uncertain

May 24, 2018

Amid the angst over preparations—or lack thereof—for new European Union data protections entering into force at week’s end is the equally worrisome issue of the rules’ impact on scientific research. Among the Read more…

By George Leopold

Intel Pledges First Commercial Nervana Product ‘Spring Crest’ in 2019

May 24, 2018

At its AI developer conference in San Francisco yesterday, Intel embraced a holistic approach to AI and showed off a broad AI portfolio that includes Xeon processors, Movidius technologies, FPGAs and Intel’s Nervana Neural Network Processors (NNPs), based on the technology it acquired in 2016. Read more…

By Tiffany Trader

Pattern Computer – Startup Claims Breakthrough in ‘Pattern Discovery’ Technology

May 23, 2018

If it weren’t for the heavy-hitter technology team behind start-up Pattern Computer, which emerged from stealth today in a live-streamed event from San Francisco, one would be tempted to dismiss its claims of inventing Read more…

By John Russell

HPE Extreme Performance Solutions

HPC and AI Convergence is Accelerating New Levels of Intelligence

Data analytics is the most valuable tool in the digital marketplace – so much so that organizations are employing high performance computing (HPC) capabilities to rapidly collect, share, and analyze endless streams of data. Read more…

IBM Accelerated Insights

Mastering the Big Data Challenge in Cognitive Healthcare

Patrick Chain, genomics researcher at Los Alamos National Laboratory, posed a question in a recent blog: What if a nurse could swipe a patient’s saliva and run a quick genetic test to determine if the patient’s sore throat was caused by a cold virus or a bacterial infection? Read more…

Silicon Startup Raises ‘Prodigy’ for Hyperscale/AI Workloads

May 23, 2018

There's another silicon startup coming onto the HPC/hyperscale scene with some intriguing and bold claims. Silicon Valley-based Tachyum Inc., which has been emerging from stealth over the last year and a half, is unveili Read more…

By Tiffany Trader

Intel Pledges First Commercial Nervana Product ‘Spring Crest’ in 2019

May 24, 2018

At its AI developer conference in San Francisco yesterday, Intel embraced a holistic approach to AI and showed off a broad AI portfolio that includes Xeon processors, Movidius technologies, FPGAs and Intel’s Nervana Neural Network Processors (NNPs), based on the technology it acquired in 2016. Read more…

By Tiffany Trader

Pattern Computer – Startup Claims Breakthrough in ‘Pattern Discovery’ Technology

May 23, 2018

If it weren’t for the heavy-hitter technology team behind start-up Pattern Computer, which emerged from stealth today in a live-streamed event from San Franci Read more…

By John Russell

Silicon Startup Raises ‘Prodigy’ for Hyperscale/AI Workloads

May 23, 2018

There's another silicon startup coming onto the HPC/hyperscale scene with some intriguing and bold claims. Silicon Valley-based Tachyum Inc., which has been eme Read more…

By Tiffany Trader

Japan Meteorological Agency Takes Delivery of Pair of Crays

May 21, 2018

Cray has supplied two identical Cray XC50 supercomputers to the Japan Meteorological Agency (JMA) in northwestern Tokyo. Boasting more than 18 petaflops combine Read more…

By Tiffany Trader

ASC18: Final Results Revealed & Wrapped Up

May 17, 2018

It was an exciting week at ASC18 in Nanyang, China. The student teams braved extreme heat, extremely difficult applications, and extreme competition in order to cross the cluster competition finish line. The gala awards ceremony took place on Wednesday. The auditorium was packed with student teams, various dignitaries, the media, and other interested parties. So what happened? Read more…

By Dan Olds

Spring Meetings Underscore Quantum Computing’s Rise

May 17, 2018

The month of April 2018 saw four very important and interesting meetings to discuss the state of quantum computing technologies, their potential impacts, and th Read more…

By Alex R. Larzelere

Quantum Network Hub Opens in Japan

May 17, 2018

Following on the launch of its Q Commercial quantum network last December with 12 industrial and academic partners, the official Japanese hub at Keio University is now open to facilitate the exploration of quantum applications important to science and business. The news comes a week after IBM announced that North Carolina State University was the first U.S. university to join its Q Network. Read more…

By Tiffany Trader

Democratizing HPC: OSC Releases Version 1.3 of OnDemand

May 16, 2018

Making HPC resources readily available and easier to use for scientists who may have less HPC expertise is an ongoing challenge. Open OnDemand is a project by t Read more…

By John Russell

MLPerf – Will New Machine Learning Benchmark Help Propel AI Forward?

May 2, 2018

Let the AI benchmarking wars begin. Today, a diverse group from academia and industry – Google, Baidu, Intel, AMD, Harvard, and Stanford among them – releas Read more…

By John Russell

How the Cloud Is Falling Short for HPC

March 15, 2018

The last couple of years have seen cloud computing gradually build some legitimacy within the HPC world, but still the HPC industry lies far behind enterprise I Read more…

By Chris Downing

Russian Nuclear Engineers Caught Cryptomining on Lab Supercomputer

February 12, 2018

Nuclear scientists working at the All-Russian Research Institute of Experimental Physics (RFNC-VNIIEF) have been arrested for using lab supercomputing resources to mine crypto-currency, according to a report in Russia’s Interfax News Agency. Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Deep Learning at 15 PFlops Enables Training for Extreme Weather Identification at Scale

March 19, 2018

Petaflop per second deep learning training performance on the NERSC (National Energy Research Scientific Computing Center) Cori supercomputer has given climate Read more…

By Rob Farber

AI Cloud Competition Heats Up: Google’s TPUs, Amazon Building AI Chip

February 12, 2018

Competition in the white hot AI (and public cloud) market pits Google against Amazon this week, with Google offering AI hardware on its cloud platform intended Read more…

By Doug Black

US Plans $1.8 Billion Spend on DOE Exascale Supercomputing

April 11, 2018

On Monday, the United States Department of Energy announced its intention to procure up to three exascale supercomputers at a cost of up to $1.8 billion with th Read more…

By Tiffany Trader

Lenovo Unveils Warm Water Cooled ThinkSystem SD650 in Rampup to LRZ Install

February 22, 2018

This week Lenovo took the wraps off the ThinkSystem SD650 high-density server with third-generation direct water cooling technology developed in tandem with par Read more…

By Tiffany Trader

Leading Solution Providers

SC17 Booth Video Tours Playlist

Altair @ SC17

Altair

AMD @ SC17

AMD

ASRock Rack @ SC17

ASRock Rack

CEJN @ SC17

CEJN

DDN Storage @ SC17

DDN Storage

Huawei @ SC17

Huawei

IBM @ SC17

IBM

IBM Power Systems @ SC17

IBM Power Systems

Intel @ SC17

Intel

Lenovo @ SC17

Lenovo

Mellanox Technologies @ SC17

Mellanox Technologies

Microsoft @ SC17

Microsoft

Penguin Computing @ SC17

Penguin Computing

Pure Storage @ SC17

Pure Storage

Supericro @ SC17

Supericro

Tyan @ SC17

Tyan

Univa @ SC17

Univa

Google Chases Quantum Supremacy with 72-Qubit Processor

March 7, 2018

Google pulled ahead of the pack this week in the race toward "quantum supremacy," with the introduction of a new 72-qubit quantum processor called Bristlecone. Read more…

By Tiffany Trader

CFO Steps down in Executive Shuffle at Supermicro

January 31, 2018

Supermicro yesterday announced senior management shuffling including prominent departures, the completion of an audit linked to its delayed Nasdaq filings, and Read more…

By John Russell

HPE Wins $57 Million DoD Supercomputing Contract

February 20, 2018

Hewlett Packard Enterprise (HPE) today revealed details of its massive $57 million HPC contract with the U.S. Department of Defense (DoD). The deal calls for HP Read more…

By Tiffany Trader

Deep Learning Portends ‘Sea Change’ for Oil and Gas Sector

February 1, 2018

The billowing compute and data demands that spurred the oil and gas industry to be the largest commercial users of high-performance computing are now propelling Read more…

By Tiffany Trader

Nvidia Ups Hardware Game with 16-GPU DGX-2 Server and 18-Port NVSwitch

March 27, 2018

Nvidia unveiled a raft of new products from its annual technology conference in San Jose today, and despite not offering up a new chip architecture, there were still a few surprises in store for HPC hardware aficionados. Read more…

By Tiffany Trader

Hennessy & Patterson: A New Golden Age for Computer Architecture

April 17, 2018

On Monday June 4, 2018, 2017 A.M. Turing Award Winners John L. Hennessy and David A. Patterson will deliver the Turing Lecture at the 45th International Sympo Read more…

By Staff

Part One: Deep Dive into 2018 Trends in Life Sciences HPC

March 1, 2018

Life sciences is an interesting lens through which to see HPC. It is perhaps not an obvious choice, given life sciences’ relative newness as a heavy user of H Read more…

By John Russell

Google I/O 2018: AI Everywhere; TPU 3.0 Delivers 100+ Petaflops but Requires Liquid Cooling

May 9, 2018

All things AI dominated discussion at yesterday’s opening of Google’s I/O 2018 developers meeting covering much of Google's near-term product roadmap. The e Read more…

By John Russell

  • arrow
  • Click Here for More Headlines
  • arrow
Share This