As we reported last week, researchers at HP Labs have advanced their memristor work to the point where they now believe commercial products may be in the offing in as little as three years. A memristor, or memory transistor, is the fourth fundamental circuit element that has the unique property of maintaining its state when the power is turned off. (Yes, flash memory does this too, but it uses lots of transistors and capacitors to accomplish this.) In any case, HP is touting memristors as way to build all sorts of nifty digital and analog computing gadgets.

Now this week, the University of Michigan announced that computer engineer Wei Lu has been busy building artificial synapses from memristors. In this case, Lu is exploiting the analog nature of the device to simulate synapse behavior. Potentially, this is a much more straightforward way to construct a thinking machine compared to digitally simulating a brain on a supercomputer. From the press release:

“We are building a computer in the same way that nature builds a brain,” said Lu, an assistant professor in the U-M Department of Electrical Engineering and Computer Science. “The idea is to use a completely different paradigm compared to conventional computers. The cat brain sets a realistic goal because it is much simpler than a human brain but still extremely difficult to replicate in complexity and efficiency.”

Here we go with the cat brains again. If you’ll remember, last November a research team at IBM reported it achieved “the first near real-time cortical simulation of the brain that exceeds the scale of a cat cortex and contains 1 billion spiking neurons and 10 trillion individual learning synapses.” That simulation was accomplished using the Blue Gene/P supercomputer at Lawrence Livermore, but the ultimate goal was to build a more practical version using “synaptronic” chips, phase change memory and magnetic tunnel junctions. I guess there’s more than one way to skin a cat brain.

For the near-term, HP is going to concentrate on exploiting memristors for non-volatile RAM. The researchers there believe they can offer a product with a storage density of about 20 gigabytes per square centimeter by 2013. And that product would also be more robust than one based on conventional flash-based memory. HP claims memristor memory can handle up to 1,000,000 read/write cycles before degradation, compared to flash at 100,000 cycles. Furthermore, since the technology can be scaled down to single-digit nanometer geometries, memristors should leave NAND and NOR based flash memories in the dust.

HP also discovered that memristors can serve as logic circuits, so now there’s talk of using the devices for computation. This could open the door to building processors with logic and very large memories integrated together on the same die. (The best we can do today is marry CPUs and relatively small caches.) In fact, memristor-based processors could be a dream come true for processor-in-memory (PIM) enthusiasts.

PIM has been a kind of Holy Grail for researchers looking to solve the memory wall dilemma. Getting logic and memory within kissing distance of each other on the die is the goal since that level of proximity delivers substantially greater bandwidth and lower latency for data transfers. USC’s DIVA architecture and Caltech’s MIND are some early examples of PIM designs based on conventional DRAM technology. The only rub here is that memristors are currently about 10 times slower than DRAM. But considering how far memristors have come in just a few years, the folks at HP Labs might surprise us once again.