ScaleMP Pumps Up Virtual SMP Offering

By Michael Feldman

May 26, 2010

SMP virtualization specialist ScaleMP has announced vSMP Foundation 3.0, the third generation of its virtual SMP solution for high performance computing clusters. Unlike traditional virtualization which partitions hardware resources into smaller chunks, vSMP aggregates those resources to build bigger, more powerful virtual machines. Version 3.0 of the software adds some much-needed updates, including increased scalability and additional hardware support.

Specifically, vSMP 3.0 can aggregate up to 8,192 Intel Xeon cores, i.e., 16,384 threads, and 64 TB of RAM (spread across as many as 128 cluster nodes) into a single virtual SMP. It will also handle as many as four InfiniBand HCAs per node, providing backplane connectivity of up to 160 Gbps (netting 128 Gbps) per node. The new software also folds in support for the latest server silicon from Intel, the Nehalem-EX (Xeon 7500) and Westmere-EP (Xeon 5600) processors. In addition, ScaleMP has added support for two new peripherals: the Emulex LPe12xxx (8 Gbps), Broadcom NetXtreme II 57711 (10 GigE).

The scalability boost is particularly noteworthy. Version 2.0 of vSMP supported a mere 128 cores and 4 TB of memory per VM (across 16 nodes). And connectivity was limited to just a single HCA per node. Upping the cores, memory capacity, and bandwidth is a reflection of the increasing core counts on the latest x86 silicon — up to eight cores on Nehalem-EX and six cores on Westmere-EP — but also points to anticipated demand for HPC apps that want to spread out into larger SMP-type environments.

According to Shai Fultheim, founder and president of ScaleMP, in version 2.0 they supported over 20 different dual-socket servers and a handful of 4-socket systems, “For 3.0 we put significant investment into expanding that, and specifically on the high-end building blocks,” he says.

Although he can’t name names yet, Fultheim says they’ll be supporting all the Tier 1 Nehalem-EX based systems as soon as the OEMs officially roll them out. Certified configurations for systems supporting up to 32 nodes will be generally available on June 14, but certification for up to 128 nodes won’t be ready until the end of Q3 2010.

The current vSMP user base encompasses commercial, higher education/research and government customers. All told, ScaleMP has over 150 engagements, including big names like Bloomberg, SDSC, University of Cambridge, Harvard, Naval Research Lab, NIH, and Lockheed Martin. According to Fultheim, they already have some vSMP 3.0 customers signed up for 32-node systems. One of them (in the government space) is looking to build a 48TB virtual SMP that will consist of 16 eight-socket Nehalem-EX boxes, with 3 terabytes on each node. There are also a few customers getting ready to build systems in the 40- to 50-node range.

An interesting comparison can be made with SGI’s new Altix UV system, which debuted last November. The Altix UV is a traditional hardware SMP geared for HPC, and uses SGI’s custom NUMAlink 5 interconnect and UV hub controller to glue together dual-socket Nehalem-EX blades.

The top-of-the line UV 1000 scales to 2,048 cores and 16 TB of memory for a single system image, versus 8,192 cores and 64 TB for vSMP 3.0. The memory advantage for vSMP is especially significant, inasmuch as memory footprint is more often the limiting factor (as opposed to core count) for global address space HPC codes. Backplane bandwidth is similar: 120 Gbps (15 GB/sec) for the NUMAlinked UV blades versus 128 Gbps (4 x 32 Gbps) for the vSMP version — assuming four QDR InfiniBand adapters per node.

The NUMAlink 5 network is apt to deliver better latency than InfiniBand, and SGI’s MPI Offload Engine may prove to be of particular value for message passing codes, but overall, ScaleMP appears to have built a compelling high-end SMP environment. The fact that it’s being done in software is an extra bonus, especially in the vSMP Cloud offering, which enables dynamic provisioning of virtual machines on cloud infrastructure.

The company is also using vSMP 3.0 to introduce its “VM on VM” technology, aimed at the general enterprise space rather than HPC, per se. In a nutshell, the ScaleMP software aggregates multiple x86 nodes as before, but instead of placing Linux on the virtual SMP, a hypervisor is used, which is then able to load multiple VMs on the virtualized platform. The goal is much the same as with the traditional HPC offering: making big systems out of little ones so that system management can be simplified and overall utilization and flexibility can be improved. “From a computer science perspective, there’s not much difference between running a 100 processors of MATLAB in parallel and 100 VMs,” explains Fultheim.

The VM on VM feature currently only works with KVM and Xen, but ScaleMP intends to add support for Microsoft’s Hyper-V and VMware down the road. It’s still in the preview stage, so the company is registering interested parties on its Web site.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Geospatial Data Research Leverages GPUs

August 17, 2017

MapD Technologies, the GPU-accelerated database specialist, said it is working with university researchers on leveraging graphics processors to advance geospatial analytics. The San Francisco-based company is collabor Read more…

By George Leopold

Intel, NERSC and University Partners Launch New Big Data Center

August 17, 2017

A collaboration between the Department of Energy’s National Energy Research Scientific Computing Center (NERSC), Intel and five Intel Parallel Computing Centers (IPCCs) has resulted in a new Big Data Center (BDC) that Read more…

By Linda Barney

Google Releases Deeplearn.js to Further Democratize Machine Learning

August 17, 2017

Spreading the use of machine learning tools is one of the goals of Google’s PAIR (People + AI Research) initiative, which was introduced in early July. Last week the cloud giant released deeplearn.js as part of that in Read more…

By John Russell

HPE Extreme Performance Solutions

Leveraging Deep Learning for Fraud Detection

Advancements in computing technologies and the expanding use of e-commerce platforms have dramatically increased the risk of fraud for financial services companies and their customers. Read more…

Spoiler Alert: Glimpse Next Week’s Solar Eclipse Via Simulation from TACC, SDSC, and NASA

August 17, 2017

Can’t wait to see next week’s solar eclipse? You can at least catch glimpses of what scientists expect it will look like. A team from Predictive Science Inc. (PSI), based in San Diego, working with Stampede2 at the Read more…

By John Russell

Microsoft Bolsters Azure With Cloud HPC Deal

August 15, 2017

Microsoft has acquired cloud computing software vendor Cycle Computing in a move designed to bring orchestration tools along with high-end computing access capabilities to the cloud. Terms of the acquisition were not disclosed. Read more…

By George Leopold

HPE Ships Supercomputer to Space Station, Final Destination Mars

August 14, 2017

With a manned mission to Mars on the horizon, the demand for space-based supercomputing is at hand. Today HPE and NASA sent the first off-the-shelf HPC system i Read more…

By Tiffany Trader

AMD EPYC Video Takes Aim at Intel’s Broadwell

August 14, 2017

Let the benchmarking begin. Last week, AMD posted a YouTube video in which one of its EPYC-based systems outperformed a ‘comparable’ Intel Broadwell-based s Read more…

By John Russell

Deep Learning Thrives in Cancer Moonshot

August 8, 2017

The U.S. War on Cancer, certainly a worthy cause, is a collection of programs stretching back more than 40 years and abiding under many banners. The latest is t Read more…

By John Russell

IBM Raises the Bar for Distributed Deep Learning

August 8, 2017

IBM is announcing today an enhancement to its PowerAI software platform aimed at facilitating the practical scaling of AI models on today’s fastest GPUs. Scal Read more…

By Tiffany Trader

IBM Storage Breakthrough Paves Way for 330TB Tape Cartridges

August 3, 2017

IBM announced yesterday a new record for magnetic tape storage that it says will keep tape storage density on a Moore's law-like path far into the next decade. Read more…

By Tiffany Trader

AMD Stuffs a Petaflops of Machine Intelligence into 20-Node Rack

August 1, 2017

With its Radeon “Vega” Instinct datacenter GPUs and EPYC “Naples” server chips entering the market this summer, AMD has positioned itself for a two-head Read more…

By Tiffany Trader

Cray Moves to Acquire the Seagate ClusterStor Line

July 28, 2017

This week Cray announced that it is picking up Seagate's ClusterStor HPC storage array business for an undisclosed sum. "In short we're effectively transitioning the bulk of the ClusterStor product line to Cray," said CEO Peter Ungaro. Read more…

By Tiffany Trader

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Just how close real-wo Read more…

By John Russell

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurrencies like Bitcoin, along with classified government communications and other sensitive digital transfers. Read more…

By Doug Black

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Groq This: New AI Chips to Give GPUs a Run for Deep Learning Money

April 24, 2017

CPUs and GPUs, move over. Thanks to recent revelations surrounding Google’s new Tensor Processing Unit (TPU), the computing world appears to be on the cusp of Read more…

By Alex Woodie

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its a Read more…

By Tiffany Trader

Leading Solution Providers

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the cam Read more…

By John Russell

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

In this contributed perspective piece, Intel’s Jim Jeffers makes the case that CPU-based visualization is now widely adopted and as such is no longer a contrarian view, but is rather an exascale requirement. Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

Six Exascale PathForward Vendors Selected; DoE Providing $258M

June 15, 2017

The much-anticipated PathForward awards for hardware R&D in support of the Exascale Computing Project were announced today with six vendors selected – AMD Read more…

By John Russell

Top500 Results: Latest List Trends and What’s in Store

June 19, 2017

Greetings from Frankfurt and the 2017 International Supercomputing Conference where the latest Top500 list has just been revealed. Although there were no major Read more…

By Tiffany Trader

IBM Clears Path to 5nm with Silicon Nanosheets

June 5, 2017

Two years since announcing the industry’s first 7nm node test chip, IBM and its research alliance partners GlobalFoundries and Samsung have developed a proces Read more…

By Tiffany Trader

Messina Update: The US Path to Exascale in 16 Slides

April 26, 2017

Paul Messina, director of the U.S. Exascale Computing Project, provided a wide-ranging review of ECP’s evolving plans last week at the HPC User Forum. Read more…

By John Russell

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This