Cray Sets Sights On Cascade Supercomputer, Exascale Milestone

By Michael Feldman

June 10, 2010

Cray’s recent unveiling of its XE6 supercomputer, previously codenamed “Baker,” marks the beginning of a larger strategy that lays the foundation for the company’s future heterogeneous supercomputing products. At last week’s International Supercomputing Conference (ISC) in Hamburg, HPCwire sat down with Cray CTO Steve Scott to talk about life after Baker, where he revealed the company’s plans for its upcoming “Cascade” supercomputer and how the exascale landscape is shaping up.

Cascade will be Cray’s first capability supercomputer based on Intel x86 processors. Starting with the XT3 machine in 2004, all of the company’s non-proprietary top-end supers have been built with AMD Opteron CPUs. According to Scott, the first Cascade system delivered will sport Xeon-powered server blades, but the intention is to eventually support AMD Opteron processors on this architecture as well. Like most HPC vendors, Cray appears committed to following this dual-x86 product path.

The development of Cascade is being subsidized by DARPA’s HPCS (High Productivity Computing Systems) program. The third and final phase of the contract with Cray set aside $250 million to help the company complete development of the hardware and the supporting system software. (IBM was allocated $244 million for its corresponding PERCS system.) According to Scott, Cascade is currently on track to be delivered sometime in the second half of 2012. Specific product timetables for the Opteron version are still to be determined, and will ultimately depend upon customer demand as well as AMD’s processor schedule.

A new system interconnect, codenamed “Aries,” is being developed for the Cascade-class machines. To support a dual Intel-AMD strategy on this architecture, Cray is going to begin using PCI-Express as the processor interface to the interconnect ASIC. The current SeaStar, and now Gemini interconnect, are tied to Opteron’s native HyperTransport link. While it might seem natural to think that Cray would hook into Intel’s QPI for network connectivity on a Xeon-based machine, opting for PCI-Express meant Cray could support the same network across both processor architectures — and any future ones as well. According to Scott, they’re looking to tape out the Aries chip by the end of 2010.

For Cray, Cascade represents a fairly significant break with the XT/XE line of supercomputers, which have maintained a smooth hardware upgrade path for the past six years. Although the software stack and application codes can be carried forward onto Cascade, the reworked hardware architecture means users will no longer be able to extend their XT or XE infrastructure with this new technology.

Cascade will also have an accelerator blade to go along with the x86-based blades. Originally, this component was going to be developed under the HPCS contract, but for various reasons the work got canceled, which culminated in a contract renegotiation to reduce the scope of the contract late in 2009. According to Scott, Cray was working with Intel on the technology, but as of now they are undecided about which accelerator will end up in the Cascade product line. The most likely candidates include NVIDIA’s Tesla GPUs, AMD’s FireStream GPUs, and Intel’s “Many Integrated Core” (MIC) coprocessor, which was announced at ISC last week. At present, Cray is talking with all three vendors about the roadmaps for their respective accelerator solutions.

The XE6 supercomputer, slated for delivery in Q3 2010, will also get an accelerator blade, said Scott, who confirmed that it will be based on the latest NVIDIA Tesla-20 (Fermi) GPUs, which are just coming into production now. As of now, the release date for the XE6 accelerator blade option is still under wraps, but it’s reasonable to think that it will be announced before the end of the year. Cray also partnered with NVIDIA to put in a bid for DARPA’s Ubiquitous High Performance Computing (UHPC) program for “ExtremeScale architectures,” which is aimed at innovative terascale to petascale supercomputing systems.

Accelerators appear to be a big part of Cray’s strategy going forward. “In the long run we’re going to have to change the trajectory,” said Scott. “Plain old multicore x86 won’t do it. Most of the heavy lifting is going to have to be done by processors that are specifically designed, first order, for power efficiency, not for running single threads fast. So we’re going to need heterogeneity in some form.”

Right now, the software support for accelerators is in its infancy. So Scott is not expecting the HPC community to shift en masse to this new computing model overnight. Even after the XE6 accelerator blades hit the streets, Scott expects the majority of systems sold will be straight Opteron-based machines. “Over time that’s going to shift, said Scott. “I would predict five years from now, the bulk of serious HPC is going to be done with some kind of accelerated heterogeneous architecture.”

Further down the road, heterogeneous processing will form the foundation of Cray exascale architectures. In 2018, the year Scott predicts Cray will have a machine that can deliver a sustained application exaflop, heterogeneous computing will likely be much more highly integrated. According to Scott, CPU-GPU hybrid processors (or the equivalent), along the lines of AMD’s Fusion architecture, will be generally available and powerful enough to form the basis of HPC machines. He believes both NVIDIA and Intel will be offering their own versions of integrated CPU-accelerator chips. “That’s clearly the direction to take,” he asserted. “The more tightly you can couple those two different types of processors together, the better off we’ll be.”

He also foresees optical interconnects integrated directly into the chip package, with possibly some electrical interconnect on the board, as well as networks that are very low diameter so that you don’t have to expend a lot of power retransmitting data. In addition, Scott envisions another level of memory between the off-chip DIMMs and on-chip cache, implemented perhaps with 3D stacking technology — the idea being to substantially increase the bandwidth to the processors, while reducing power. “It’s not like it’s going to be easy,” noted Scott. “But I think there’s definitely a path.”

As far as what lies beyond exascale, Cray has nothing on the drawing board yet, but neither does anyone else. Assuming, historical trends hold, the first zettaflop systems will show up around 2028. But they are likely to be based on technologies that have yet to make it out of the research lab.

“I do think that exascale is going to be the last one that we’re going to get to with traditional silicon technology,” said Scott. “I don’t know what’s going to be next, but if you look back 100 years, we’ve gone from mechanical tabulating machines, to electro-mechanical relays, to vacuum tubes, to discrete transistors, to integrated circuits. If you look at that history you see a straight line of performance growth through multiple technology transitions. That doesn’t prove a damn thing. But it gives me some sort of hope that we’ll come up with something post-silicon ICs to take us forward.”

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Bill Gropp – Pursuing the Next Big Thing at NCSA

March 28, 2017

About eight months ago Bill Gropp was elevated to acting director of the National Center for Supercomputing Applications (NCSA). Read more…

By John Russell

UK to Launch Six Major HPC Centers

March 27, 2017

Six high performance computing centers will be formally launched in the U.K. later this week intended to provide wider access to HPC resources to U.K. Read more…

By John Russell

AI in the News: Rao in at Intel, Ng out at Baidu, Nvidia on at Tencent Cloud

March 26, 2017

Just as AI has become the leitmotif of the advanced scale computing market, infusing much of the conversation about HPC in commercial and industrial spheres, it also is impacting high-level management changes in the industry. Read more…

By Doug Black

Scalable Informatics Ceases Operations

March 23, 2017

On the same day we reported on the uncertain future for HPC compiler company PathScale, we are sad to learn that another HPC vendor, Scalable Informatics, is closing its doors. Read more…

By Tiffany Trader

HPE Extreme Performance Solutions

Quants Achieving Maximum Compute Power without the Learning Curve

The financial services industry is a fast-paced and data-intensive environment, and financial firms are realizing that they must modernize their IT infrastructures and invest in high performance computing (HPC) tools in order to survive. Read more…

‘Strategies in Biomedical Data Science’ Advances IT-Research Synergies

March 23, 2017

“Strategies in Biomedical Data Science: Driving Force for Innovation” by Jay A. Etchings is both an introductory text and a field guide for anyone working with biomedical data. Read more…

By Tiffany Trader

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its assets. Read more…

By Tiffany Trader

Google Launches New Machine Learning Journal

March 22, 2017

On Monday, Google announced plans to launch a new peer review journal and “ecosystem” Read more…

By John Russell

Swiss Researchers Peer Inside Chips with Improved X-Ray Imaging

March 22, 2017

Peering inside semiconductor chips using x-ray imaging isn’t new, but the technique hasn’t been especially good or easy to accomplish. Read more…

By John Russell

Bill Gropp – Pursuing the Next Big Thing at NCSA

March 28, 2017

About eight months ago Bill Gropp was elevated to acting director of the National Center for Supercomputing Applications (NCSA). Read more…

By John Russell

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its assets. Read more…

By Tiffany Trader

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Read more…

By John Russell

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the campaign. Read more…

By John Russell

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

In this contributed perspective piece, Intel’s Jim Jeffers makes the case that CPU-based visualization is now widely adopted and as such is no longer a contrarian view, but is rather an exascale requirement. Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

US Supercomputing Leaders Tackle the China Question

March 15, 2017

Joint DOE-NSA report responds to the increased global pressures impacting the competitiveness of U.S. supercomputing. Read more…

By Tiffany Trader

New Japanese Supercomputing Project Targets Exascale

March 14, 2017

Another Japanese supercomputing project was revealed this week, this one from emerging supercomputer maker, ExaScaler Inc., and Keio University. The partners are working on an original supercomputer design with exascale aspirations. Read more…

By Tiffany Trader

Nvidia Debuts HGX-1 for Cloud; Announces Fujitsu AI Deal

March 9, 2017

On Monday Nvidia announced a major deal with Fujitsu to help build an AI supercomputer for RIKEN using 24 DGX-1 servers. Read more…

By John Russell

For IBM/OpenPOWER: Success in 2017 = (Volume) Sales

January 11, 2017

To a large degree IBM and the OpenPOWER Foundation have done what they said they would – assembling a substantial and growing ecosystem and bringing Power-based products to market, all in about three years. Read more…

By John Russell

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Read more…

By John Russell

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the campaign. Read more…

By John Russell

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its assets. Read more…

By Tiffany Trader

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a new board design for NVLink-equipped Pascal P100 GPUs that will create another entrant to the space currently occupied by Nvidia's DGX-1 system, IBM's "Minsky" platform and the Supermicro SuperServer (1028GQ-TXR). Read more…

By Tiffany Trader

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which will be Japan’s “fastest AI supercomputer,” Read more…

By Tiffany Trader

IBM Wants to be “Red Hat” of Deep Learning

January 26, 2017

IBM today announced the addition of TensorFlow and Chainer deep learning frameworks to its PowerAI suite of deep learning tools, which already includes popular offerings such as Caffe, Theano, and Torch. Read more…

By John Russell

Lighting up Aurora: Behind the Scenes at the Creation of the DOE’s Upcoming 200 Petaflops Supercomputer

December 1, 2016

In April 2015, U.S. Department of Energy Undersecretary Franklin Orr announced that Intel would be the prime contractor for Aurora: Read more…

By Jan Rowell

Leading Solution Providers

Is Liquid Cooling Ready to Go Mainstream?

February 13, 2017

Lost in the frenzy of SC16 was a substantial rise in the number of vendors showing server oriented liquid cooling technologies. Three decades ago liquid cooling was pretty much the exclusive realm of the Cray-2 and IBM mainframe class products. That’s changing. We are now seeing an emergence of x86 class server products with exotic plumbing technology ranging from Direct-to-Chip to servers and storage completely immersed in a dielectric fluid. Read more…

By Steve Campbell

Enlisting Deep Learning in the War on Cancer

December 7, 2016

Sometime in Q2 2017 the first ‘results’ of the Joint Design of Advanced Computing Solutions for Cancer (JDACS4C) will become publicly available according to Rick Stevens. He leads one of three JDACS4C pilot projects pressing deep learning (DL) into service in the War on Cancer. Read more…

By John Russell

BioTeam’s Berman Charts 2017 HPC Trends in Life Sciences

January 4, 2017

Twenty years ago high performance computing was nearly absent from life sciences. Today it’s used throughout life sciences and biomedical research. Genomics and the data deluge from modern lab instruments are the main drivers, but so is the longer-term desire to perform predictive simulation in support of Precision Medicine (PM). There’s even a specialized life sciences supercomputer, ‘Anton’ from D.E. Shaw Research, and the Pittsburgh Supercomputing Center is standing up its second Anton 2 and actively soliciting project proposals. There’s a lot going on. Read more…

By John Russell

HPC Startup Advances Auto-Parallelization’s Promise

January 23, 2017

The shift from single core to multicore hardware has made finding parallelism in codes more important than ever, but that hasn’t made the task of parallel programming any easier. Read more…

By Tiffany Trader

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu’s Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural network training and now they are sharing their implementation with the larger deep learning community. Read more…

By Tiffany Trader

CPU Benchmarking: Haswell Versus POWER8

June 2, 2015

With OpenPOWER activity ramping up and IBM’s prominent role in the upcoming DOE machines Summit and Sierra, it’s a good time to look at how the IBM POWER CPU stacks up against the x86 Xeon Haswell CPU from Intel. Read more…

By Tiffany Trader

US Supercomputing Leaders Tackle the China Question

March 15, 2017

Joint DOE-NSA report responds to the increased global pressures impacting the competitiveness of U.S. supercomputing. Read more…

By Tiffany Trader

IDG to Be Bought by Chinese Investors; IDC to Spin Out HPC Group

January 19, 2017

US-based publishing and investment firm International Data Group, Inc. (IDG) will be acquired by a pair of Chinese investors, China Oceanwide Holdings Group Co., Ltd. Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This