Startup Aims to Transform Computing with Probability Processing

By Michael Feldman

August 16, 2010

MIT spin-out Lyric Semiconductor Inc. has launched a new breed of integrated circuits that replaces the binary logic of traditional computing with probabilistic logic. The aim is to deliver a much more efficient architecture for applications based on probability computing. For these types of workloads, the company is promising orders-of-magnitude improvement in energy efficiency, performance and cost.

Essentially, what Lyric has come up with is a fifth processor architecture, following CPUs, GPUs, DSPs, and FPGAs. The technology grew out of Ben Vigoda’s Ph.D. thesis work at MIT more than 10 years ago. In 2006, Vigoda founded the company, along with IC designer David Reynolds and Analog Devices CEO Ray Stata. Vigoda became the CEO, Reynolds the VP of product development, and Stata took the post of chairman of Lyric’s board (with Stata Venture Partners listed as the lead investor). The company has filed 50 patents to protect its intellectual property and raised over $20 million to get the business off the ground. About $18 million of that funding was injected from DARPA and other government agencies to spur the research and development effort and make probability processing a viable technology.

The goal is to construct hardware circuitry and software purpose-built for probability applications. With conventional digital technology, processing has to follow a strictly linear path. This is fine for software like operating systems, spreadsheets, word processing, and database transactions, where the computing consists of straightforward calculations or data movement. “But most of the interesting things happening nowadays don’t really fit into that model,” says Reynolds. From his perspective, the goal of more and more software today is to find the best fit or most likely answer (or answers) to a problem.

Most data mining, predictive analytics, pattern recognition, and modeling/simulation codes fall into this category. That encompasses a wide range of applications including Web searching, financial modeling, genome sequence analysis, speech recognition, climate modeling, credit fraud detection, spam filtering, and financial modeling, among many others. People tend to associate these probability-based applications with human-like intelligence, and this is clearly where software, in general, is moving.

Even today, the average person uses probability computing on a fairly regular basis. For example, when you hop onto Amazon’s website, the software behind the scenes attempts to predict what product you might be interested in buying, basing its suggestions on past shopping behavior and what you’re currently clicking on. If you do make a purchase, the credit card company’s software tries to determine if the charge is fraudulent or not, again based on past buying habits. Both of these pieces of software are searching for the most likely result, rather than a specific answer. “So these applications are not a great fit for the traditional digital processor as we know it,” says Reynolds.

Probability computing has been around for decades, but most of the work has involved developing languages and algorithms, which are subsequently applied to vanilla digital computers. Lyric’s founders were convinced that they needed to rethink the design of the underlying circuitry to get the optimal solution. What they came up with was the concept of pbits (probability bits), which unlike Boolean bits can represent a lot more than two states. Lyric is not divulging exactly how many states that might be, but according to Reynolds: “Suffice to say that we have all the states we need for the applications we’ve looked at so far.”

To process pbits, Lyric has designed a set of standard probability logic gates that can be connected to one another multi-directionally. So instead of stepping through an application in a linear sequence using Boolean gates, more complex operations, such as getting the intersection of data, can be performed on multiple variables in parallel. That, says Reynolds, is a much more natural way of implementing parallelism than CPUs provide with multicore and multi-threading architectures.

According to him, for probabilistic-type operations, what took 500 transistors with conventional digital logic can be distilled down to just a handful of probability transistors. Lyric predicts that a single probability processor will be able to increase computational capability by two or three orders of magnitude compared to today’s server chips, with commensurate savings in cost, power and space.

The company’s first commercial product will be aimed at advanced error correction for NAND flash memory. Called Lyric Error Correction (LEC), it’s designed to relieve the flash memory ECC bottleneck, which is becoming a constraint as semiconductor process geometries shrink. On the 30nm process, flash memory errors are generated at the rate of 1 in 1,000. On the next generation technology, it will be 1 in 100. That means the ECC component of the controller, which is already the largest piece of the device, may become impractical to implement.

As it turns out advanced ECC logic is based on probabilities, so it’s a nice fit for Lyric-style circuits. The company is promising a 30-fold reduction in die real estate (for 1 Gbps bandwidths) and a 12-fold improvement in power. The company has ported the device to different process nodes using TSMC as the fab partner, and is claiming yields typical for this class of application. LEC is available for licensing today, with product integration expected in 12 months.

But the real payoff for Lyric is at least a few years down the road. The company is developing the GP5, which stands for general-purpose programmable probability processing platform. The technology is aimed at the broader set of probability applications mentioned above, and, according to the company, will be up to 1,000 times more efficient at these types of tasks than current x86 CPUs. The first samples of the GP5 are slated to appear in 2013.

According to Mira Wilczek, Lyric’s director of business development, the initial commercial implementations of the GP5 are likely to be packaged inside an appliance or embedded device, such as a Web search server or a handheld speech recognition device. A more general-purpose use case could involve a GP5 used as a coprocessor in conjunction with a CPU.

For high performance computing work, the latter configuration could be a way to accelerate performance on applications such as materials modeling and whole genome analysis, in much the same way as GPGPUs are being employed today. “Just like a GPU exploits the vector nature of graphics computation, we exploit the typical structures that our algorithms take for probability computation,” explains Wilczek.

The downside to the new architecture is that conventional programming languages, like C, Fortran and Java, are not very good at expressing probability algorithms. Lyric has come up with its own language, called PSBL (Probability Synthesizes to Bayesian Logic) that can be compiled to their hardware. The language is a rule-based language, where the programmer specifies the constraints of the problems, rather than how to solve it. Other probability-type programming languages, like R and the Microsoft’s Infer.NET could also presumably be targeted to Lyric’s architecture.

PSBL 1.0 will be licensed to select partners in Q4 2010 with a second version slated for Q4 2010. In the absence of Lyric hardware, the PSBL code can be compiled to run in a simulator on a conventional computer, albeit much more slowly. When the GP5 arrives in 2013, the hope is to have the foundation of a probability computing ecosystem already in place.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Advancing Modular Supercomputing with DEEP and DEEP-ER Architectures

February 24, 2017

Knowing that the jump to exascale will require novel architectural approaches capable of delivering dramatic efficiency and performance gains, researchers around the world are hard at work on next-generation HPC systems. Read more…

By Sean Thielen

Weekly Twitter Roundup (Feb. 23, 2017)

February 23, 2017

Here at HPCwire, we aim to keep the HPC community apprised of the most relevant and interesting news items that get tweeted throughout the week. Read more…

By Thomas Ayres

HPE Server Shows Low Latency on STAC-N1 Test

February 22, 2017

The performance of trade and match servers can be a critical differentiator for financial trading houses. Read more…

By John Russell

HPC Financial Update (Feb. 2017)

February 22, 2017

In this recurring feature, we’ll provide you with financial highlights from companies in the HPC industry. Check back in regularly for an updated list with the most pertinent fiscal information. Read more…

By Thomas Ayres

HPE Extreme Performance Solutions

O&G Companies Create Value with High Performance Remote Visualization

Today’s oil and gas (O&G) companies are striving to process datasets that have become not only tremendously large, but extremely complex. And the larger that data becomes, the harder it is to move and analyze it – particularly with a workforce that could be distributed between drilling sites, offshore rigs, and remote offices. Read more…

Rethinking HPC Platforms for ‘Second Gen’ Applications

February 22, 2017

Just what constitutes HPC and how best to support it is a keen topic currently. Read more…

By John Russell

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu’s Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural network training and now they are sharing their implementation with the larger deep learning community. Read more…

By Tiffany Trader

IDC: Will the Real Exascale Race Please Stand Up?

February 21, 2017

So the exascale race is on. And lots of organizations are in the pack. Government announcements from the US, China, India, Japan, and the EU indicate that they are working hard to make it happen – some sooner, some later. Read more…

By Bob Sorensen, IDC

ExxonMobil, NCSA, Cray Scale Reservoir Simulation to 700,000+ Processors

February 17, 2017

In a scaling breakthrough for oil and gas discovery, ExxonMobil geoscientists report they have harnessed the power of 717,000 processors – the equivalent of 22,000 32-processor computers – to run complex oil and gas reservoir simulation models. Read more…

By Doug Black

Advancing Modular Supercomputing with DEEP and DEEP-ER Architectures

February 24, 2017

Knowing that the jump to exascale will require novel architectural approaches capable of delivering dramatic efficiency and performance gains, researchers around the world are hard at work on next-generation HPC systems. Read more…

By Sean Thielen

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu’s Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural network training and now they are sharing their implementation with the larger deep learning community. Read more…

By Tiffany Trader

IDC: Will the Real Exascale Race Please Stand Up?

February 21, 2017

So the exascale race is on. And lots of organizations are in the pack. Government announcements from the US, China, India, Japan, and the EU indicate that they are working hard to make it happen – some sooner, some later. Read more…

By Bob Sorensen, IDC

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a new board design for NVLink-equipped Pascal P100 GPUs that will create another entrant to the space currently occupied by Nvidia's DGX-1 system, IBM's "Minsky" platform and the Supermicro SuperServer (1028GQ-TXR). Read more…

By Tiffany Trader

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which will be Japan’s “fastest AI supercomputer,” Read more…

By Tiffany Trader

Drug Developers Use Google Cloud HPC in the Fight Against ALS

February 16, 2017

Within the haystack of a lethal disease such as ALS (amyotrophic lateral sclerosis / Lou Gehrig’s Disease) there exists, somewhere, the needle that will pierce this therapy-resistant affliction. Read more…

By Doug Black

Azure Edges AWS in Linpack Benchmark Study

February 15, 2017

The “when will clouds be ready for HPC” question has ebbed and flowed for years. Read more…

By John Russell

Is Liquid Cooling Ready to Go Mainstream?

February 13, 2017

Lost in the frenzy of SC16 was a substantial rise in the number of vendors showing server oriented liquid cooling technologies. Three decades ago liquid cooling was pretty much the exclusive realm of the Cray-2 and IBM mainframe class products. That’s changing. We are now seeing an emergence of x86 class server products with exotic plumbing technology ranging from Direct-to-Chip to servers and storage completely immersed in a dielectric fluid. Read more…

By Steve Campbell

For IBM/OpenPOWER: Success in 2017 = (Volume) Sales

January 11, 2017

To a large degree IBM and the OpenPOWER Foundation have done what they said they would – assembling a substantial and growing ecosystem and bringing Power-based products to market, all in about three years. Read more…

By John Russell

US, China Vie for Supercomputing Supremacy

November 14, 2016

The 48th edition of the TOP500 list is fresh off the presses and while there is no new number one system, as previously teased by China, there are a number of notable entrants from the US and around the world and significant trends to report on. Read more…

By Tiffany Trader

Lighting up Aurora: Behind the Scenes at the Creation of the DOE’s Upcoming 200 Petaflops Supercomputer

December 1, 2016

In April 2015, U.S. Department of Energy Undersecretary Franklin Orr announced that Intel would be the prime contractor for Aurora: Read more…

By Jan Rowell

D-Wave SC16 Update: What’s Bo Ewald Saying These Days

November 18, 2016

Tucked in a back section of the SC16 exhibit hall, quantum computing pioneer D-Wave has been talking up its new 2000-qubit processor announced in September. Forget for a moment the criticism sometimes aimed at D-Wave. This small Canadian company has sold several machines including, for example, ones to Lockheed and NASA, and has worked with Google on mapping machine learning problems to quantum computing. In July Los Alamos National Laboratory took possession of a 1000-quibit D-Wave 2X system that LANL ordered a year ago around the time of SC15. Read more…

By John Russell

Enlisting Deep Learning in the War on Cancer

December 7, 2016

Sometime in Q2 2017 the first ‘results’ of the Joint Design of Advanced Computing Solutions for Cancer (JDACS4C) will become publicly available according to Rick Stevens. He leads one of three JDACS4C pilot projects pressing deep learning (DL) into service in the War on Cancer. Read more…

By John Russell

IBM Wants to be “Red Hat” of Deep Learning

January 26, 2017

IBM today announced the addition of TensorFlow and Chainer deep learning frameworks to its PowerAI suite of deep learning tools, which already includes popular offerings such as Caffe, Theano, and Torch. Read more…

By John Russell

HPC Startup Advances Auto-Parallelization’s Promise

January 23, 2017

The shift from single core to multicore hardware has made finding parallelism in codes more important than ever, but that hasn’t made the task of parallel programming any easier. Read more…

By Tiffany Trader

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which will be Japan’s “fastest AI supercomputer,” Read more…

By Tiffany Trader

Leading Solution Providers

CPU Benchmarking: Haswell Versus POWER8

June 2, 2015

With OpenPOWER activity ramping up and IBM’s prominent role in the upcoming DOE machines Summit and Sierra, it’s a good time to look at how the IBM POWER CPU stacks up against the x86 Xeon Haswell CPU from Intel. Read more…

By Tiffany Trader

Nvidia Sees Bright Future for AI Supercomputing

November 23, 2016

Graphics chipmaker Nvidia made a strong showing at SC16 in Salt Lake City last week. Read more…

By Tiffany Trader

BioTeam’s Berman Charts 2017 HPC Trends in Life Sciences

January 4, 2017

Twenty years ago high performance computing was nearly absent from life sciences. Today it’s used throughout life sciences and biomedical research. Genomics and the data deluge from modern lab instruments are the main drivers, but so is the longer-term desire to perform predictive simulation in support of Precision Medicine (PM). There’s even a specialized life sciences supercomputer, ‘Anton’ from D.E. Shaw Research, and the Pittsburgh Supercomputing Center is standing up its second Anton 2 and actively soliciting project proposals. There’s a lot going on. Read more…

By John Russell

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a new board design for NVLink-equipped Pascal P100 GPUs that will create another entrant to the space currently occupied by Nvidia's DGX-1 system, IBM's "Minsky" platform and the Supermicro SuperServer (1028GQ-TXR). Read more…

By Tiffany Trader

IDG to Be Bought by Chinese Investors; IDC to Spin Out HPC Group

January 19, 2017

US-based publishing and investment firm International Data Group, Inc. (IDG) will be acquired by a pair of Chinese investors, China Oceanwide Holdings Group Co., Ltd. Read more…

By Tiffany Trader

Dell Knights Landing Machine Sets New STAC Records

November 2, 2016

The Securities Technology Analysis Center, commonly known as STAC, has released a new report characterizing the performance of the Knight Landing-based Dell PowerEdge C6320p server on the STAC-A2 benchmarking suite, widely used by the financial services industry to test and evaluate computing platforms. The Dell machine has set new records for both the baseline Greeks benchmark and the large Greeks benchmark. Read more…

By Tiffany Trader

Is Liquid Cooling Ready to Go Mainstream?

February 13, 2017

Lost in the frenzy of SC16 was a substantial rise in the number of vendors showing server oriented liquid cooling technologies. Three decades ago liquid cooling was pretty much the exclusive realm of the Cray-2 and IBM mainframe class products. That’s changing. We are now seeing an emergence of x86 class server products with exotic plumbing technology ranging from Direct-to-Chip to servers and storage completely immersed in a dielectric fluid. Read more…

By Steve Campbell

What Knights Landing Is Not

June 18, 2016

As we get ready to launch the newest member of the Intel Xeon Phi family, code named Knights Landing, it is natural that there be some questions and potentially some confusion. Read more…

By James Reinders, Intel

  • arrow
  • Click Here for More Headlines
  • arrow
Share This