AMD Blazes New Path with Bulldozer

By Michael Feldman

August 24, 2010

Now that AMD has jettisoned its chip production business with the Globalfoundries spinoff, it can concentrate on what it has always done best: microprocessor design. Much of its success early in the decade resulted from outmaneuvering Intel, its much larger rival, in the lucrative x86 server space. With the Opteron CPU, AMD paved the way for the next-generation x86 platform with 64-bit processing, integrated memory controllers, and a NUMA architecture. Now with Bulldozer, AMD’s upcoming x86 core, the chip vendor is once again looking to leapfrog the competition.

Bulldozer represents AMD’s first new x86 core redesign in seven years, according to Dina McKinney, vice president of design engineering at AMD. McKinney briefed reporters and analysts last week on the new architecture, in preparation for a more public unveiling at this week’s Hot Chips conference at Stanford University. The intention, says McKinney, is for this core to “live for a long time.”

AMD is actually talking up its two new core architectures this week, Bobcat and Bulldozer. Bobcat is AMD’s low-power core and is initially being targeted to notebooks and netbooks, where it will compete against Intel’s Atom processor. The Bulldozer architecture will be the basis for Opteron chips and high-end desktop CPUs, where performance and scalability are paramount.

The focus of the Bulldozer design is to optimize thread throughput against die real estate and power consumption. Intel has attacked the issue with HyperThreading, its version of Simultaneous MultiThreading (SMT), where each core can handle two threads with minimal hardware redundancy. Meanwhile, AMD has stuck with the one core per thread model, known as the Chip MultiProcessing (CMP).

In Bulldozer, the company has opted for a sort of hybrid approach where each module consists of two integer schedulers, which appear to the software as two separate cores. Because they appear as individual cores, AMD is counting them as such. For example, a 4-module Bulldozer CPU would be sold as an 8-core processor.

The dual integer schedulers shared a floating point unit, which consists of an FP scheduler that manages two 128-bit multiply and accumulate units. An integer unit can also use the two 128-bit FPU units to schedule 256-bit operations, when extra wide floating point computations are called for. Each Bulldozer integer unit has is own L1 data cache, but they, along with the floating point unit, share an L2 cache. To build a processor, multiple Bulldozer modules are laid out on the chip and they all share an L3 cache, along with an integrated memory controller and a Northbridge controller.

 

 

The whole idea is to strike a balance between dedicated and shared hardware such that those resources most in demand (the integer unit and L1 cache) are duplicated and those in lesser demand (FP unit and L2 cache) are not. (Note that even in technical HPC applications, the integer unit dominates execution cycles.) AMD’s claim is that the Bulldozer design delivers 33 percent more cores and an estimated 50 percent increase in throughput within the same power envelope as the current generation Magny-Cours Opteron.

The first Bulldozer-based CPU will be the Opteron 6000 series “Interlagos” CPU aimed at enterprise and HPC server platforms. Interlagos is a 16-core chip — thus it will be built from 8 Bulldozer modules — and will be the first AMD processor to use the 32nm SOI manufacturing technology.

Interlagos is scheduled to go into production sometime in 2011. It will use the same G34 socket as its Magny-Cours predecessor, so even though the underlying microarchitecture has changed, AMD is promising a plug-in upgrade for the first Bulldozer Opterons. The 4000 series Opterons could swallow Bulldozer technology as well, but there is no such product yet announced for this line.

Bulldozer will also end up in the 8-core Zambezi processor for high-end desktop systems, again in 2011, but following the Interlagos release. McKinney hinted that Bulldozer cores would eventually make their appearance in APU-type (CPU-GPU Fusion) processors and even mobile chips, but presumably such products won’t show up until 2012 and beyond.

Whether the Bulldozer technology ignites a comeback for AMD in the server and workstation arena remains to be seen. The company is not releasing performance or pricing data on future Bulldozer-based processors yet, so there’s no way to gauge their competitiveness against Intel’s Xeon chips.

AMD has been losing market share in this space for years. According to IDC, Intel supplied a whopping 93.5 percent of server processors in the second quarter of 2010, while AMD claims a measly 6.5 percent. Even in HPC, where AMD chips traditionally have had better traction, the numbers aren’t much better. On the latest TOP500 list (June 2010) of supercomputers, Opterons have only a 9.8 percent share, compared to Xeons at 80.2 percent. Certainly AMD has lots of lost ground to make up.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Activist Investor Starboard Buys 10.7% Stake in Mellanox; Sale Possible?

November 20, 2017

Starboard Value has reportedly taken a 10.7 percent stake in interconnect specialist Mellanox Technologies, and according to the Wall Street Journal, has urged the company “to improve its margins and stock and explore Read more…

By John Russell

Installation of Sierra Supercomputer Steams Along at LLNL

November 20, 2017

Sierra, the 125 petaflops (peak) machine based on IBM’s Power9 chip being built at Lawrence Livermore National Laboratory, sometimes takes a back seat to Summit, the ~200 petaflops system being built at Oak Ridge Natio Read more…

By John Russell

SC Bids Farewell to Denver, Heads to Dallas for 30th

November 17, 2017

After a jam-packed four-day expo and intensive six-day technical program, SC17 has wrapped up another successful event that brought together nearly 13,000 visitors to the Colorado Convention Center in Denver for the larg Read more…

By Tiffany Trader

HPE Extreme Performance Solutions

Harness Scalable Petabyte Storage with HPE Apollo 4510 and HPE StoreEver

As a growing number of connected devices challenges IT departments to rapidly collect, manage, and store troves of data, organizations must adopt a new generation of IT to help them operate quickly and intelligently. Read more…

SC17 Keynote – HPC Powers SKA Efforts to Peer Deep into the Cosmos

November 17, 2017

This week’s SC17 keynote – Life, the Universe and Computing: The Story of the SKA Telescope – was a powerful pitch for the potential of Big Science projects that also showcased the foundational role of high performance computing in modern science. It was also visually stunning. Read more…

By John Russell

SC Bids Farewell to Denver, Heads to Dallas for 30th

November 17, 2017

After a jam-packed four-day expo and intensive six-day technical program, SC17 has wrapped up another successful event that brought together nearly 13,000 visit Read more…

By Tiffany Trader

SC17 Keynote – HPC Powers SKA Efforts to Peer Deep into the Cosmos

November 17, 2017

This week’s SC17 keynote – Life, the Universe and Computing: The Story of the SKA Telescope – was a powerful pitch for the potential of Big Science projects that also showcased the foundational role of high performance computing in modern science. It was also visually stunning. Read more…

By John Russell

How Cities Use HPC at the Edge to Get Smarter

November 17, 2017

Cities are sensoring up, collecting vast troves of data that they’re running through predictive models and using the insights to solve problems that, in some Read more…

By Doug Black

Student Cluster LINPACK Record Shattered! More LINs Packed Than Ever before!

November 16, 2017

Nanyang Technological University, the pride of Singapore, utterly destroyed the Student Cluster Competition LINPACK record by posting a score of 51.77 TFlop/s a Read more…

By Dan Olds

Hyperion Market Update: ‘Decent’ Growth Led by HPE; AI Transparency a Risk Issue

November 15, 2017

The HPC market update from Hyperion Research (formerly IDC) at the annual SC conference is a business and social “must,” and this year’s presentation at S Read more…

By Doug Black

Nvidia Focuses Its Cloud Containers on HPC Applications

November 14, 2017

Having migrated its top-of-the-line datacenter GPU to the largest cloud vendors, Nvidia is touting its Volta architecture for a range of scientific computing ta Read more…

By George Leopold

HPE Launches ARM-based Apollo System for HPC, AI

November 14, 2017

HPE doubled down on its memory-driven computing vision while expanding its processor portfolio with the announcement yesterday of the company’s first ARM-base Read more…

By Doug Black

OpenACC Shines in Global Climate/Weather Codes

November 14, 2017

OpenACC, the directive-based parallel programming model used mostly for porting codes to GPUs for use on heterogeneous systems, came to SC17 touting impressive Read more…

By John Russell

US Coalesces Plans for First Exascale Supercomputer: Aurora in 2021

September 27, 2017

At the Advanced Scientific Computing Advisory Committee (ASCAC) meeting, in Arlington, Va., yesterday (Sept. 26), it was revealed that the "Aurora" supercompute Read more…

By Tiffany Trader

NERSC Scales Scientific Deep Learning to 15 Petaflops

August 28, 2017

A collaborative effort between Intel, NERSC and Stanford has delivered the first 15-petaflops deep learning software running on HPC platforms and is, according Read more…

By Rob Farber

Oracle Layoffs Reportedly Hit SPARC and Solaris Hard

September 7, 2017

Oracle’s latest layoffs have many wondering if this is the end of the line for the SPARC processor and Solaris OS development. As reported by multiple sources Read more…

By John Russell

AMD Showcases Growing Portfolio of EPYC and Radeon-based Systems at SC17

November 13, 2017

AMD’s charge back into HPC and the datacenter is on full display at SC17. Having launched the EPYC processor line in June along with its MI25 GPU the focus he Read more…

By John Russell

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Google Releases Deeplearn.js to Further Democratize Machine Learning

August 17, 2017

Spreading the use of machine learning tools is one of the goals of Google’s PAIR (People + AI Research) initiative, which was introduced in early July. Last w Read more…

By John Russell

GlobalFoundries Puts Wind in AMD’s Sails with 12nm FinFET

September 24, 2017

From its annual tech conference last week (Sept. 20), where GlobalFoundries welcomed more than 600 semiconductor professionals (reaching the Santa Clara venue Read more…

By Tiffany Trader

Amazon Debuts New AMD-based GPU Instances for Graphics Acceleration

September 12, 2017

Last week Amazon Web Services (AWS) streaming service, AppStream 2.0, introduced a new GPU instance called Graphics Design intended to accelerate graphics. The Read more…

By John Russell

Leading Solution Providers

EU Funds 20 Million Euro ARM+FPGA Exascale Project

September 7, 2017

At the Barcelona Supercomputer Centre on Wednesday (Sept. 6), 16 partners gathered to launch the EuroEXA project, which invests €20 million over three-and-a-half years into exascale-focused research and development. Led by the Horizon 2020 program, EuroEXA picks up the banner of a triad of partner projects — ExaNeSt, EcoScale and ExaNoDe — building on their work... Read more…

By Tiffany Trader

Delays, Smoke, Records & Markets – A Candid Conversation with Cray CEO Peter Ungaro

October 5, 2017

Earlier this month, Tom Tabor, publisher of HPCwire and I had a very personal conversation with Cray CEO Peter Ungaro. Cray has been on something of a Cinderell Read more…

By Tiffany Trader & Tom Tabor

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

Cray Moves to Acquire the Seagate ClusterStor Line

July 28, 2017

This week Cray announced that it is picking up Seagate's ClusterStor HPC storage array business for an undisclosed sum. "In short we're effectively transitioning the bulk of the ClusterStor product line to Cray," said CEO Peter Ungaro. Read more…

By Tiffany Trader

Intel Launches Software Tools to Ease FPGA Programming

September 5, 2017

Field Programmable Gate Arrays (FPGAs) have a reputation for being difficult to program, requiring expertise in specialty languages, like Verilog or VHDL. Easin Read more…

By Tiffany Trader

HPC Chips – A Veritable Smorgasbord?

October 10, 2017

For the first time since AMD's ill-fated launch of Bulldozer the answer to the question, 'Which CPU will be in my next HPC system?' doesn't have to be 'Whichever variety of Intel Xeon E5 they are selling when we procure'. Read more…

By Dairsie Latimer

Flipping the Flops and Reading the Top500 Tea Leaves

November 13, 2017

The 50th edition of the Top500 list, the biannual publication of the world’s fastest supercomputers based on public Linpack benchmarking results, was released Read more…

By Tiffany Trader

IBM Advances Web-based Quantum Programming

September 5, 2017

IBM Research is pairing its Jupyter-based Data Science Experience notebook environment with its cloud-based quantum computer, IBM Q, in hopes of encouraging a new class of entrepreneurial user to solve intractable problems that even exceed the capabilities of the best AI systems. Read more…

By Alex Woodie

Share This