The Week in Review

By Tiffany Trader

October 14, 2010

Here is a collection of highlights from this week’s news stream as reported by HPCwire.

Teams Gear Up for SC10 Student Cluster Competition

Ixia’s High Speed Ethernet Test Solutions Validate Mellanox ConnectX-2 NIC

Astronomer Employs HPC to Peer into Cosmic Mysteries

Nimbis Services Announces Cloud Services for Mathematica

Extreme Networks, SARA and CERN Complete First Long-Haul 40 GbE Link Across Europe

Ontario Advanced Network First to Launch Operational 100G Network

NOAA Establishes Supercomputing Center in West Virginia

Platform Computing, Excelian Partner to Deliver High Performance Analytics for Financial Services

AMAX Partners with Bright Computing to Maximize HPC Throughput

Ciena, Mellanox, SURFnet and University of Amsterdam Complete 40 Gbps, Long-Haul Optics Demonstration

Intel Reports First $11 Billion Revenue Quarter

SGI Announces Support and Record Benchmarks for VoltDB Database

Appro HF1 Server Targets High Frequency Traders

NEC Selects PBS Works as the Workload Management Tool for TSUBAME 2.0

Pittsburgh Supercomputing Center Boots Up ‘Blacklight’

Nimbis Services Launches HPC Workbook for Desktop Users

Deterministic Parallel Java Brings Safety and Modularity to Parallel Programming

Multicore Processors Key to Increasing Flexibility in High-Performance Networking, Report Finds

BLADE Switch Delivers One Terabit of Throughput

Switch maker BLADE Network Technologies (BLADE) today unveiled the RackSwitch G8264, a single-chip 40 Gigabit Ethernet (GbE) top-of-rack switch. The switch delivers more than one terabit of low-latency throughput to the datacenter. This is the first time that a single-chip switch is available for terabit-scale deployment of 10GbE.

The new switch touts 64-10GbE ports, up to four-40GbE ports and 1.28 terabits of non-blocking throughput. Designed to handle I/O-intensive and highly virtualized workloads, the switch is well suited for HPC clusters, cloud computing, and algorithmic trading.

BLADE is aiming to fulfill the needs of mainstream enterprise datacenters, which are responding to increased data demands by increasingly deploying servers equipped with 10GbE. BLADE is going forward with the belief that 40GbE is the next logical step. Higher speed uplinks, such as 10/40 Gigabit Ethernet switches, will be required to handle the increased network bandwidth of the next-generation of datacenters.

According to Vikram Mehta, president and CEO, BLADE Network Technologies:

“BLADE is proud to break the terabit barrier in a single-chip design with the RackSwitch G8264. Our new switch is designed for today’s most demanding requirements at the datacenter edge to interconnect highly utilized servers equipped with 10 Gigabit Ethernet and provide seamless migration to 40 Gigabit upstream networks.”

The RackSwitch G8264 will be available in November at a cost of $22,500 USD. Interested parties can view the product at the upcoming Supercomputing Conference (SC10).2

UC Riverside Physicists Advance Spin Computing

“Spin computing” — aka “spintronics” offers great potential for the future of computing — think superfast computers that can overcome present Moore’s Law limitations while using less energy and generating less heat than the current batch of number crunchers.

Here’s how it works: electrons can be polarized so that they have a particular directional orientation, called spin. An electron can either be polarized so attain two states, called “spin up” or “spin down.” Storing data with spin would effectively double the amount of data a computer could store since it allows two pieces of data to be stored on an electron instead of just one, as is currently the case.

While researchers have been working on the technology for about four decades, it’s not quite ready for primetime. This week, however, Physicists at the University of California, Riverside have taken spintronics to the next level by successfully achieving “tunneling spin injection” into graphene. Their study results appear this week in Physical Review Letters.

From the announcement:

Tunneling spin injection is a term used to describe conductivity through an insulator. Graphene, brought into the limelight by this year’s Nobel Prize in physics, is a single-atom-thick sheet of carbon atoms arrayed in a honeycomb pattern. Extremely strong and flexible, it is a good conductor of electricity and capable of resisting heat.

While graphene has characteristics that make it a very promising candidate for use in spin computers, the electrical spin injection from a ferromagnetic electrode into graphene is inefficient. Additionally, and even more troubling to the research team, observed spin lifetimes are thousands of times shorter than expected theoretically. Longer spin lifetimes are important because they allow for more computational operations.

The research team, led by Roland Kawakami, an associate professor of physics and astronomy, was able to dramatically increase the spin injection efficiency by inserting an insulating layer, known as a “tunnel barrier,” in between the electrode and the graphene layer. The team thus achieved the first demonstration of tunneling spin injection into graphene, and the 30-fold increase spin injection efficiency set a world record.

The Kawakami lab was also to reconcile the short spin lifetimes of electrons in graphene. They discovered that using the tunnel barrier increased the spin lifetime. According to Kawakami, graphene has the potential for extremely long spin lifetimes.

The next step for the Kawakami lab is to demonstrate a working spin logic device. Ultimately, a chip capable of manipulating the spin of a single electron could pave the way for futuristic quantum computers.

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SC17 Keynote – HPC Powers SKA Efforts to Peer Deep into the Cosmos

November 17, 2017

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SC17 Student Cluster Competition Configurations: Fewer Nodes, Way More Accelerators

November 16, 2017

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Student Clusterers Demolish HPCG Record! Nanyang Sweeps Benchmarks

November 16, 2017

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HPE Extreme Performance Solutions

Harness Scalable Petabyte Storage with HPE Apollo 4510 and HPE StoreEver

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Student Cluster LINPACK Record Shattered! More LINs Packed Than Ever before!

November 16, 2017

Nanyang Technological University, the pride of Singapore, utterly destroyed the Student Cluster Competition LINPACK record by posting a score of 51.77 TFlop/s at SC17 in Denver. The previous record, established by German Read more…

By Dan Olds

SC17 Keynote – HPC Powers SKA Efforts to Peer Deep into the Cosmos

November 17, 2017

Thus week’s SC17 keynote – Life, the Universe and Computing: The Story of the SKA Telescope – was a powerful pitch for the potential of Big Science projec Read more…

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Student Cluster LINPACK Record Shattered! More LINs Packed Than Ever before!

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Nanyang Technological University, the pride of Singapore, utterly destroyed the Student Cluster Competition LINPACK record by posting a score of 51.77 TFlop/s a Read more…

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Hyperion Market Update: ‘Decent’ Growth Led by HPE; AI Transparency a Risk Issue

November 15, 2017

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Nvidia Focuses Its Cloud Containers on HPC Applications

November 14, 2017

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By George Leopold

HPE Launches ARM-based Apollo System for HPC, AI

November 14, 2017

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OpenACC Shines in Global Climate/Weather Codes

November 14, 2017

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Flipping the Flops and Reading the Top500 Tea Leaves

November 13, 2017

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Tensors Come of Age: Why the AI Revolution Will Help HPC

November 13, 2017

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US Coalesces Plans for First Exascale Supercomputer: Aurora in 2021

September 27, 2017

At the Advanced Scientific Computing Advisory Committee (ASCAC) meeting, in Arlington, Va., yesterday (Sept. 26), it was revealed that the "Aurora" supercompute Read more…

By Tiffany Trader

NERSC Scales Scientific Deep Learning to 15 Petaflops

August 28, 2017

A collaborative effort between Intel, NERSC and Stanford has delivered the first 15-petaflops deep learning software running on HPC platforms and is, according Read more…

By Rob Farber

Oracle Layoffs Reportedly Hit SPARC and Solaris Hard

September 7, 2017

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By John Russell

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

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Google Releases Deeplearn.js to Further Democratize Machine Learning

August 17, 2017

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By John Russell

GlobalFoundries Puts Wind in AMD’s Sails with 12nm FinFET

September 24, 2017

From its annual tech conference last week (Sept. 20), where GlobalFoundries welcomed more than 600 semiconductor professionals (reaching the Santa Clara venue Read more…

By Tiffany Trader

Amazon Debuts New AMD-based GPU Instances for Graphics Acceleration

September 12, 2017

Last week Amazon Web Services (AWS) streaming service, AppStream 2.0, introduced a new GPU instance called Graphics Design intended to accelerate graphics. The Read more…

By John Russell

EU Funds 20 Million Euro ARM+FPGA Exascale Project

September 7, 2017

At the Barcelona Supercomputer Centre on Wednesday (Sept. 6), 16 partners gathered to launch the EuroEXA project, which invests €20 million over three-and-a-half years into exascale-focused research and development. Led by the Horizon 2020 program, EuroEXA picks up the banner of a triad of partner projects — ExaNeSt, EcoScale and ExaNoDe — building on their work... Read more…

By Tiffany Trader

Leading Solution Providers

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

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Delays, Smoke, Records & Markets – A Candid Conversation with Cray CEO Peter Ungaro

October 5, 2017

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Cray Moves to Acquire the Seagate ClusterStor Line

July 28, 2017

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Intel Launches Software Tools to Ease FPGA Programming

September 5, 2017

Field Programmable Gate Arrays (FPGAs) have a reputation for being difficult to program, requiring expertise in specialty languages, like Verilog or VHDL. Easin Read more…

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HPC Chips – A Veritable Smorgasbord?

October 10, 2017

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By Dairsie Latimer

IBM Advances Web-based Quantum Programming

September 5, 2017

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How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

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Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

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By Tiffany Trader

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