The Week in Review

By Tiffany Trader

October 14, 2010

Here is a collection of highlights from this week’s news stream as reported by HPCwire.

Teams Gear Up for SC10 Student Cluster Competition

Ixia’s High Speed Ethernet Test Solutions Validate Mellanox ConnectX-2 NIC

Astronomer Employs HPC to Peer into Cosmic Mysteries

Nimbis Services Announces Cloud Services for Mathematica

Extreme Networks, SARA and CERN Complete First Long-Haul 40 GbE Link Across Europe

Ontario Advanced Network First to Launch Operational 100G Network

NOAA Establishes Supercomputing Center in West Virginia

Platform Computing, Excelian Partner to Deliver High Performance Analytics for Financial Services

AMAX Partners with Bright Computing to Maximize HPC Throughput

Ciena, Mellanox, SURFnet and University of Amsterdam Complete 40 Gbps, Long-Haul Optics Demonstration

Intel Reports First $11 Billion Revenue Quarter

SGI Announces Support and Record Benchmarks for VoltDB Database

Appro HF1 Server Targets High Frequency Traders

NEC Selects PBS Works as the Workload Management Tool for TSUBAME 2.0

Pittsburgh Supercomputing Center Boots Up ‘Blacklight’

Nimbis Services Launches HPC Workbook for Desktop Users

Deterministic Parallel Java Brings Safety and Modularity to Parallel Programming

Multicore Processors Key to Increasing Flexibility in High-Performance Networking, Report Finds

BLADE Switch Delivers One Terabit of Throughput

Switch maker BLADE Network Technologies (BLADE) today unveiled the RackSwitch G8264, a single-chip 40 Gigabit Ethernet (GbE) top-of-rack switch. The switch delivers more than one terabit of low-latency throughput to the datacenter. This is the first time that a single-chip switch is available for terabit-scale deployment of 10GbE.

The new switch touts 64-10GbE ports, up to four-40GbE ports and 1.28 terabits of non-blocking throughput. Designed to handle I/O-intensive and highly virtualized workloads, the switch is well suited for HPC clusters, cloud computing, and algorithmic trading.

BLADE is aiming to fulfill the needs of mainstream enterprise datacenters, which are responding to increased data demands by increasingly deploying servers equipped with 10GbE. BLADE is going forward with the belief that 40GbE is the next logical step. Higher speed uplinks, such as 10/40 Gigabit Ethernet switches, will be required to handle the increased network bandwidth of the next-generation of datacenters.

According to Vikram Mehta, president and CEO, BLADE Network Technologies:

“BLADE is proud to break the terabit barrier in a single-chip design with the RackSwitch G8264. Our new switch is designed for today’s most demanding requirements at the datacenter edge to interconnect highly utilized servers equipped with 10 Gigabit Ethernet and provide seamless migration to 40 Gigabit upstream networks.”

The RackSwitch G8264 will be available in November at a cost of $22,500 USD. Interested parties can view the product at the upcoming Supercomputing Conference (SC10).2

UC Riverside Physicists Advance Spin Computing

“Spin computing” — aka “spintronics” offers great potential for the future of computing — think superfast computers that can overcome present Moore’s Law limitations while using less energy and generating less heat than the current batch of number crunchers.

Here’s how it works: electrons can be polarized so that they have a particular directional orientation, called spin. An electron can either be polarized so attain two states, called “spin up” or “spin down.” Storing data with spin would effectively double the amount of data a computer could store since it allows two pieces of data to be stored on an electron instead of just one, as is currently the case.

While researchers have been working on the technology for about four decades, it’s not quite ready for primetime. This week, however, Physicists at the University of California, Riverside have taken spintronics to the next level by successfully achieving “tunneling spin injection” into graphene. Their study results appear this week in Physical Review Letters.

From the announcement:

Tunneling spin injection is a term used to describe conductivity through an insulator. Graphene, brought into the limelight by this year’s Nobel Prize in physics, is a single-atom-thick sheet of carbon atoms arrayed in a honeycomb pattern. Extremely strong and flexible, it is a good conductor of electricity and capable of resisting heat.

While graphene has characteristics that make it a very promising candidate for use in spin computers, the electrical spin injection from a ferromagnetic electrode into graphene is inefficient. Additionally, and even more troubling to the research team, observed spin lifetimes are thousands of times shorter than expected theoretically. Longer spin lifetimes are important because they allow for more computational operations.

The research team, led by Roland Kawakami, an associate professor of physics and astronomy, was able to dramatically increase the spin injection efficiency by inserting an insulating layer, known as a “tunnel barrier,” in between the electrode and the graphene layer. The team thus achieved the first demonstration of tunneling spin injection into graphene, and the 30-fold increase spin injection efficiency set a world record.

The Kawakami lab was also to reconcile the short spin lifetimes of electrons in graphene. They discovered that using the tunnel barrier increased the spin lifetime. According to Kawakami, graphene has the potential for extremely long spin lifetimes.

The next step for the Kawakami lab is to demonstrate a working spin logic device. Ultimately, a chip capable of manipulating the spin of a single electron could pave the way for futuristic quantum computers.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

NSF Awards $10M to Extend Chameleon Cloud Testbed Project

September 19, 2017

The National Science Foundation has awarded a second phase, $10 million grant to the Chameleon cloud computing testbed project led by University of Chicago with partners at the Texas Advanced Computing Center (TACC), Ren Read more…

By John Russell

NERSC Simulations Shed Light on Fusion Reaction Turbulence

September 19, 2017

Understanding fusion reactions in detail – particularly plasma turbulence – is critical to the effort to bring fusion power to reality. Recent work including roughly 70 million hours of compute time at the National E Read more…

Kathy Yelick Charts the Promise and Progress of Exascale Science

September 15, 2017

On Friday, Sept. 8, Kathy Yelick of Lawrence Berkeley National Laboratory and the University of California, Berkeley, delivered the keynote address on “Breakthrough Science at the Exascale” at the ACM Europe Conferen Read more…

By Tiffany Trader

HPE Extreme Performance Solutions

HPE Prepares Customers for Success with the HPC Software Portfolio

High performance computing (HPC) software is key to harnessing the full power of HPC environments. Development and management tools enable IT departments to streamline installation and maintenance of their systems as well as create, optimize, and run their HPC applications. Read more…

U of Illinois, NCSA Launch First US Nanomanufacturing Node

September 14, 2017

The University of Illinois at Urbana-Champaign together with the National Center for Supercomputing Applications (NCSA) have launched the United States's first computational node aimed at the development of nanomanufactu Read more…

By Tiffany Trader

Kathy Yelick Charts the Promise and Progress of Exascale Science

September 15, 2017

On Friday, Sept. 8, Kathy Yelick of Lawrence Berkeley National Laboratory and the University of California, Berkeley, delivered the keynote address on “Breakt Read more…

By Tiffany Trader

DARPA Pledges Another $300 Million for Post-Moore’s Readiness

September 14, 2017

The Defense Advanced Research Projects Agency (DARPA) launched a giant funding effort to ensure the United States can sustain the pace of electronic innovation vital to both a flourishing economy and a secure military. Under the banner of the Electronics Resurgence Initiative (ERI), some $500-$800 million will be invested in post-Moore’s Law technologies. Read more…

By Tiffany Trader

IBM Breaks Ground for Complex Quantum Chemistry

September 14, 2017

IBM has reported the use of a novel algorithm to simulate BeH2 (beryllium-hydride) on a quantum computer. This is the largest molecule so far simulated on a quantum computer. The technique, which used six qubits of a seven-qubit system, is an important step forward and may suggest an approach to simulating ever larger molecules. Read more…

By John Russell

Cubes, Culture, and a New Challenge: Trish Damkroger Talks about Life at Intel—and Why HPC Matters More Than Ever

September 13, 2017

Trish Damkroger wasn’t looking to change jobs when she attended SC15 in Austin, Texas. Capping a 15-year career within Department of Energy (DOE) laboratories, she was acting Associate Director for Computation at Lawrence Livermore National Laboratory (LLNL). Her mission was to equip the lab’s scientists and research partners with resources that would advance their cutting-edge work... Read more…

By Jan Rowell

EU Funds 20 Million Euro ARM+FPGA Exascale Project

September 7, 2017

At the Barcelona Supercomputer Centre on Wednesday (Sept. 6), 16 partners gathered to launch the EuroEXA project, which invests €20 million over three-and-a-half years into exascale-focused research and development. Led by the Horizon 2020 program, EuroEXA picks up the banner of a triad of partner projects — ExaNeSt, EcoScale and ExaNoDe — building on their work... Read more…

By Tiffany Trader

MIT-IBM Watson AI Lab Targets Algorithms, AI Physics

September 7, 2017

Investment continues to flow into artificial intelligence research, especially in key areas such as AI algorithms that promise to move the technology from speci Read more…

By George Leopold

Need Data Science CyberInfrastructure? Check with RENCI’s xDCI Concierge

September 6, 2017

For about a year the Renaissance Computing Institute (RENCI) has been assembling best practices and open source components around data-driven scientific researc Read more…

By John Russell

IBM Advances Web-based Quantum Programming

September 5, 2017

IBM Research is pairing its Jupyter-based Data Science Experience notebook environment with its cloud-based quantum computer, IBM Q, in hopes of encouraging a new class of entrepreneurial user to solve intractable problems that even exceed the capabilities of the best AI systems. Read more…

By Alex Woodie

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

NERSC Scales Scientific Deep Learning to 15 Petaflops

August 28, 2017

A collaborative effort between Intel, NERSC and Stanford has delivered the first 15-petaflops deep learning software running on HPC platforms and is, according Read more…

By Rob Farber

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurrencies like Bitcoin, along with classified government communications and other sensitive digital transfers. Read more…

By Doug Black

Oracle Layoffs Reportedly Hit SPARC and Solaris Hard

September 7, 2017

Oracle’s latest layoffs have many wondering if this is the end of the line for the SPARC processor and Solaris OS development. As reported by multiple sources Read more…

By John Russell

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

Six Exascale PathForward Vendors Selected; DoE Providing $258M

June 15, 2017

The much-anticipated PathForward awards for hardware R&D in support of the Exascale Computing Project were announced today with six vendors selected – AMD Read more…

By John Russell

Top500 Results: Latest List Trends and What’s in Store

June 19, 2017

Greetings from Frankfurt and the 2017 International Supercomputing Conference where the latest Top500 list has just been revealed. Although there were no major Read more…

By Tiffany Trader

Leading Solution Providers

IBM Clears Path to 5nm with Silicon Nanosheets

June 5, 2017

Two years since announcing the industry’s first 7nm node test chip, IBM and its research alliance partners GlobalFoundries and Samsung have developed a proces Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in Read more…

By Tiffany Trader

Google Releases Deeplearn.js to Further Democratize Machine Learning

August 17, 2017

Spreading the use of machine learning tools is one of the goals of Google’s PAIR (People + AI Research) initiative, which was introduced in early July. Last w Read more…

By John Russell

EU Funds 20 Million Euro ARM+FPGA Exascale Project

September 7, 2017

At the Barcelona Supercomputer Centre on Wednesday (Sept. 6), 16 partners gathered to launch the EuroEXA project, which invests €20 million over three-and-a-half years into exascale-focused research and development. Led by the Horizon 2020 program, EuroEXA picks up the banner of a triad of partner projects — ExaNeSt, EcoScale and ExaNoDe — building on their work... Read more…

By Tiffany Trader

Cray Moves to Acquire the Seagate ClusterStor Line

July 28, 2017

This week Cray announced that it is picking up Seagate's ClusterStor HPC storage array business for an undisclosed sum. "In short we're effectively transitioning the bulk of the ClusterStor product line to Cray," said CEO Peter Ungaro. Read more…

By Tiffany Trader

Amazon Debuts New AMD-based GPU Instances for Graphics Acceleration

September 12, 2017

Last week Amazon Web Services (AWS) streaming service, AppStream 2.0, introduced a new GPU instance called Graphics Design intended to accelerate graphics. The Read more…

By John Russell

GlobalFoundries: 7nm Chips Coming in 2018, EUV in 2019

June 13, 2017

GlobalFoundries has formally announced that its 7nm technology is ready for customer engagement with product tape outs expected for the first half of 2018. The Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This