Swiss Researchers Propose ‘GreenIT’ Methodology for HPC

By Nicole Hemsoth

November 19, 2010

The latest Green500 list announced this week at SC10 is once again shining the spotlight on the energy efficiency of the world’s top supercomputers. But the path to more efficient high performance computing goes beyond this simple benchmark-based approach. Ralf Gruber and Vincent Keller, both from École Polytechnique Fédérale de Lausanne (EPFL), describe a holistic approach to more energy-efficient HPC operations in their book, [email protected] HPCwire contributor Steve Conway interviewed the Swiss duo about their ideas, including a new benchmark.

HPCwire: Why did you write a book on “green” high performance computing methods?

Ralf Gruber: There was no theory on how to couple application needs to hardware offers. In the book, we try to set up a theory by defining parameters to characterize resources and applications. This parameterization is then used to develop models to predict if a computer architecture is well suited for an application or not. These models can also be used to detect poor application implementations, to redesign computer architectures, to detect resources that should be switched off, to run on the same resource two or more complementary applications that optimally use the different parts, or to simply recognize the best-suited machine for a given application.

Vincent Keller: Finally, we used these models to interact with the DVS-able processors in order to tune the frequency of the processor. Measurements on a Nehalem already show overall energy reductions of up to 30 percent for main memory access-dominated applications.

HPCwire: You make recommendations in several areas. What are your application-oriented recommendations?

Gruber: Together with an efficient monitoring, the parameterization of the applications leads to models that are used to understand how well an application runs on different computers. The models — for instance the one on the complexity — also help to detect an unexpected behavior that can then be corrected.

Keller: We also make a recommendation to the vendors and the main HPC actors to create a new application-oriented REAL500 list, based on the observation that the current TOP500 list is largely used for marketing purposes and does not reflect the real applications anymore. At a certain point, it is counter-productive for making better usage of large-scale architectures.

HPCwire: How about your recommendations for system software?

Keller: System software should be able to easily measure the behavior of an application. Also, it should then be possible to act on the hardware parts during execution, such as switching off unused cores, reducing resource frequencies, or disabling unused main memory.

HPCwire: Sum up your recommendations for reducing energy use.

Keller: Energy reduction can be achieved through improving the efficiency of the application, through frequency reductions — four times more resources running at four times smaller frequency consume four times less energy — and by switching off unused parts, or by choosing a better-suited computer for the application to run on.

HPCwire: You mention that the TOP500 list and the derivative Green500 list are based on the narrow High Performance Linpack benchmark. What do you propose as an alternative to better measure energy efficiency?

Gruber: The parameterization and the models described in the book enable people to predict the behavior of an application on a different hardware platform, if one knows some timings of a few characteristic test applications. Thus, it would be perfect to perform measurements of processor, main memory, and network test cases for which the application-oriented parameters are exactly known.

Keller: Typical test cases are applications such as matrix*matrix-dominated, HPL-like codes, matrix*vector-dominated codes that are iteratively solved, Poisson problems described by sparse matrices, multicast communications dominated CP2K codes, and point-to-point-dominated, SpecuLOOS codes. Then, it would be possible to predict the behavior of your own application on the new hardware.

Keller: As a consequence, the new REAL500 classification would not be based on a single value, as is the case with today’s TOP500, but on several metrics, including pure CPU performance, the ratio of CPU performance to memory bandwidth, multicast communication performance, point-to-point communication performance, and network latency. At this point, knowing the applications ecosystem, it is possible to choose the right machine, or a set of the right machines to fit to the application component needs and achieve the greenest, most performant results.

HPCwire: Worldwide studies by IDC and Avetec showed that 69 percent of HPC datacenters do not actively measure energy efficiency today, and 80 percent have no strong mandate to improve energy efficiency. What will change this situation?

Keller: As a first comment, if 69 percent of the centers do not measure the energy, it is understandable that 80 percent of them have no mandate to improve energy efficiency. By providing them the right tools to show that it is possible to reduce the energy bill for hardware and cooling with no loss of computational performance, we are convinced that their financial departments will consider the question as important and act. The situation is already on a wind of change. It is not uncommon to see a datacenter that would like to extend its computing capacity but cannot because of a power supply limitation. The demand in computing power increases, but energy consumption should not.

HPCwire: John Gustafson of Intel Labs says that by 2018, we’ll have an exaflop computer and the memory bandwidth will consume half of the power. How important is it to create new strategies to minimize data movement?

Gruber: Main memory is already the big issue now. When we reduce the frequency of the processor during execution, for instance on a Nehalem, the main memory consumes most of the energy, and this happens not only in 2018. The major problem is the small parallelism in data access. We should highly increase access parallelism by increasing the number of memory banks as in the old vector machines, and by increasing the bit stream. Then, it will be possible to decrease the frequency and the energy consumption.

HPCwire: Is cloud computing more or less energy-efficient than in-house computing?

Keller: Cloud computing is a buzzword. It is little more than grid computing plus a business model, and the latest strategy of scientists to raise funding for academic research. Grid computing was a big dream and a big failure. Why? Because the question of “who pays?” was never taken into account.

Cloud computing is different in that sense. A provider gives a certain quality of service: “I will provide you 1 gigaflops with a memory bandwidth of 1 GB/second for $1/hour.” Thanks to virtualization, the cloud computing providers, such as Amazon, Salesforce or Google, can offer computing power to their customers at a lower price, with multiple customers on the same hardware. We’ve known since the mainframe era that shared resources are cheaper and more energy-efficient than distributed resources that are left idle part of the time. In that specific sense of re-implementing old concepts, cloud computing could be more energy-efficient than in-house computing.

Last but not least, the data transfer from the customer to the provider and back is not taken into account in the final bill. It is more or less like living in Geneva: Swiss people know that food is less expensive in France than in Switzerland, but they have to take into account the round trip. How much food would make it less expensive, with the transport costs included, to buy in France rather than in Switzerland?

HPCwire: What tips do you have for choosing a new supercomputer that will use energy wisely?

Keller: In a recent publication [1], we propose a GPU-based supercomputer that uses only a few cores, with the others switched off, and runs these at a four times lower frequency, This would reduce energy consumption by a factor of 16. To compensate for the performance reduction, four times more units must then be purchased. Together with the fact that the amount of main memory per processor can be reduced by a factor of four, the overall energy consumption can be estimated to drop by an overall factor of nine, and this by simply downgrading the resources.

Gruber: We also realized that the overall costs over four years could be cheaper for the downgraded hardware. In addition, decreasing the temperature by about 30° C increases the MTBF by a factor of 8. This is another important issue for exaflop machines. We were told that multiplying the number of functional units by four is unacceptable. We believe that running with one million of cores or with four million of cores is not an issue, but consuming nine times less energy, and increasing MTBF by eight are very important issues. The question we have to ask the hardware companies is clear: Will they agree to downgrade their computers to increase energy efficiency?

[1] Keller, V. and Gruber R. One Joule per GFlop for BLAS2 Now!, ICNAAM 2010 proceedings, pp. 1321-1324, ISBN: 978-0-7354-0834-0

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Nvidia Rolls Out Certified Server Program Targeting AI Applications

January 26, 2021

Nvidia today launched a certified systems program in which participating vendors can offer Nvidia-certified servers with up to eight A100 GPUs. Separate support contracts directly from Nvidia for the certified systems ar Read more…

By John Russell

XSEDE Supercomputers Square Off Against Ebola

January 26, 2021

COVID-19 may have dominated headlines and occupied much of the world’s scientific computing capacity over the last year, but many researchers continued their work to keep other deadly viruses at bay. One of those, Ebol Read more…

By Oliver Peckham

What’s New in HPC Research: Galaxies, Fugaku, Electron Microscopes & More

January 25, 2021

In this regular feature, HPCwire highlights newly published research in the high-performance computing community and related domains. From parallel programming to exascale to quantum computing, the details are here. Read more…

By Oliver Peckham

Red Hat’s Disruption of CentOS Unleashes Storm of Dissent

January 22, 2021

Five weeks after angering much of the CentOS Linux developer community by unveiling controversial changes to the no-cost CentOS operating system, Red Hat has unveiled alternatives for affected users that give them severa Read more…

By Todd R. Weiss

China Unveils First 7nm Chip: Big Island

January 22, 2021

Shanghai Tianshu Zhaoxin Semiconductor Co. is claiming China’s first 7-nanometer chip, described as a leading-edge, general-purpose cloud computing chip based on a proprietary GPU architecture. Dubbed “Big Island Read more…

By George Leopold

AWS Solution Channel

Fire Dynamics Simulation CFD workflow on AWS

Modeling fires is key for many industries, from the design of new buildings, defining evacuation procedures for trains, planes and ships, and even the spread of wildfires. Read more…

HiPEAC Keynote: In-Memory Computing Steps Closer to Practical Reality

January 21, 2021

Pursuit of in-memory computing has long been an active area with recent progress showing promise. Just how in-memory computing works, how close it is to practical application, and what are some of the key opportunities a Read more…

By John Russell

Nvidia Rolls Out Certified Server Program Targeting AI Applications

January 26, 2021

Nvidia today launched a certified systems program in which participating vendors can offer Nvidia-certified servers with up to eight A100 GPUs. Separate support Read more…

By John Russell

Red Hat’s Disruption of CentOS Unleashes Storm of Dissent

January 22, 2021

Five weeks after angering much of the CentOS Linux developer community by unveiling controversial changes to the no-cost CentOS operating system, Red Hat has un Read more…

By Todd R. Weiss

HiPEAC Keynote: In-Memory Computing Steps Closer to Practical Reality

January 21, 2021

Pursuit of in-memory computing has long been an active area with recent progress showing promise. Just how in-memory computing works, how close it is to practic Read more…

By John Russell

HiPEAC’s Vision for a New Cyber Era, a ‘Continuum of Computing’

January 21, 2021

Earlier this week (Jan. 19), HiPEAC — the European Network on High Performance and Embedded Architecture and Compilation — published the 8th edition of the HiPEAC Vision, detailing an increasingly interconnected computing landscape where complex tasks are carried out across multiple... Read more…

By Tiffany Trader

Saudi Aramco Unveils Dammam 7, Its New Top Ten Supercomputer

January 21, 2021

By revenue, oil and gas giant Saudi Aramco is one of the largest companies in the world, and it has historically employed commensurate amounts of supercomputing Read more…

By Oliver Peckham

President-elect Biden Taps Eric Lander and Deep Team on Science Policy

January 19, 2021

Last Friday U.S. President-elect Joe Biden named The Broad Institute founding director and president Eric Lander as his science advisor and as director of the Office of Science and Technology Policy. Lander, 63, is a mathematician by training and distinguished life sciences... Read more…

By John Russell

Pat Gelsinger Returns to Intel as CEO

January 14, 2021

The Intel board of directors has appointed a new CEO. Intel alum Pat Gelsinger is leaving his post as CEO of VMware to rejoin the company that he parted ways with 11 years ago. Gelsinger will succeed Bob Swan, who will remain CEO until Feb. 15. Gelsinger previously spent 30 years... Read more…

By Tiffany Trader

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

By John Russell

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

By John Russell

Esperanto Unveils ML Chip with Nearly 1,100 RISC-V Cores

December 8, 2020

At the RISC-V Summit today, Art Swift, CEO of Esperanto Technologies, announced a new, RISC-V based chip aimed at machine learning and containing nearly 1,100 low-power cores based on the open-source RISC-V architecture. Esperanto Technologies, headquartered in... Read more…

By Oliver Peckham

Azure Scaled to Record 86,400 Cores for Molecular Dynamics

November 20, 2020

A new record for HPC scaling on the public cloud has been achieved on Microsoft Azure. Led by Dr. Jer-Ming Chia, the cloud provider partnered with the Beckman I Read more…

By Oliver Peckham

NICS Unleashes ‘Kraken’ Supercomputer

April 4, 2008

A Cray XT4 supercomputer, dubbed Kraken, is scheduled to come online in mid-summer at the National Institute for Computational Sciences (NICS). The soon-to-be petascale system, and the resulting NICS organization, are the result of an NSF Track II award of $65 million to the University of Tennessee and its partners to provide next-generation supercomputing for the nation's science community. Read more…

Is the Nvidia A100 GPU Performance Worth a Hardware Upgrade?

October 16, 2020

Over the last decade, accelerators have seen an increasing rate of adoption in high-performance computing (HPC) platforms, and in the June 2020 Top500 list, eig Read more…

By Hartwig Anzt, Ahmad Abdelfattah and Jack Dongarra

Aurora’s Troubles Move Frontier into Pole Exascale Position

October 1, 2020

Intel’s 7nm node delay has raised questions about the status of the Aurora supercomputer that was scheduled to be stood up at Argonne National Laboratory next year. Aurora was in the running to be the United States’ first exascale supercomputer although it was on a contemporaneous timeline with... Read more…

By Tiffany Trader

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

By Doug Black

Programming the Soon-to-Be World’s Fastest Supercomputer, Frontier

January 5, 2021

What’s it like designing an app for the world’s fastest supercomputer, set to come online in the United States in 2021? The University of Delaware’s Sunita Chandrasekaran is leading an elite international team in just that task. Chandrasekaran, assistant professor of computer and information sciences, recently was named... Read more…

By Tracey Bryant

Leading Solution Providers

Contributors

Top500: Fugaku Keeps Crown, Nvidia’s Selene Climbs to #5

November 16, 2020

With the publication of the 56th Top500 list today from SC20's virtual proceedings, Japan's Fugaku supercomputer – now fully deployed – notches another win, Read more…

By Tiffany Trader

Texas A&M Announces Flagship ‘Grace’ Supercomputer

November 9, 2020

Texas A&M University has announced its next flagship system: Grace. The new supercomputer, named for legendary programming pioneer Grace Hopper, is replacing the Ada system (itself named for mathematician Ada Lovelace) as the primary workhorse for Texas A&M’s High Performance Research Computing (HPRC). Read more…

By Oliver Peckham

At Oak Ridge, ‘End of Life’ Sometimes Isn’t

October 31, 2020

Sometimes, the old dog actually does go live on a farm. HPC systems are often cursed with short lifespans, as they are continually supplanted by the latest and Read more…

By Oliver Peckham

Gordon Bell Special Prize Goes to Massive SARS-CoV-2 Simulations

November 19, 2020

2020 has proven a harrowing year – but it has produced remarkable heroes. To that end, this year, the Association for Computing Machinery (ACM) introduced the Read more…

By Oliver Peckham

Nvidia and EuroHPC Team for Four Supercomputers, Including Massive ‘Leonardo’ System

October 15, 2020

The EuroHPC Joint Undertaking (JU) serves as Europe’s concerted supercomputing play, currently comprising 32 member states and billions of euros in funding. I Read more…

By Oliver Peckham

Intel Xe-HP GPU Deployed for Aurora Exascale Development

November 17, 2020

At SC20, Intel announced that it is making its Xe-HP high performance discrete GPUs available to early access developers. Notably, the new chips have been deplo Read more…

By Tiffany Trader

Nvidia-Arm Deal a Boon for RISC-V?

October 26, 2020

The $40 billion blockbuster acquisition deal that will bring chipmaker Arm into the Nvidia corporate family could provide a boost for the competing RISC-V architecture. As regulators in the U.S., China and the European Union begin scrutinizing the impact of the blockbuster deal on semiconductor industry competition and innovation, the deal has at the very least... Read more…

By George Leopold

HPE, AMD and EuroHPC Partner for Pre-Exascale LUMI Supercomputer

October 21, 2020

Not even a week after Nvidia announced that it would be providing hardware for the first four of the eight planned EuroHPC systems, HPE and AMD are announcing a Read more…

By Oliver Peckham

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This