Attack of the Killer Micros Redux

By Michael Feldman

March 3, 2011

NVIDIA’s unveiling of Project Denver in January 2011 certainly portends big changes ahead for the GPU maker. Over the next couple of years, it will attempt to turn itself from a graphics chip vendor into a computing company. But to make it work, NVIDIA will have to do something no other company has been able to do: take a big chunk of Intel’s volume x86 business.

To recap, Project Denver is NVIDIA’s initiative to build high-end heterogeneous processors, integrating custom-built ARM CPUs with GPUs. The resulting chips are destined for workstations, servers and supercomputers. The brawnier Denver parts will parallel the company’s Tegra line, NVIDIA’s mobile processors that have already successfully delivered ARM CPU-GPU processors into the marketplace.

The Denver strategy is familiar: leverage essentially the same processor designs across an entire product portfolio. NVIDIA’s plan is that in two or three years, the chip they deliver for a smartphone will be a baby brother to the one delivered for a supercomputer. It’s the same model Intel has successfully employed for decades with its x86 architecture.

The emergence of commodity x86 clusters in the 1990s, aka Attack of the Killer Micros, was based on the fact that Intel and AMD could leverage their PC business into the server space. Since the high-end Xeons and Opterons are just souped-up versions of their mainstream x86 design, R&D and production costs can be spread across the entire enterprise. It could be argued that the eventual failure of Intel’s Itanium CPU in the HPC space was the result of that architecture’s lack of a volume market, i.e., from a performance-per-dollar perspective, the hardware became too expensive to deploy at the scale of a supercomputer.

It’s no secret that for the past couple of decades the desktop computer business has subsidized the x86 server business. NVIDIA is taking advantage of this same model; in this case, using the gaming market for GPUs to subsidize its Tesla HPC business. It’s hard to imagine either the Xeon or Tesla business could exist on its own.

But the consumer market is now shifting. In particular, the personal computer business is moving from the desktop to mobile devices like smartphones and tablets, and for the most part, these are ARM-based platforms. And since these mobile devices are more numerous than desktop/laptop systems (and in some cases are replacing them), the ARM CPU now has the advantage in volume.

As I wrote in a recent report on the future of ARM architecture in HPC:

When total shipments are considered, ARM outruns x86 by about a 10-to-1 margin. In 2010, more than 6 billion ARM-based processors were sold, and that number is projected to grow to 8 or 9 billion over the next three years.

Intel’s problem is not just that x86 consumer devices will shift to ARM, but as a result of the volume disruption, the economics of Intel’s higher margin x86 server and workstation business will be threatened as well. That is certainly what NVIDIA is counting on, at least to some degree.

Ars Technica’s Jon Stokes provides an interesting analysis of how this could play out. He begins by arguing that NVIDIA ARM chips will lose the performance and the performance/watt battle with Intel silicon:

First, there’s simply no way that any ARM CPU vendor, NVIDIA included, will even approach Intel’s desktop and server x86 parts in terms of raw performance any time in the next five years, and probably not in this decade. Intel will retain its process leadership, and Xeon will retain the CPU performance crown. Per-thread performance is a very, very hard problem to solve, and Intel is the hands-down leader here.

It’s also the case that as ARM moves up the performance ladder, it will necessarily start to drop in terms of power efficiency. Again, there is no magic pixie dust here, and the impact of the ISA alone on power consumption in processors that draw many tens of watts is negligible. A multicore ARM chip and a multicore Xeon chip that give similar performance on compute-intensive workloads will have similar power profiles; to believe otherwise is to believe in magical little ARM performance elves.

In the case of pure CPU thread performance, Stokes may indeed be right about Intel winning that race. But he seems to have forgotten that NVIDIA will have GPUs on-chip as well. I’ve got to believe that NVIDIA expects its GPU, and not the ARM unit, to do the heavy-duty number crunching on its processors. Certainly for most HPC and visual computing applications, the graphics engine will be the workhorse.

Also for many (most?) compute-intensive applications that must be confined to a CPU, multi-threaded performance is  much more important than single-threaded performance. Certainly if you can keep all the cores fed with data, it’s better to go with less performant cores if you can simply provide more of them, as AMD is doing with its latest Opterons.

For the same reason, I think Stokes’ power efficiency argument is overstated. Right now ARM designs are more energy efficient than x86 designs, mainly because the former is a simpler architecture. While future 64-bit ARM designs will almost certainly be more complex that their 32-bit counterparts, there’s little reason to believe that they’ll need to be as complex as say a Xeon. It remains to be seen how NVIDIA will balance performance and energy efficiency in their future Denver design.

Despite Stokes’ misgivings about ARM’s performance prospects, he still believes Intel and the x86 are in for a rough time — mainly for the same volume economic drivers I talked about earlier. In fact, he speculates that Intel might be forced to develop its own ARM CPU line or open up its fabs to ARM-based SoCs. Of course, AMD could also get into the ARM business, and perhaps has an even greater incentive to do so given its lack of a viable CPU for the mobile space.

Of course the x86 has proved to be remarkably resilient to competing architectures — PowerPC, MIPS, SPARC, Itanium, to name a few. And even though on paper the ARM numbers look overwhelming, the CPU business is not a board game. As with many things, you often can’t tell how much momentum something has until you try to stop it.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

IBM Launches Commercial Quantum Network with Samsung, ORNL

December 14, 2017

In the race to commercialize quantum computing, IBM is one of several companies leading the pack. Today, IBM announced it had signed JPMorgan Chase, Daimler AG, Samsung and a number of other corporations to its IBM Q Net Read more…

By Tiffany Trader

TACC Researchers Test AI Traffic Monitoring Tool in Austin

December 13, 2017

Traffic jams and mishaps are often painful and sometimes dangerous facts of life. At this week’s IEEE International Conference on Big Data being held in Boston, researchers from TACC and colleagues will present a new Read more…

By HPCwire Staff

AMD Wins Another: Baidu to Deploy EPYC on Single Socket Servers

December 13, 2017

When AMD introduced its EPYC chip line in June, the company said a portion of the line was specifically designed to re-invigorate a single socket segment in what has become an overwhelmingly two-socket landscape in the d Read more…

By John Russell

HPE Extreme Performance Solutions

Explore the Origins of Space with COSMOS and Memory-Driven Computing

From the formation of black holes to the origins of space, data is the key to unlocking the secrets of the early universe. Read more…

Microsoft Wants to Speed Quantum Development

December 12, 2017

Quantum computing continues to make headlines in what remains of 2017 as several tech giants jockey to establish a pole position in the race toward commercialization of quantum. This week, Microsoft took the next step in Read more…

By Tiffany Trader

IBM Launches Commercial Quantum Network with Samsung, ORNL

December 14, 2017

In the race to commercialize quantum computing, IBM is one of several companies leading the pack. Today, IBM announced it had signed JPMorgan Chase, Daimler AG, Read more…

By Tiffany Trader

AMD Wins Another: Baidu to Deploy EPYC on Single Socket Servers

December 13, 2017

When AMD introduced its EPYC chip line in June, the company said a portion of the line was specifically designed to re-invigorate a single socket segment in wha Read more…

By John Russell

Microsoft Wants to Speed Quantum Development

December 12, 2017

Quantum computing continues to make headlines in what remains of 2017 as several tech giants jockey to establish a pole position in the race toward commercializ Read more…

By Tiffany Trader

HPC Iron, Soft, Data, People – It Takes an Ecosystem!

December 11, 2017

Cutting edge advanced computing hardware (aka big iron) does not stand by itself. These computers are the pinnacle of a myriad of technologies that must be care Read more…

By Alex R. Larzelere

IBM Begins Power9 Rollout with Backing from DOE, Google

December 6, 2017

After over a year of buildup, IBM is unveiling its first Power9 system based on the same architecture as the Department of Energy CORAL supercomputers, Summit a Read more…

By Tiffany Trader

Microsoft Spins Cycle Computing into Core Azure Product

December 5, 2017

Last August, cloud giant Microsoft acquired HPC cloud orchestration pioneer Cycle Computing. Since then the focus has been on integrating Cycle’s organization Read more…

By John Russell

GlobalFoundries, Ayar Labs Team Up to Commercialize Optical I/O

December 4, 2017

GlobalFoundries (GF) and Ayar Labs, a startup focused on using light, instead of electricity, to transfer data between chips, today announced they've entered in Read more…

By Tiffany Trader

HPE In-Memory Platform Comes to COSMOS

November 30, 2017

Hewlett Packard Enterprise is on a mission to accelerate space research. In August, it sent the first commercial-off-the-shelf HPC system into space for testing Read more…

By Tiffany Trader

US Coalesces Plans for First Exascale Supercomputer: Aurora in 2021

September 27, 2017

At the Advanced Scientific Computing Advisory Committee (ASCAC) meeting, in Arlington, Va., yesterday (Sept. 26), it was revealed that the "Aurora" supercompute Read more…

By Tiffany Trader

NERSC Scales Scientific Deep Learning to 15 Petaflops

August 28, 2017

A collaborative effort between Intel, NERSC and Stanford has delivered the first 15-petaflops deep learning software running on HPC platforms and is, according Read more…

By Rob Farber

Oracle Layoffs Reportedly Hit SPARC and Solaris Hard

September 7, 2017

Oracle’s latest layoffs have many wondering if this is the end of the line for the SPARC processor and Solaris OS development. As reported by multiple sources Read more…

By John Russell

AMD Showcases Growing Portfolio of EPYC and Radeon-based Systems at SC17

November 13, 2017

AMD’s charge back into HPC and the datacenter is on full display at SC17. Having launched the EPYC processor line in June along with its MI25 GPU the focus he Read more…

By John Russell

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Japan Unveils Quantum Neural Network

November 22, 2017

The U.S. and China are leading the race toward productive quantum computing, but it's early enough that ultimate leadership is still something of an open questi Read more…

By Tiffany Trader

GlobalFoundries Puts Wind in AMD’s Sails with 12nm FinFET

September 24, 2017

From its annual tech conference last week (Sept. 20), where GlobalFoundries welcomed more than 600 semiconductor professionals (reaching the Santa Clara venue Read more…

By Tiffany Trader

Amazon Debuts New AMD-based GPU Instances for Graphics Acceleration

September 12, 2017

Last week Amazon Web Services (AWS) streaming service, AppStream 2.0, introduced a new GPU instance called Graphics Design intended to accelerate graphics. The Read more…

By John Russell

Leading Solution Providers

Google Releases Deeplearn.js to Further Democratize Machine Learning

August 17, 2017

Spreading the use of machine learning tools is one of the goals of Google’s PAIR (People + AI Research) initiative, which was introduced in early July. Last w Read more…

By John Russell

Perspective: What Really Happened at SC17?

November 22, 2017

SC is over. Now comes the myriad of follow-ups. Inboxes are filled with templated emails from vendors and other exhibitors hoping to win a place in the post-SC thinking of booth visitors. Attendees of tutorials, workshops and other technical sessions will be inundated with requests for feedback. Read more…

By Andrew Jones

IBM Begins Power9 Rollout with Backing from DOE, Google

December 6, 2017

After over a year of buildup, IBM is unveiling its first Power9 system based on the same architecture as the Department of Energy CORAL supercomputers, Summit a Read more…

By Tiffany Trader

EU Funds 20 Million Euro ARM+FPGA Exascale Project

September 7, 2017

At the Barcelona Supercomputer Centre on Wednesday (Sept. 6), 16 partners gathered to launch the EuroEXA project, which invests €20 million over three-and-a-half years into exascale-focused research and development. Led by the Horizon 2020 program, EuroEXA picks up the banner of a triad of partner projects — ExaNeSt, EcoScale and ExaNoDe — building on their work... Read more…

By Tiffany Trader

Delays, Smoke, Records & Markets – A Candid Conversation with Cray CEO Peter Ungaro

October 5, 2017

Earlier this month, Tom Tabor, publisher of HPCwire and I had a very personal conversation with Cray CEO Peter Ungaro. Cray has been on something of a Cinderell Read more…

By Tiffany Trader & Tom Tabor

Tensors Come of Age: Why the AI Revolution Will Help HPC

November 13, 2017

Thirty years ago, parallel computing was coming of age. A bitter battle began between stalwart vector computing supporters and advocates of various approaches to parallel computing. IBM skeptic Alan Karp, reacting to announcements of nCUBE’s 1024-microprocessor system and Thinking Machines’ 65,536-element array, made a public $100 wager that no one could get a parallel speedup of over 200 on real HPC workloads. Read more…

By John Gustafson & Lenore Mullin

Flipping the Flops and Reading the Top500 Tea Leaves

November 13, 2017

The 50th edition of the Top500 list, the biannual publication of the world’s fastest supercomputers based on public Linpack benchmarking results, was released Read more…

By Tiffany Trader

Intel Launches Software Tools to Ease FPGA Programming

September 5, 2017

Field Programmable Gate Arrays (FPGAs) have a reputation for being difficult to program, requiring expertise in specialty languages, like Verilog or VHDL. Easin Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This