The Weekly Top Five – 04/14/2011

By Tiffany Trader

April 14, 2011

The Weekly Top Five features the five biggest HPC stories of the week, condensed for your reading pleasure. This week, we cover Bull’s third petascale computing contract; IBM’s new POWER7 servers, the first hybrid spintronics computer chips, Bull and Whamcloud’s beefed-up Lustre support; and Tilera’s latest manycore development tools.

Bull to Provide Supercomputer for Fusion Research

The Paris-based Commissariat à l’Energie Atomique et aux Energies Alternatives (CEA) has selected Bull to provide a supercomputer for the International Fusion Energy Research Center (IFERC) in Rokkasho, Japan. The petaflop-class system will support advanced modeling and simulation in the field of plasmas and controlled fusion equipment. The contract marks the third time Bull will create a system with this level of performance.

From the announcement:

The new supercomputer is designed to be operational 24 hours per day. Its peak performance of almost 1.3 petaflops places it among the most powerful systems in the world. The computing components combine, within a “cluster” architecture, 4,410 blades bullx series B including 8,820 Intel Xeon processors of the “Sandy Bridge” type and 70,560 cores. The supercomputer is equipped with a memory exceeding 280 terabytes and a high bandwidth storage system of more than 5.7 petabytes, supplemented by a secondary storage system designed to support 50 petabytes. The connection network for the cluster is based on InfiniBand technology.

In addition to the above specs, 36 bullx series S systems and 38 bullx series R systems will be dedicated to the cluster’s administration, for management of the Lustre file systems and for user access. Bull will also provide 32 bullx series R systems including high-performance graphics cards for pre-and post processing and visualization. The high-end cluster will be equipped with the bullx supercomputer suite advanced edition, which was developed and optimized by Bull for petascale computers.

The installation process will begin in June. The supercomputer will be available to European and Japanese researchers for a period of five years, beginning January 2012. Bull will be responsible for the machine’s installation, maintainance and operation, and will receive support from local parter SGI Japan.

IBM Boosts POWER7 Systems

IBM has unveiled its latest POWER7 systems, including a performance bump to the Power 750, the server used in the famous Watson supercomputer. However, the new and improved Power 750 servers are even more powerful than the ones used in the Jeopardy-winning AI darling.

The new Power blades and Power servers will be used in mission-critical application areas, such as healthcare management, financial services, and scientific research. According to the release, “the specialized demands of these new applications rely on processing an enormous number of concurrent transactions and data while analyzing that information in real time.”

At the heart of the announcement are two new blades and two upgrades. The new blade servers, which IBM touts as providing an alternative to sprawling racks, include the two-socket (16-core), single-wide PS703, and the 32-core, double-wide PS704. Also debuting is the enhanced IBM Power 750 Express, like the one used in the Watson system. This server offers more than three times the performance of comparable 32-core offerings, such as Oracle’s SPARC T3-2 server, and more than twice the performance of HP’s Integrity BL890c i2. Last up is the enhanced IBM Power 755, a high-performance computing cluster node with 32 POWER7 cores and a faster processor.
 
A full accounting can be found in Editor Michael Feldman’s feature coverage. Here’s a sampling of what you’ll read:

Both the 750 and the 755 are four-socket Power7 servers that were introduced last year. The 750 is built for database serving and general enterprise consolidation/virtualization, while the InfiniBand-equipped 755 is aimed specifically at HPC users. The additional options on the 750 include new four-core and six-core Power7 CPUs running at 3.7 GHz, and two new eight-core Power7s running at 3.2 GHz and 3.6 GHz, respectively. The Power 755, which used to come only with 3.3 GHz chips, is now being outfitted with 3.6 GHz Power7s.

Why they didn’t offer an option for the faster 3.7 GHz Power7s on the Power 755 is a little mysterious. It seems like there would be some interest by HPC users that needed faster threads and a higher memory-to-compute ratio on certain applications.

OSU Lab Creates First Hybrid Spintronic Computer Chips

Ohio State University researchers have taken significant steps toward the creation of viable hybrid spintronic computer chips. The team developed the “first electronic circuit to merge traditional inorganic semiconductors with organic ‘spintronics’ — devices that utilize the spin of electrons to read, write and manipulate data.”

The group worked to combine an inorganic semiconductor with a unique plastic material being developed by OSU professor Arthur J. Epstein’s lab at Ohio State University. Epstein, a distinguished university professor of physics and chemistry and director of the Institute for Magnetic and Electronic Polymers at Ohio State, was the first to successfully store and retrieve data using a plastic spintronic device.

A paper published in the journal Physical Review Letter describes how the researchers were able to transmit “a spin-polarized electrical current from the plastic material, through the gallium arsenide, and into a light-emitting diode (LED) as proof that the organic and inorganic parts were working together.”

Ezekiel Johnston-Halperin, assistant professor of physics, examines possible uses for the technology:

If scientists could expand spintronic technology beyond memory applications into logic and computing applications, major advances in information processing could follow. Spintronic logic would theoretically require much less power, and produce much less heat, than current electronics, while enabling computers to turn on instantly without “booting up.” Hybrid and organic devices further promise computers that are lighter and more flexible, much as organic LEDs are now replacing inorganic LEDs in the production of flexible displays.

More work will need to be done before hybrid spintronics devices are ready for mass-production, but this hybrid circuit presents a good first step, one that lays the groundwork for future advances.

Bull, Whamcloud Extend Lustre Collaboration

A strengthened partnership with Whamcloud is enabling Bull to increase support and professional services for Lustre customers everywhere. Under the enhanced agreement, which builds on the duo’s existing technology partnership, Lustre users will “have access to Bull’s complete range of services starting from building scalable and highly available architectures, up to effective deployment and service level agreement (SLA) driven operations and support.”

Eric Monchalin, HPC software director at Bull, commented on the importance of parallel file systems for high performance computing HPC applications. Lustre is a high-performance, distributed open source file system used for large-scale cluster computing.

According to the release, the collaboration “enables Bull to leverage its long experience and deep knowledge in Lustre technology to provide validation and optimization of Lustre on Bull’s Extreme Computing bullx systems, integration with the bullx supercomputer suite HPC software stack, plus further development of Lustre’s administration and high availability functionality.”

European IT company Bull and venture-backed Whamcloud first announced a joint agreement for Lustre development in February. The team’s ultimate goal is to create a file system worthy of exaflop-class machines.

Tilera Tools Simplify Manycore Development Efforts

This week manycore chip specialist Tilera announced the release of its Multicore Development Environment (MDE) version 3.0, with enhancements aimed at simplifying manycore processor development.

From the release:

The new MDE is based on the recently released Linux 2.6.36 kernel, which integrates Tilera’s TILE architecture into the main Linux tree. The MDE includes cross compiling and native tool chains GCC 4.4, GDB 7.1, and GLIBC 2.11.2. The 3.0 MDE provides a full Linux distribution with over 1,000 Linux packages based on RHEL6 sources.

Support for Tilera’s architecture in the main Linux kernel creates many opportunities for open source developers to run their application on Tilera processors, the first manycore architecture to be supported by Linux. Tilera offers 64 cores today and up to 100 cores with the Tilera TILE-Gx family, coming later this year.

Linus Torvalds, founder and chief architect of the Linux kernel, was pleased with the news. “I am happy to have the TILE architecture in the kernel,” he said. ”Tilera provides innovative approaches for manycore processors.”

Tilera’s new software release includes both standard Linux and a GNU tool chain, helping users shorten development times. Tilera customers are able to use the same build infrastructure and make files, leverage the community’s resource and available software, and reduce the learning curve with standard tools and software environment.

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