The Weekly Top Five

By Tiffany Trader

April 14, 2011

The Weekly Top Five features the five biggest HPC stories of the week, condensed for your reading pleasure. This week, we cover Bull’s third petascale computing contract; IBM’s new POWER7 servers, the first hybrid spintronics computer chips, Bull and Whamcloud’s beefed-up Lustre support; and Tilera’s latest manycore development tools.

Bull to Provide Supercomputer for Fusion Research

The Paris-based Commissariat à l’Energie Atomique et aux Energies Alternatives (CEA) has selected Bull to provide a supercomputer for the International Fusion Energy Research Center (IFERC) in Rokkasho, Japan. The petaflop-class system will support advanced modeling and simulation in the field of plasmas and controlled fusion equipment. The contract marks the third time Bull will create a system with this level of performance.

From the announcement:

The new supercomputer is designed to be operational 24 hours per day. Its peak performance of almost 1.3 petaflops places it among the most powerful systems in the world. The computing components combine, within a “cluster” architecture, 4,410 blades bullx series B including 8,820 Intel Xeon processors of the “Sandy Bridge” type and 70,560 cores. The supercomputer is equipped with a memory exceeding 280 terabytes and a high bandwidth storage system of more than 5.7 petabytes, supplemented by a secondary storage system designed to support 50 petabytes. The connection network for the cluster is based on InfiniBand technology.

In addition to the above specs, 36 bullx series S systems and 38 bullx series R systems will be dedicated to the cluster’s administration, for management of the Lustre file systems and for user access. Bull will also provide 32 bullx series R systems including high-performance graphics cards for pre-and post processing and visualization. The high-end cluster will be equipped with the bullx supercomputer suite advanced edition, which was developed and optimized by Bull for petascale computers.

The installation process will begin in June. The supercomputer will be available to European and Japanese researchers for a period of five years, beginning January 2012. Bull will be responsible for the machine’s installation, maintainance and operation, and will receive support from local parter SGI Japan.

IBM Boosts POWER7 Systems

IBM has unveiled its latest POWER7 systems, including a performance bump to the Power 750, the server used in the famous Watson supercomputer. However, the new and improved Power 750 servers are even more powerful than the ones used in the Jeopardy-winning AI darling.

The new Power blades and Power servers will be used in mission-critical application areas, such as healthcare management, financial services, and scientific research. According to the release, “the specialized demands of these new applications rely on processing an enormous number of concurrent transactions and data while analyzing that information in real time.”

At the heart of the announcement are two new blades and two upgrades. The new blade servers, which IBM touts as providing an alternative to sprawling racks, include the two-socket (16-core), single-wide PS703, and the 32-core, double-wide PS704. Also debuting is the enhanced IBM Power 750 Express, like the one used in the Watson system. This server offers more than three times the performance of comparable 32-core offerings, such as Oracle’s SPARC T3-2 server, and more than twice the performance of HP’s Integrity BL890c i2. Last up is the enhanced IBM Power 755, a high-performance computing cluster node with 32 POWER7 cores and a faster processor.
 
A full accounting can be found in Editor Michael Feldman’s feature coverage. Here’s a sampling of what you’ll read:

Both the 750 and the 755 are four-socket Power7 servers that were introduced last year. The 750 is built for database serving and general enterprise consolidation/virtualization, while the InfiniBand-equipped 755 is aimed specifically at HPC users. The additional options on the 750 include new four-core and six-core Power7 CPUs running at 3.7 GHz, and two new eight-core Power7s running at 3.2 GHz and 3.6 GHz, respectively. The Power 755, which used to come only with 3.3 GHz chips, is now being outfitted with 3.6 GHz Power7s.

Why they didn’t offer an option for the faster 3.7 GHz Power7s on the Power 755 is a little mysterious. It seems like there would be some interest by HPC users that needed faster threads and a higher memory-to-compute ratio on certain applications.

OSU Lab Creates First Hybrid Spintronic Computer Chips

Ohio State University researchers have taken significant steps toward the creation of viable hybrid spintronic computer chips. The team developed the “first electronic circuit to merge traditional inorganic semiconductors with organic ‘spintronics’ — devices that utilize the spin of electrons to read, write and manipulate data.”

The group worked to combine an inorganic semiconductor with a unique plastic material being developed by OSU professor Arthur J. Epstein’s lab at Ohio State University. Epstein, a distinguished university professor of physics and chemistry and director of the Institute for Magnetic and Electronic Polymers at Ohio State, was the first to successfully store and retrieve data using a plastic spintronic device.

A paper published in the journal Physical Review Letter describes how the researchers were able to transmit “a spin-polarized electrical current from the plastic material, through the gallium arsenide, and into a light-emitting diode (LED) as proof that the organic and inorganic parts were working together.”

Ezekiel Johnston-Halperin, assistant professor of physics, examines possible uses for the technology:

If scientists could expand spintronic technology beyond memory applications into logic and computing applications, major advances in information processing could follow. Spintronic logic would theoretically require much less power, and produce much less heat, than current electronics, while enabling computers to turn on instantly without “booting up.” Hybrid and organic devices further promise computers that are lighter and more flexible, much as organic LEDs are now replacing inorganic LEDs in the production of flexible displays.

More work will need to be done before hybrid spintronics devices are ready for mass-production, but this hybrid circuit presents a good first step, one that lays the groundwork for future advances.

Bull, Whamcloud Extend Lustre Collaboration

A strengthened partnership with Whamcloud is enabling Bull to increase support and professional services for Lustre customers everywhere. Under the enhanced agreement, which builds on the duo’s existing technology partnership, Lustre users will “have access to Bull’s complete range of services starting from building scalable and highly available architectures, up to effective deployment and service level agreement (SLA) driven operations and support.”

Eric Monchalin, HPC software director at Bull, commented on the importance of parallel file systems for high performance computing HPC applications. Lustre is a high-performance, distributed open source file system used for large-scale cluster computing.

According to the release, the collaboration “enables Bull to leverage its long experience and deep knowledge in Lustre technology to provide validation and optimization of Lustre on Bull’s Extreme Computing bullx systems, integration with the bullx supercomputer suite HPC software stack, plus further development of Lustre’s administration and high availability functionality.”

European IT company Bull and venture-backed Whamcloud first announced a joint agreement for Lustre development in February. The team’s ultimate goal is to create a file system worthy of exaflop-class machines.

Tilera Tools Simplify Manycore Development Efforts

This week manycore chip specialist Tilera announced the release of its Multicore Development Environment (MDE) version 3.0, with enhancements aimed at simplifying manycore processor development.

From the release:

The new MDE is based on the recently released Linux 2.6.36 kernel, which integrates Tilera’s TILE architecture into the main Linux tree. The MDE includes cross compiling and native tool chains GCC 4.4, GDB 7.1, and GLIBC 2.11.2. The 3.0 MDE provides a full Linux distribution with over 1,000 Linux packages based on RHEL6 sources.

Support for Tilera’s architecture in the main Linux kernel creates many opportunities for open source developers to run their application on Tilera processors, the first manycore architecture to be supported by Linux. Tilera offers 64 cores today and up to 100 cores with the Tilera TILE-Gx family, coming later this year.

Linus Torvalds, founder and chief architect of the Linux kernel, was pleased with the news. “I am happy to have the TILE architecture in the kernel,” he said. ”Tilera provides innovative approaches for manycore processors.”

Tilera’s new software release includes both standard Linux and a GNU tool chain, helping users shorten development times. Tilera customers are able to use the same build infrastructure and make files, leverage the community’s resource and available software, and reduce the learning curve with standard tools and software environment.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Talk to Me: Nvidia Claims NLP Inference, Training Records

August 15, 2019

Nvidia says it’s achieved significant advances in conversation natural language processing (NLP) training and inference, enabling more complex, immediate-response interchanges between customers and chatbots. And the co Read more…

By Doug Black

Trump Administration and NIST Issue AI Standards Development Plan

August 14, 2019

Efforts to develop AI are gathering steam fast. On Monday, the White House issued a federal plan to help develop technical standards for AI following up on a mandate contained in the Administration’s AI Executive Order Read more…

By John Russell

Scientists to Tap Exascale Computing to Unlock the Mystery of our Accelerating Universe

August 14, 2019

The universe and everything in it roared to life with the Big Bang approximately 13.8 billion years ago. It has continued expanding ever since. While we have a good understanding of the early universe, its fate billions Read more…

By Rob Johnson

AWS Solution Channel

Efficiency and Cost-Optimization for HPC Workloads – AWS Batch and Amazon EC2 Spot Instances

High Performance Computing on AWS leverages the power of cloud computing and the extreme scale it offers to achieve optimal HPC price/performance. With AWS you can right size your services to meet exactly the capacity requirements you need without having to overprovision or compromise capacity. Read more…

HPE Extreme Performance Solutions

Bring the combined power of HPC and AI to your business transformation

FPGA (Field Programmable Gate Array) acceleration cards are not new, as they’ve been commercially available since 1984. Typically, the emphasis around FPGAs has centered on the fact that they’re programmable accelerators, and that they can truly offer workload specific hardware acceleration solutions without requiring custom silicon. Read more…

IBM Accelerated Insights

Cloudy with a Chance of Mainframes

[Connect with HPC users and learn new skills in the IBM Spectrum LSF User Community.]

Rapid rates of change sometimes result in unexpected bedfellows. Read more…

Argonne Supercomputer Accelerates Cancer Prediction Research

August 13, 2019

In the fight against cancer, early prediction, which drastically improves prognoses, is critical. Now, new research by a team from Northwestern University – and accelerated by supercomputing resources at Argonne Nation Read more…

By Oliver Peckham

Scientists to Tap Exascale Computing to Unlock the Mystery of our Accelerating Universe

August 14, 2019

The universe and everything in it roared to life with the Big Bang approximately 13.8 billion years ago. It has continued expanding ever since. While we have a Read more…

By Rob Johnson

AI is the Next Exascale – Rick Stevens on What that Means and Why It’s Important

August 13, 2019

Twelve years ago the Department of Energy (DOE) was just beginning to explore what an exascale computing program might look like and what it might accomplish. Today, DOE is repeating that process for AI, once again starting with science community town halls to gather input and stimulate conversation. The town hall program... Read more…

By Tiffany Trader and John Russell

Cray Wins NNSA-Livermore ‘El Capitan’ Exascale Contract

August 13, 2019

Cray has won the bid to build the first exascale supercomputer for the National Nuclear Security Administration (NNSA) and Lawrence Livermore National Laborator Read more…

By Tiffany Trader

AMD Launches Epyc Rome, First 7nm CPU

August 8, 2019

From a gala event at the Palace of Fine Arts in San Francisco yesterday (Aug. 7), AMD launched its second-generation Epyc Rome x86 chips, based on its 7nm proce Read more…

By Tiffany Trader

Lenovo Drives Single-Socket Servers with AMD Epyc Rome CPUs

August 7, 2019

No summer doldrums here. As part of the AMD Epyc Rome launch event in San Francisco today, Lenovo announced two new single-socket servers, the ThinkSystem SR635 Read more…

By Doug Black

Building Diversity and Broader Engagement in the HPC Community

August 7, 2019

Increasing diversity and inclusion in HPC is a community-building effort. Representation of both issues and individuals matters - the more people see HPC in a w Read more…

By AJ Lauer

Xilinx vs. Intel: FPGA Market Leaders Launch Server Accelerator Cards

August 6, 2019

The two FPGA market leaders, Intel and Xilinx, both announced new accelerator cards this week designed to handle specialized, compute-intensive workloads and un Read more…

By Doug Black

Upcoming NSF Cyberinfrastructure Projects to Support ‘Long-Tail’ Users, AI and Big Data

August 5, 2019

The National Science Foundation is well positioned to support national priorities, as new NSF-funded HPC systems to come online in the upcoming year promise to Read more…

By Ken Chiacchia, Pittsburgh Supercomputing Center/XSEDE

High Performance (Potato) Chips

May 5, 2006

In this article, we focus on how Procter & Gamble is using high performance computing to create some common, everyday supermarket products. Tom Lange, a 27-year veteran of the company, tells us how P&G models products, processes and production systems for the betterment of consumer package goods. Read more…

By Michael Feldman

Supercomputer-Powered AI Tackles a Key Fusion Energy Challenge

August 7, 2019

Fusion energy is the Holy Grail of the energy world: low-radioactivity, low-waste, zero-carbon, high-output nuclear power that can run on hydrogen or lithium. T Read more…

By Oliver Peckham

Cray, AMD to Extend DOE’s Exascale Frontier

May 7, 2019

Cray and AMD are coming back to Oak Ridge National Laboratory to partner on the world’s largest and most expensive supercomputer. The Department of Energy’s Read more…

By Tiffany Trader

Graphene Surprises Again, This Time for Quantum Computing

May 8, 2019

Graphene is fascinating stuff with promise for use in a seeming endless number of applications. This month researchers from the University of Vienna and Institu Read more…

By John Russell

AMD Verifies Its Largest 7nm Chip Design in Ten Hours

June 5, 2019

AMD announced last week that its engineers had successfully executed the first physical verification of its largest 7nm chip design – in just ten hours. The AMD Radeon Instinct Vega20 – which boasts 13.2 billion transistors – was tested using a TSMC-certified Calibre nmDRC software platform from Mentor. Read more…

By Oliver Peckham

TSMC and Samsung Moving to 5nm; Whither Moore’s Law?

June 12, 2019

With reports that Taiwan Semiconductor Manufacturing Co. (TMSC) and Samsung are moving quickly to 5nm manufacturing, it’s a good time to again ponder whither goes the venerable Moore’s law. Shrinking feature size has of course been the primary hallmark of achieving Moore’s law... Read more…

By John Russell

Deep Learning Competitors Stalk Nvidia

May 14, 2019

There is no shortage of processing architectures emerging to accelerate deep learning workloads, with two more options emerging this week to challenge GPU leader Nvidia. First, Intel researchers claimed a new deep learning record for image classification on the ResNet-50 convolutional neural network. Separately, Israeli AI chip startup Hailo.ai... Read more…

By George Leopold

Nvidia Embraces Arm, Declares Intent to Accelerate All CPU Architectures

June 17, 2019

As the Top500 list was being announced at ISC in Frankfurt today with an upgraded petascale Arm supercomputer in the top third of the list, Nvidia announced its Read more…

By Tiffany Trader

Leading Solution Providers

ISC 2019 Virtual Booth Video Tour

CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
GOOGLE
GOOGLE
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
VERNE GLOBAL
VERNE GLOBAL

Cray Wins NNSA-Livermore ‘El Capitan’ Exascale Contract

August 13, 2019

Cray has won the bid to build the first exascale supercomputer for the National Nuclear Security Administration (NNSA) and Lawrence Livermore National Laborator Read more…

By Tiffany Trader

Top500 Purely Petaflops; US Maintains Performance Lead

June 17, 2019

With the kick-off of the International Supercomputing Conference (ISC) in Frankfurt this morning, the 53rd Top500 list made its debut, and this one's for petafl Read more…

By Tiffany Trader

A Behind-the-Scenes Look at the Hardware That Powered the Black Hole Image

June 24, 2019

Two months ago, the first-ever image of a black hole took the internet by storm. A team of scientists took years to produce and verify the striking image – an Read more…

By Oliver Peckham

Cray – and the Cray Brand – to Be Positioned at Tip of HPE’s HPC Spear

May 22, 2019

More so than with most acquisitions of this kind, HPE’s purchase of Cray for $1.3 billion, announced last week, seems to have elements of that overused, often Read more…

By Doug Black and Tiffany Trader

AMD Launches Epyc Rome, First 7nm CPU

August 8, 2019

From a gala event at the Palace of Fine Arts in San Francisco yesterday (Aug. 7), AMD launched its second-generation Epyc Rome x86 chips, based on its 7nm proce Read more…

By Tiffany Trader

Chinese Company Sugon Placed on US ‘Entity List’ After Strong Showing at International Supercomputing Conference

June 26, 2019

After more than a decade of advancing its supercomputing prowess, operating the world’s most powerful supercomputer from June 2013 to June 2018, China is keep Read more…

By Tiffany Trader

In Wake of Nvidia-Mellanox: Xilinx to Acquire Solarflare

April 25, 2019

With echoes of Nvidia’s recent acquisition of Mellanox, FPGA maker Xilinx has announced a definitive agreement to acquire Solarflare Communications, provider Read more…

By Doug Black

Qualcomm Invests in RISC-V Startup SiFive

June 7, 2019

Investors are zeroing in on the open standard RISC-V instruction set architecture and the processor intellectual property being developed by a batch of high-flying chip startups. Last fall, Esperanto Technologies announced a $58 million funding round. Read more…

By George Leopold

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This